公开(公告)号：US20190027509A1

公开(公告)日：2019-01-24

申请号：US15743597

申请日：2017-07-06

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaodi Liu ,  Guangcai Yuan ,  Gang Wang

IPC: H01L27/12 ,  H01L23/31 ,  H01L23/29 ,  H01L23/00 ,  H01L29/66 ,  H01L21/02 ,  H01L21/441 ,  G02F1/1345 ,  H01L29/786 ,  G02F1/1362 ,  G02F1/1368

Abstract: An array substrate and a display device are provided. The array substrate includes a base substrate, and a first conductive layer and a second conductive layer which are sequentially disposed on the base substrate, and at least two passivation layers are continuously arranged between the first conductive layer and the second conductive layer in a direction perpendicular to the base substrate.

公开(公告)号：US09882060B2

公开(公告)日：2018-01-30

申请号：US14905512

申请日：2015-08-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaodi Liu ,  Gang Wang

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/385 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/385 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78696

Abstract: Embodiments of the present invention disclose a thin film transistor and an array substrate, manufacturing methods thereof, and a display device, which relate to the field of display technology, and can improve drifting of a threshold voltage of a thin film transistor and enhance the stability and reliability of an array substrate. The thin film transistor comprises an active layer and a gate insulating layer, wherein the material of the active layer is a metal oxide semiconductor, and during forming the thin film transistor, the gate insulating layer conveys oxygen to the active layer so as to reduce an interface state density and a movable impurity concentration of a contact interface between the active layer and the gate insulating layer.

公开(公告)号：US09837477B2

公开(公告)日：2017-12-05

申请号：US15122172

申请日：2015-09-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangbo Chen ,  Jun Cheng ,  Chunsheng Jiang ,  Xiaodi Liu ,  Xiangyong Kong

IPC: H01L27/32 ,  H01L21/77 ,  H01L51/56

CPC classification number: H01L27/3262 ,  H01L21/77 ,  H01L27/1288 ,  H01L51/56 ,  H01L2227/323

Abstract: Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.

公开(公告)号：US10340389B2

公开(公告)日：2019-07-02

申请号：US15329180

申请日：2015-11-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiangyong Kong ,  Xiaming Zhu ,  Xiaodi Liu

IPC: H01L29/786 ,  H01L21/28 ,  H01L29/66 ,  H01L29/76 ,  H01L27/12 ,  H01L29/24 ,  H01L29/417 ,  H01L29/423

Abstract: The present disclosure discloses in embodiments a thin film transistor and a manufacturing method thereof, an array substrate. The thin film transistor comprises: a base substrate, an active layer, a source, a gate, and a drain. Two ends of the active layer are connected to the source and the drain, respectively. The gate comprises a top gate and a bottom gate arranged opposite to each other in a direction perpendicular to the base substrate, the top gate comprising a top gate top portion and a top gate side portion connected to the top gate top portion, the top gate side portion extending from the top gate top portion towards the base substrate. The active layer is sandwiched between the top gate top portion and the bottom gate. A sidewall of the active layer is at least partially surrounded by the top gate side portion.

公开(公告)号：US10140920B2

公开(公告)日：2018-11-27

申请号：US15321543

申请日：2016-03-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Cuili Gai ,  Liye Duan ,  Xiaodi Liu

IPC: G09G3/3258 ,  G09G3/3225

Abstract: Embodiments of the present disclosure provide a pixel driving circuit and a pixel driving method. The pixel driving circuit comprises a driving transistor, a storage capacitor, a light-emitting device, a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor and a fifth switch transistor. The pixel driving circuit and the pixel driving method are implemented such that a driving current generated by the driving transistor is relevant to a working voltage provided by a first power supply terminal, an activation voltage of the light-emitting device, a working voltage of the light-emitting device upon emitting light and a data voltage, yet irrelevant to a threshold voltage of the driving transistor, thereby refraining the driving current flowing through the light-emitting device from influence exerted by the non-uniformity and drifting of the threshold voltage of the driving transistor, and in turn effectively improving the uniformity of the driving current flowing through the light-emitting device.

公开(公告)号：US10483294B2

公开(公告)日：2019-11-19

申请号：US14908652

申请日：2015-09-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaodi Liu ,  Gang Wang

IPC: H01L27/12

Abstract: An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises a gate electrode layer, an active layer and a source-drain electrode layer that are disposed on a substrate. The substrate comprises a storage capacitance region thereon II. In the storage capacitance region II, projections of the gate electrode layer and the active layer on the substrate are at least partially overlapped, and projections of the active layer and the source-drain electrode layer on the substrate are at least partially overlapped. The array substrate can effectively increase the storage capacitance without increasing an area occupied by the storage capacitance region, which is advantageously to reduce a pixel area and increase PPI.

公开(公告)号：US09857344B2

公开(公告)日：2018-01-02

申请号：US14574841

申请日：2014-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaodi Liu ,  Cuili Gai ,  Fengjuan Liu ,  Gang Wang

IPC: G01N33/00 ,  H01L29/22 ,  H01L29/786 ,  H01L29/26

CPC classification number: G01N33/0027 ,  G01N33/0062 ,  H01L29/22 ,  H01L29/26 ,  H01L29/786

Abstract: Embodiments of the present invention provide a gas detection sensor, a display panel, and a display device. The gas detection sensor comprises: a gas sensitive part; two detection electrodes electrically connected with each other through the gas sensitive part; and a protective layer enclosing the gas sensitive part and the detection electrodes. When one of the detection electrodes is applied with a detecting signal, the detecting signal is output from the other detection electrode after being modulated by the gas sensitive part, and a voltage signal output by the other detection electrode is related to a nature of the outside air to which the gas sensitive part is exposed, thereby a detection on air quality may be achieved through detecting the voltage signal output from the other detection electrode, such that a simply structured and portable gas detection sensor can be realized.

公开(公告)号：US09647014B2

公开(公告)日：2017-05-09

申请号：US14416872

申请日：2014-05-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaodi Liu ,  Gang Wang

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/092 ,  H01L21/477 ,  H01L21/02 ,  H01L21/383 ,  H01L21/8238

CPC classification number: H01L27/1288 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/383 ,  H01L21/477 ,  H01L21/823807 ,  H01L27/092 ,  H01L27/1225 ,  H01L27/1262 ,  H01L27/127 ,  H01L29/7869

Abstract: A complementary thin film transistor driving back plate and a preparing method thereof, and a display device are disclosed. The preparing method comprises: forming a lower electrode (102) on a base substrate (101); sequentially disposing a continuously grown dielectric layer (103), a semiconductor layer (104), and a diffusion protection layer (105); sequentially forming a no-photoresist region (107), an N-type thin film transistor preparation region (108), and a P-type thin film transistor preparation region (109); removing a photoresist layer (114) of the N-type thin film transistor preparation region (108); removing a diffusion protection layer (105) of the N-type thin film transistor preparation region (105); removing a photoresist layer (114) of the P-type thin film transistor preparation region (109); performing an oxidation treatment to the base substrate (101); disposing a passivation layer (111) on the base substrate (101); and forming an upper electrode (113) on the passivation layer (111).

公开(公告)号：US09608127B2

公开(公告)日：2017-03-28

申请号：US14800089

申请日：2015-07-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaodi Liu ,  Li Sun ,  Haijing Chen

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/027 ,  H01L21/467 ,  H01L21/477 ,  H01L21/441 ,  H01L29/66

CPC classification number: H01L29/78693 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02631 ,  H01L21/0273 ,  H01L21/441 ,  H01L21/467 ,  H01L21/477 ,  H01L29/66969 ,  H01L29/78618

Abstract: Embodiments of the disclosed technology provide an amorphous oxide thin film transistor (TFT), a method for preparing an amorphous oxide TFT, and a display panel. The amorphous oxide thin film transistor includes: a gate electrode, a gate insulating layer, a semiconductor active layer, a source electrode and a drain electrode. The semiconductor active layer comprises a channel layer and an ohmic contact layer, and the channel layer has a greater content of oxygen than the ohmic contact layer; the channel layer contacts the gate insulating layer, and the ohmic contact layer comprises two separated ohmic contact regions, one of which contacts the source electrode and the other of which contacts the drain electrode.

公开(公告)号：US20170077201A1

公开(公告)日：2017-03-16

申请号：US15122172

申请日：2015-09-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangbo Chen ,  Jun Cheng ,  Chunsheng Jiang ,  Xiaodi Liu ,  Xiangyong Kong

IPC: H01L27/32 ,  H01L51/56

CPC classification number: H01L27/3262 ,  H01L21/77 ,  H01L27/1288 ,  H01L51/56 ,  H01L2227/323

Abstract: Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.

Abstract translation: 本发明的实施例提供阵列基板及其制造方法。 该方法包括：在衬底上形成栅极电极图案，栅极绝缘层，有源层图案和蚀刻停止层; 在所述蚀刻停止层上形成光致抗蚀剂层; 在光致抗蚀剂层上执行单一的图案化工艺，使得第一区域中的光致抗蚀剂被部分蚀刻掉，第二区域中的光致抗蚀剂被完全蚀刻掉，并且第三区域中的光致抗蚀剂被完全残留; 并进行单蚀刻处理，使得第一区域中的残留光致抗蚀剂和第一区域中的蚀刻停止层的一部分被蚀刻掉，同时蚀刻停止层的一部分和栅极的一部分 第二区域中的绝缘层被蚀刻掉。