Abstract:
Exemplary processing methods may include providing a treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include a layer of a silicon-containing material. The methods may include forming inductively-coupled plasma effluents of the treatment precursor. The methods may include contacting the layer of the silicon-containing material with the inductively-coupled plasma effluents of the treatment precursor to produce a treated layer of the silicon-containing material. The contacting may reduce a dielectric constant of the layer of the silicon-containing material.
Abstract:
Semiconductor processing methods are described for forming low-κ dielectric materials. The methods may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-carbon-and-hydrogen-containing precursor. A substrate may be disposed within the processing region. The methods may include forming plasma effluents of the deposition precursors. The methods may include depositing a layer of silicon-containing material on the substrate. The layer of silicon-containing material may be characterized by a dielectric constant of less than or about 4.0.
Abstract:
Exemplary processing methods may include forming a plasma of a deposition precursor in a processing region of a semiconductor processing chamber. The methods may include adjusting a variable capacitor within 20% of a resonance peak. The variable capacitor may be coupled with an electrode incorporated within a substrate support on which a substrate is seated. The methods may include depositing a material on the substrate.
Abstract:
Provided are self-aligned double patterning methods including feature trimming. The SADP process is performed in a single batch processing chamber in which the substrate is laterally moved between sections of the processing chamber separated by gas curtains so that each section independently has a process condition.
Abstract:
Processing methods for forming a silicon nitride film comprising exposing a metal surface to a silicon precursor, a nitrogen-containing reactant and a hydrogen-containing plasma at a temperature less than or equal to about 250° C. to form a silicon nitride film with a low etch rate without damaging the metal surface.
Abstract:
Methods for depositing metal oxide layers on metal surfaces are described. The methods include exposing a substrate to separate doses of a metal precursor, which does not contain metal-oxygen bonds, and an alcohol. These methods do not oxidize the underlying metal layer.
Abstract:
Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.
Abstract:
Methods and apparatus for forming a conformal SiCON film on a surface are described. A SiCN film is formed on a substrate surface and exposed to a low temperature steam annealing process to form a film resistant to damage by rapid thermal processing or ashing. The film is treated by rapid thermal processing and then subjected to a high temperature anneal to form a film with a low dielectric constant.
Abstract:
Methods for the formation of SiCN, SiCO and SiCON films comprising cyclical exposure of a substrate surface to a silicon-containing gas, a carbon-containing gas and a plasma. Some embodiments further comprise the addition of an oxidizing agent prior to at least the plasma exposure.
Abstract:
Methods for self-aligned multiple patterning including controlled slimming of features during spacer layer deposition. Multiple spacer layer deposition process conditions produce a balance between controlling the damage to the features and increasing production throughput.