公开(公告)号：US20200227276A1

公开(公告)日：2020-07-16

申请号：US16828751

申请日：2020-03-24

Applicant: Applied Materials, Inc.

Inventor： Akhil MEHROTRA ,  Gene LEE ,  Abhijit PATIL ,  Shan JIANG ,  Zohreh HESABI

IPC: H01L21/3213 ,  H01L21/285 ,  H01L21/3065 ,  H01L21/311

Abstract: A method of removing a metal-containing layer (e.g., tungsten) from a substrate is provided. The method includes generating a first plasma in a process volume of a plasma chamber when a patterned device is disposed on a substrate support in the process volume. The patterned device includes a patterned region and an unpatterned region; a substrate; a tungsten-containing layer formed over the substrate; a supporting layer disposed between the tungsten-containing layer and the substrate. The patterned region includes exposed surfaces of the supporting layer and the unpatterned region does not include any exposed surfaces of the supporting layer. The method further includes depositing a first film over the patterned region of the tungsten-containing layer with the first plasma; and removing portions of the unpatterned region of the tungsten-containing layer with the first plasma without depositing the first film over the unpatterned region.

公开(公告)号：US20190096695A1

公开(公告)日：2019-03-28

申请号：US16141777

申请日：2018-09-25

Applicant: Applied Materials, Inc.

Inventor： Akhil MEHROTRA ,  Gene LEE ,  Abhijit PATIL ,  Shan JIANG ,  Zohreh HESABI

IPC: H01L21/3213 ,  H01L21/3065 ,  H01L21/285

Abstract: A method of removing a metal-containing layer (e.g., tungsten) from a substrate is provided. The method includes generating a first plasma in a process volume of a plasma chamber when a patterned device is disposed on a substrate support in the process volume. The patterned device includes a patterned region and an unpatterned region; a substrate; a tungsten-containing layer formed over the substrate; a supporting layer disposed between the tungsten-containing layer and the substrate. The patterned region includes exposed surfaces of the supporting layer and the unpatterned region does not include any exposed surfaces of the supporting layer. The method further includes depositing a first film over the patterned region of the tungsten-containing layer with the first plasma; and removing portions of the unpatterned region of the tungsten-containing layer with the first plasma without depositing the first film over the unpatterned region.

公开(公告)号：US20180337047A1

公开(公告)日：2018-11-22

申请号：US15984285

申请日：2018-05-18

Applicant: Applied Materials, Inc.

Inventor： Nancy FUNG ,  Gene LEE ,  Hailong ZHOU ,  Zohreh HESABI ,  Akhil MEHROTRA ,  Shan JIANG ,  Abhijit PATIL ,  Chi-I LANG ,  Larry GAO

IPC: H01L21/033

CPC classification number: H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337

Abstract: A method of etching a hardmask layer formed on a substrate is provided. The method includes supplying an etching gas mixture to a processing region of a processing chamber. A device substrate is disposed in the processing region when the etching gas mixture is supplied to the processing region. The device substrate comprises a substrate and a hardmask layer formed over the substrate. The etching gas mixture comprises a fluorine-containing gas, a silicon-containing gas, and an oxygen-containing gas. The method further includes providing RF power to the etching gas mixture to form a plasma in the processing region. The plasma is configured to etch exposed portions of the hardmask layer.

公开(公告)号：US20160056050A1

公开(公告)日：2016-02-25

申请号：US14462817

申请日：2014-08-19

Applicant: Applied Materials, Inc.

Inventor： Byungkook KONG ,  Gene LEE ,  Liming YANG

IPC: H01L21/311 ,  H01L27/115

CPC classification number: H01L21/31116 ,  H01J37/32091 ,  H01J37/32146 ,  H01L21/32137 ,  H01L27/11556 ,  H01L27/11582

Abstract: Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.

Abstract translation: 本公开的实施例提供了用于形成膜堆叠中的特征的方法，其可以用于在制造半导体芯片的三维（3D）堆叠中形成具有精确轮廓控制的阶梯状结构。 在一个示例中，使用同步RF脉冲蚀刻设置在基板上的材料层的方法包括：将蚀刻气体混合物提供到具有设置在基板上的膜堆叠的处理室中，将RF源功率和RF偏置功率同步地脉冲 蚀刻气体混合物的比例小于0.5，并蚀刻设置在基底上的薄膜叠层。

公开(公告)号：US20230083577A1

公开(公告)日：2023-03-16

申请号：US17891921

申请日：2022-08-19

Applicant: Applied Materials, Inc.

Inventor： Wangkeun CHO ,  Gene LEE

IPC: H01L21/3213

Abstract: Embodiments described herein generally relate to electronic devices and electronic device manufacturing. More particularly, some embodiments of the present disclosure provide methods of manufacturing memory devices, for example, dynamic random-access memory cells with buried word-lines. In an embodiment, a method of manufacturing an electronic device is provided. The method includes recessing a metal layer to a first predetermined depth to form a recessed metal layer. The metal layer at least partially fills each feature of a plurality of features formed on a substrate and each feature has a feature depth. The method further includes exposing the recessed metal layer to a carbon-containing plasma to form a metal-carbide layer on the recessed metal layer. The method further includes recessing the recessed metal layer to a second predetermined depth by etching the metal-carbide layer and the recessed metal layer.

公开(公告)号：US20220359201A1

公开(公告)日：2022-11-10

申请号：US17712955

申请日：2022-04-04

Applicant: Applied Materials, Inc.

Inventor： Chao LI ,  Gene LEE

IPC: H01L21/033 ,  H01L21/311

Abstract: A method for forming a metal containing feature includes performing a deposition process, the deposition process comprising conformally depositing an over layer on top surfaces of a patterned mandrel layer and over a spacer layer on sidewalls of the patterned mandrel layer, and performing an etch process, the etch process comprising removing the over layer from the top surfaces of the patterned mandrel layer and shoulder portions of the spacer layer, and removing the shoulder portions of the spacer layer, using a fluorine containing etching gas.

公开(公告)号：US20200335339A1

公开(公告)日：2020-10-22

申请号：US16867095

申请日：2020-05-05

Applicant: Applied Materials, Inc.

Inventor： Tzu-shun YANG ,  Rui CHENG ,  Karthik JANAKIRAMAN ,  Zubin HUANG ,  Diwakar KEDLAYA ,  Meenakshi GUPTA ,  Srinivas GUGGILLA ,  Yung-chen LIN ,  Hidetaka OSHIO ,  Chao LI ,  Gene LEE

IPC: H01L21/033

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.

公开(公告)号：US20140187050A1

公开(公告)日：2014-07-03

申请号：US14142028

申请日：2013-12-27

Applicant: Applied Materials, Inc. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Nicolas POSSEME ,  Gene LEE

IPC: H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/3081 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32139

Abstract: According to one embodiment, the invention relates to a method for the anisotropic etching of patterns in at least one layer to be etched through a hard mask comprising carbon in an inductive-coupling plasma etching reactor (ICP), the method being characterized in that the hard mask is made from boron doped with carbon (B:C), and in that, prior to the anisotropic etching of the patterns in said layer to be etched through the hard mask of carbon-doped boron (B:C), the following steps are performed: realization of an intermediate hard mask situated on a layer of carbon-doped boron intended to form the hard mask made from carbon-doped boron (B:C), etching of the layer of carbon-doped boron (B:C) through the intermediate hard mask in order to form the hard mask made from carbon-doped boron (B:C), the realization of the intermediate hard mask and the etching of the hard mask made from carbon-doped boron (B:C) being done in said inductive coupling plasma etching reactor (ICP).

Abstract translation: 根据一个实施例，本发明涉及一种用于在电感耦合等离子体蚀刻反应器（ICP）中通过包含碳的硬掩模在至少一层中蚀刻图案的各向异性蚀刻的方法，其特征在于， 硬掩模由掺杂碳（B：C）的硼制成，并且因为在通过碳掺杂硼（B：C）的硬掩模蚀刻所述待蚀刻层中的图案的各向异性蚀刻之前， 执行步骤：实现位于用于形成由碳掺杂硼（B：C）制成的硬掩模的碳掺杂硼层上的中间硬掩模，蚀刻碳掺杂硼（B：C ）通过中间硬掩模形成由碳掺杂硼（B：C）制成的硬掩模，中间硬掩模的实现以及由碳掺杂硼（B：C）制成的硬掩模的蚀刻， 在所述电感耦合等离子体蚀刻反应器（ICP）中完成。

公开(公告)号：US20220285167A1

公开(公告)日：2022-09-08

申请号：US17592365

申请日：2022-02-03

Applicant: Applied Materials, Inc.

Inventor： Jonathan SHAW ,  Gene LEE

IPC: H01L21/311 ,  H01L21/768 ,  H01J37/32

Abstract: A method for selective barrier metal etching includes performing a hydrogen implantation process, in an inductively coupled plasma (ICP) etch chamber, to chemically reduce an oxidized portion of a barrier metal layer formed within a feature in a metal layer on the barrier metal layer, and performing an etch process, in the ICP etch chamber, to remove the hydrogen implanted portion of the barrier metal layer.

公开(公告)号：US20200335338A1

公开(公告)日：2020-10-22

申请号：US16821759

申请日：2020-03-17

Applicant: Applied Materials, Inc.

Inventor： Tzu-Shun YANG ,  Rui CHENG ,  Karthik JANAKIRAMAN ,  Zubin HUANG ,  Diwakar KADLAYA ,  Meenakshi GUPTA ,  Srinivas GUGGILLA ,  Yung-chen LIN ,  Hidetaka OSHIO ,  Chao LI ,  Gene LEE

IPC: H01L21/033

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a mandrel layer on a substrate, conformally forming a spacer layer on the mandrel layer, wherein the spacer layer is a doped silicon material, and patterning the spacer layer. In another embodiment, a method for forming features on a substrate includes conformally forming a spacer layer on a mandrel layer on a substrate, wherein the spacer layer is a doped silicon material, selectively removing a portion of the spacer layer using a first gas mixture, and selectively removing the mandrel layer using a second gas mixture different from the first gas mixture.