公开(公告)号：US20170277639A1

公开(公告)日：2017-09-28

申请号：US15361335

申请日：2016-11-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Amro Awad ,  Sergey Blagodurov ,  Arkaprava Basu ,  Mark H. Oskin ,  Gabriel H. Loh ,  Andrew G. Kegel ,  David S. Christie ,  Kevin J. McGrath

IPC: G06F12/1036 ,  G06F12/1009

CPC classification number: G06F12/1036 ,  G06F12/1009 ,  G06F12/1027 ,  G06F2212/1024 ,  G06F2212/65 ,  G06F2212/683

Abstract: The described embodiments include a computing device with two or more translation lookaside buffers (TLB). During operation, the computing device updates an entry in the TLB based on a virtual address to physical address translation and metadata from a page table entry that were acquired during a page table walk. The computing device then computes, based on a lease length expression, a lease length for the entry in the TLB. Next, the computing device sets, for the entry in the TLB, a lease value to the lease length, wherein the lease value represents a time until a lease for the entry in the TLB expires, wherein the entry in the TLB is invalid when the associated lease has expired. The computing device then uses the lease value to control operations that are allowed to be performed using information from the entry in the TLB.

公开(公告)号：US09448909B2

公开(公告)日：2016-09-20

申请号：US14054345

申请日：2013-10-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Joseph L. Greathouse ,  David S. Christie

IPC: G06F9/30 ,  G06F11/34 ,  G06F11/36

CPC classification number: G06F11/3466 ,  G06F11/3409 ,  G06F11/348 ,  G06F11/3636 ,  G06F2201/865 ,  G06F2201/88

Abstract: A system and method for efficiently performing program instrumentation. A processor processes instructions stored in a memory. When the processor processes a given instruction of a given instruction type, the processor updates a corresponding performance counter. When the performance counter reaches a threshold, the processor generates an interrupt and compares a location of the given instruction with stored locations in a given list. If a match is not found, then the processor processes an instruction following the given instruction in the computer program without processing intermediate instrumentation code. If a match is found, then the processor processes instrumentation code. Regardless of whether or not the instrumentation code is processed, when control flow returns to the computer program, the corresponding performance counter is initialized with a random value.

Abstract translation: 一种有效执行程序仪表的系统和方法。 处理器处理存储在存储器中的指令。 当处理器处理给定指令类型的给定指令时，处理器更新相应的性能计数器。 当性能计数器达到阈值时，处理器产生中断，并将给定指令的位置与给定列表中存储的位置进行比较。 如果未找到匹配项，则处理器处理计算机程序中的给定指令之后的指令，而不处理中间的仪器代码。 如果找到匹配项，则处理器处理检测代码。 无论仪器代码是否被处理，当控制流程返回到计算机程序时，相应的性能计数器将以随机值初始化。

公开(公告)号：US10078588B2

公开(公告)日：2018-09-18

申请号：US15081379

申请日：2016-03-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Arkaprava Basu ,  Mark H. Oskin ,  Gabriel H. Loh ,  Andrew G. Kegel ,  David S. Christie ,  Kevin J. McGrath

IPC: G06F12/08 ,  G06F12/0808 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/1027

CPC classification number: G06F12/0808 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/0891 ,  G06F12/1027 ,  G06F2212/1024 ,  G06F2212/657 ,  G06F2212/683 ,  G06F2212/684 ,  Y02D10/13

Abstract: The described embodiments include a computing device with two or more translation lookaside buffers (TLB) that performs operations for handling entries in the TLBs. During operation, the computing device maintains lease values for entries in the TLBs, the lease values representing times until leases for the entries expire, wherein a given entry in the TLB is invalid when the associated lease has expired. The computing device uses the lease value to control operations that are allowed to be performed using information from the entries in the TLBs. In addition, the computing device maintains, in a page table, longest lease values for page table entries indicating when corresponding longest leases for entries in TLBs expire. The longest lease values are used to determine when and if a TLB shootdown is to be performed.

公开(公告)号：US20190303230A1

公开(公告)日：2019-10-03

申请号：US15940693

申请日：2018-03-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Dean A. Liberty ,  Vilas K. Sridharan ,  Michael T. Clark ,  Jelena Ilic ,  David S. Christie ,  James R. Williamson ,  Cristian Constantinescu

IPC: G06F11/07 ,  G06F9/48 ,  G06F9/30 ,  G06F9/455

Abstract: Systems, apparatuses, and methods for implementing a hardware enforcement mechanism to enable platform-specific firmware visibility into an error state ahead of the operating system are disclosed. A system includes at least one or more processor cores, control logic, a plurality of registers, platform-specific firmware, and an operating system (OS). The control logic allows the platform-specific firmware to decide if and when the error state is visible to the OS. In some cases, the platform-specific firmware blocks the OS from accessing the error state. In other cases, the platform-specific firmware allows the OS to access the error state such as when the OS needs to unmap a page. The control logic enables the platform-specific firmware, rather than the OS, to make decisions about the replacement of faulty components in the system.

公开(公告)号：US09483379B2

公开(公告)日：2016-11-01

申请号：US14054356

申请日：2013-10-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Joseph L. Greathouse ,  David S. Christie

IPC: G06F9/38 ,  G06F11/36 ,  G06F11/30 ,  G06F11/34

CPC classification number: G06F11/36 ,  G06F11/3065 ,  G06F11/3072 ,  G06F11/3093 ,  G06F11/3466 ,  G06F11/3471 ,  G06F11/3476 ,  G06F11/3495 ,  G06F11/3636 ,  G06F2201/81 ,  G06F2201/865 ,  G06F2201/88

Abstract: A system and method for efficiently performing program instrumentation. A processor processes instructions stored in a memory. The processor allocates a memory region for the purpose of creating “random branches” in the computer code utilizing existing memory access instructions. When the processor processes a given instruction, the processor both accesses a first location in the memory region and may determine a condition is satisfied. In response, the processor generates an interrupt. The corresponding interrupt handler may transfer control flow from the computer program to instrumentation code. The condition may include a pointer storing an address pointing to locations within the memory region equals a given address after the point is updated. Alternatively, the condition may include an updated data value stored in a location pointed to by the given address equals a threshold value.

Abstract translation: 一种有效执行程序仪表的系统和方法。 处理器处理存储在存储器中的指令。 处理器为了在现有的存储器访问指令中的计算机代码中创建“随机分支”而分配存储器区域。 当处理器处理给定的指令时，处理器都访问存储器区域中的第一位置并且可以确定满足条件。 作为响应，处理器产生中断。 相应的中断处理程序可以将控制流程从计算机程序传送到仪表代码。 条件可以包括存储指向存储器区域内的位置的地址的指针等于点更新之后的给定地址。 或者，条件可以包括存储在由给定地址指向的位置的更新的数据值等于阈值。

公开(公告)号：US20150106602A1

公开(公告)日：2015-04-16

申请号：US14054356

申请日：2013-10-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Joseph L. Greathouse ,  David S. Christie

IPC: G06F9/38

CPC classification number: G06F11/36 ,  G06F11/3065 ,  G06F11/3072 ,  G06F11/3093 ,  G06F11/3466 ,  G06F11/3471 ,  G06F11/3476 ,  G06F11/3495 ,  G06F11/3636 ,  G06F2201/81 ,  G06F2201/865 ,  G06F2201/88

Abstract: A system and method for efficiently performing program instrumentation. A processor processes instructions stored in a memory. The processor allocates a memory region for the purpose of creating “random branches” in the computer code utilizing existing memory access instructions. When the processor processes a given instruction, the processor both accesses a first location in the memory region and may determine a condition is satisfied. In response, the processor generates an interrupt. The corresponding interrupt handler may transfer control flow from the computer program to instrumentation code. The condition may include a pointer storing an address pointing to locations within the memory region equals a given address after the point is updated. Alternatively, the condition may include an updated data value stored in a location pointed to by the given address equals a threshold value.

Abstract translation: 一种有效执行程序仪表的系统和方法。 处理器处理存储在存储器中的指令。 处理器为了在现有的存储器访问指令中的计算机代码中创建“随机分支”而分配存储器区域。 当处理器处理给定的指令时，处理器都访问存储器区域中的第一位置并且可以确定满足条件。 作为响应，处理器产生中断。 相应的中断处理程序可以将控制流程从计算机程序传送到仪表代码。 条件可以包括存储指向存储器区域内的位置的地址的指针等于点更新之后的给定地址。 或者，条件可以包括存储在由给定地址指向的位置的更新的数据值等于阈值。

公开(公告)号：US11061753B2

公开(公告)日：2021-07-13

申请号：US15940693

申请日：2018-03-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Dean A. Liberty ,  Vilas K. Sridharan ,  Michael T. Clark ,  Jelena Ilic ,  David S. Christie ,  James R. Williamson ,  Cristian Constantinescu

IPC: G06F11/07 ,  G06F9/48 ,  G06F9/455 ,  G06F9/30

Abstract: Systems, apparatuses, and methods for implementing a hardware enforcement mechanism to enable platform-specific firmware visibility into an error state ahead of the operating system are disclosed. A system includes at least one or more processor cores, control logic, a plurality of registers, platform-specific firmware, and an operating system (OS). The control logic allows the platform-specific firmware to decide if and when the error state is visible to the OS. In some cases, the platform-specific firmware blocks the OS from accessing the error state. In other cases, the platform-specific firmware allows the OS to access the error state such as when the OS needs to unmap a page. The control logic enables the platform-specific firmware, rather than the OS, to make decisions about the replacement of faulty components in the system.

公开(公告)号：US20150106604A1

公开(公告)日：2015-04-16

申请号：US14054345

申请日：2013-10-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Joseph L. Greathouse ,  David S. Christie

IPC: G06F9/30

CPC classification number: G06F11/3466 ,  G06F11/3409 ,  G06F11/348 ,  G06F11/3636 ,  G06F2201/865 ,  G06F2201/88

Abstract: A system and method for efficiently performing program instrumentation. A processor processes instructions stored in a memory. When the processor processes a given instruction of a given instruction type, the processor updates a corresponding performance counter. When the performance counter reaches a threshold, the processor generates an interrupt and compares a location of the given instruction with stored locations in a given list. If a match is not found, then the processor processes an instruction following the given instruction in the computer program without processing intermediate instrumentation code. If a match is found, then the processor processes instrumentation code. Regardless of whether or not the instrumentation code is processed, when control flow returns to the computer program, the corresponding performance counter is initialized with a random value.

Abstract translation: 一种有效执行程序仪表的系统和方法。 处理器处理存储在存储器中的指令。 当处理器处理给定指令类型的给定指令时，处理器更新相应的性能计数器。 当性能计数器达到阈值时，处理器产生中断，并将给定指令的位置与给定列表中存储的位置进行比较。 如果未找到匹配项，则处理器处理计算机程序中的给定指令之后的指令，而不处理中间的仪器代码。 如果找到匹配项，则处理器处理检测代码。 无论仪器代码是否被处理，当控制流程返回到计算机程序时，相应的性能计数器将以随机值初始化。

公开(公告)号：US20130103908A1

公开(公告)日：2013-04-25

申请号：US13714132

申请日：2012-12-13

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Jaewoong Chung ,  David S. Christie ,  Michael Hohmuth ,  Stephan Diestelhorst ,  Martin Pohlack ,  Luke Yen

IPC: G06F12/00

CPC classification number: G06F12/00 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3857

Abstract: A method and apparatus are disclosed for implementing early release of speculatively read data in a hardware transactional memory system. A processing core comprises a hardware transactional memory system configured to receive an early release indication for a specified word of a group of words in a read set of an active transaction. The early release indication comprises a request to remove the specified word from the read set. In response to the early release request, the processing core removes the group of words from the read set only after determining that no word in the group other than the specified word has been speculatively read during the active transaction.

Abstract translation: 公开了用于实现在硬件事务存储器系统中推测读取数据的早期释放的方法和装置。 处理核心包括硬件事务存储器系统，其被配置为接收活动事务的读取集合中的一组单词的指定字的早期释放指示。 早期释放指示包括从读取集中移除指定单词的请求。 响应于早期释放请求，处理核心仅在确定在活动事务期间没有推测性地读取除了指定单词之外的组中的任何单词之后才从读取集合中移除单词组。

公开(公告)号：US11954026B1

公开(公告)日：2024-04-09

申请号：US16572833

申请日：2019-09-17

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： David Kaplan ,  David S. Christie

IPC: G06F12/00 ,  G06F9/455 ,  G06F12/06 ,  G06F12/1009 ,  G06F13/00

CPC classification number: G06F12/0615 ,  G06F9/45558 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/151 ,  G06F2212/152

Abstract: A processing system includes a processor core for processing instructions and a memory that stores a page table set including an extended page table having an extended page table entry storing extended page table attributes associated with a physical memory page. The system receives a virtual address and translates the virtual address to a physical address for the physical memory page. One or more extended page attributes associated with the physical memory page are retrieved from the extended page table entry based on the virtual address.