公开(公告)号：US10984861B1

公开(公告)日：2021-04-20

申请号：US16032012

申请日：2018-07-10

Applicant: Adesto Technologies Corporation

Inventor： Ishai Naveh ,  Venkatesh P. Gopinath ,  John Dinh ,  Mark T. Ramsbey

IPC: G11C13/00

Abstract: A memory device can include a plurality of memory cells formed in a substrate, each having a resistive element programmable between at least two different resistance states, including memory cells configured to store data received by the memory device, and reference cells; a reference circuit formed in the substrate configured to generate at least a first reference resistance from resistances of a plurality of reference cells; a sense circuit formed in the substrate coupled to the memory cells and at least the first reference resistance and configured to compare a resistance of a selected memory cell to at least the first reference resistance to determine the data stored by the selected memory cell.

公开(公告)号：US20180205012A1

公开(公告)日：2018-07-19

申请号：US15746420

申请日：2016-07-20

Applicant: Adesto Technologies Corporation

Inventor： Mark T. Ramsbey ,  Venkatesh P. Gopinath ,  Jeffrey Allan Shields ,  Kuei Chang Tsai ,  Chakravarthy Gopalan ,  Michael A. Van Buskirk

IPC: H01L45/00 ,  H01L27/24 ,  H01L23/528 ,  H01L23/522 ,  G11C13/00

CPC classification number: H01L45/085 ,  G11C13/0011 ,  G11C13/0028 ,  G11C2213/71 ,  G11C2213/79 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253

Abstract: An integrated circuit device can include a plurality of access transistors formed in a substrate having control terminals connected to word lines that extend in a first direction; a plurality of two-terminal programmable impedance elements formed over the substrate; at least one conductive plate structure formed on and having a common conductive connection to, the programmable impedance elements, and extending in at least the first direction; a plurality of storage contacts that extend from a first current terminal of each access transistor to one of the programmable impedance elements; a plurality of bit lines formed over the at least one conductive plate structure, the bit lines extending in a second direction different from the first direction; and a plurality of bit line contacts that extend from a second current terminal of each access transistor through openings in the at least one plate structure to one of the bit lines.

公开(公告)号：US11056646B2

公开(公告)日：2021-07-06

申请号：US15746420

申请日：2016-07-20

Applicant: Adesto Technologies Corporation

Inventor： Mark T. Ramsbey ,  Venkatesh P. Gopinath ,  Jeffrey Allan Shields ,  Kuei Chang Tsai ,  Chakravarthy Gopalan ,  Michael A. Van Buskirk

IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24 ,  H01L23/522 ,  H01L23/528

Abstract: An integrated circuit device can include a plurality of access transistors formed in a substrate having control terminals connected to word lines that extend in a first direction; a plurality of two-terminal programmable impedance elements formed over the substrate; at least one conductive plate structure formed on and having a common conductive connection to, the programmable impedance elements, and extending in at least the first direction; a plurality of storage contacts that extend from a first current terminal of each access transistor to one of the programmable impedance elements; a plurality of bit lines formed over the at least one conductive plate structure, the bit lines extending in a second direction different from the first direction; and a plurality of bit line contacts that extend from a second current terminal of each access transistor through openings in the at least one plate structure to one of the bit lines.