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公开(公告)号:US11137689B2
公开(公告)日:2021-10-05
申请号:US16331538
申请日:2017-09-08
Applicant: ASML Netherlands B.V.
IPC: G03F7/20 , H01L21/027 , H01L23/00 , H01L21/768 , H01J37/317 , G06F30/392 , G06F30/394 , G06F119/18
Abstract: A method of creating electronic devices such as semiconductor chips using a maskless lithographic exposure system such as a charged particle multi-beamlet lithography system (301A-301D). The maskless lithographic exposure system comprises a lithography subsystem (316) including a maskless pattern writer such as a charged particle multi-beamlet lithography machine (1) or ebeam machine. The method comprises introducing unique chip design data (430) or information related thereto into pattern data comprising common chip design data before streaming the pattern data to the maskless pattern writer.
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公开(公告)号:US20200350259A1
公开(公告)日:2020-11-05
申请号:US16927805
申请日:2020-07-13
Applicant: ASML Netherlands B.V.
Inventor: Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/544 , G06K19/06 , G06F21/44 , G09C5/00 , G06F21/73 , H04L29/06 , G06K7/14 , H01L25/065 , H04L9/14 , H04L9/32
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non--common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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公开(公告)号:USRE48903E1
公开(公告)日:2022-01-25
申请号:US16281179
申请日:2019-02-21
Applicant: ASML Netherlands B.V.
Inventor: Vincent Sylvester Kuiper , Erwin Slot , Marcel Nicolaas Jacobus Van Kervinck , Guido De Boer , Hendrik Jan De Jong
IPC: G03F7/20 , H01L21/677 , H01L21/67 , G03B27/60 , G03B27/58
Abstract: An apparatus for transferring a target, such as a substrate or a substrate support structure onto which a substrate has been clamped, from a substrate transfer system to a vacuum chamber of a lithography system. The apparatus comprises a load lock chamber for transferring the target into and out of the vacuum chamber. The load lock chamber comprises a first wall with a first passage providing access between a robot space and the interior of the load lock chamber, a second wall with a second passage providing access between the interior of the load lock chamber and the vacuum chamber, and plurality of handling robots for transferring the targets comprising: a first handling robot movable within the robot space to access the substrate transfer system and the first passage; and a second handling robot movable within the load lock chamber to access the first passage and the second passage.
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公开(公告)号:US10600733B2
公开(公告)日:2020-03-24
申请号:US16572592
申请日:2019-09-16
Applicant: ASML Netherlands B.V.
IPC: H01L25/00 , H01L23/528 , G06F17/50 , H01L21/768 , G03F7/20 , H01L25/065 , H01L27/02 , H01L29/06 , H01L21/263 , H01L27/06
Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.
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公开(公告)号:US10522472B2
公开(公告)日:2019-12-31
申请号:US15444369
申请日:2017-02-28
Applicant: ASML Netherlands B.V.
Inventor: Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/00 , H01L23/544 , H04L29/06 , G06K7/14 , G06K19/06 , H01L25/065 , H04L9/14 , H04L9/32 , G06F21/44 , G06F21/73 , G09C5/00
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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公开(公告)号:USRE49952E1
公开(公告)日:2024-04-30
申请号:US16838976
申请日:2020-04-02
Applicant: ASML Netherlands B.V.
Inventor: Vincent Sylvester Kuiper , Erwin Slot
IPC: H01J37/317 , H01J37/09 , H01J37/30
CPC classification number: H01J37/3177 , H01J37/09 , H01J37/3007 , H01J2237/0435 , H01J2237/0453 , H01J2237/3175 , H01J2237/31774
Abstract: A sub-beam aperture array for forming a plurality of sub-beams from one or more charged particle beams. The sub-beam aperture array comprises one or more beam areas, each beam area comprising a plurality of sub-beam apertures arranged in a non-regular hexagonal pattern, the sub-beam apertures arranged so that, when projected in a first direction onto a line parallel to a second direction, the sub-beam apertures are uniformly spaced along the line, and wherein the first direction is different from the second direction. The system further comprises a beamlet aperture array with a plurality of beamlet apertures arranged in one or more groups. The beamlet aperture array is arranged to receive the sub-beams and form a plurality of beamlets at the locations of the beamlet apertures of the beamlet array.
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公开(公告)号:USRE49732E1
公开(公告)日:2023-11-21
申请号:US16427228
申请日:2019-05-30
Applicant: ASML Netherlands B.V.
Inventor: Paul IJmert Scheffers , Jan Andries Meijer , Erwin Slot , Vincent Sylvester Kuiper , Niels Vergeer
CPC classification number: H01J37/3045 , B82Y10/00 , B82Y40/00 , G03F7/707 , H01J2237/1502
Abstract: A multi-beamlet charged particle beamlet lithography system for transferring a pattern to a surface of a substrate. The system comprises a projection system (311) for projecting a plurality of charged particle beamlets (7) onto the surface of the substrate; a chuck (313) moveable with respect to the projection system; a beamlet measurement sensor (i.a. i.e., 505, 511) for determining one or more characteristics of one or more of the charged particle beamlets, the beamlet measurement sensor having a surface (501) for receiving one or more of the charged particle beamlets; and a position mark measurement system for measuring a position of a position mark (610, 620, 635), the position mark measurement system comprising an alignment sensor (361, 362). The chuck comprises a substrate support portion for supporting the substrate, a beamlet measurement sensor portion (460) for accommodating the surface of the beamlet measurement sensor, and a position mark portion (470) for accommodating the position mark.
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公开(公告)号:US11688694B2
公开(公告)日:2023-06-27
申请号:US16927805
申请日:2020-07-13
Applicant: ASML Netherlands B.V.
Inventor: Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/00 , H01L23/544 , G06K19/06 , G06F21/44 , G09C5/00 , G06F21/73 , H04L9/40 , G06K7/14 , H01L25/065 , H04L9/14 , H04L9/32
CPC classification number: H01L23/544 , G06F21/44 , G06F21/73 , G06K7/1417 , G06K19/06037 , G06K19/06178 , G09C5/00 , H01L25/0652 , H04L9/14 , H04L9/3271 , H04L63/08 , G06F2221/2103 , H01L2223/5444 , H01L2223/54413 , H01L2223/54433
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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公开(公告)号:US10714427B2
公开(公告)日:2020-07-14
申请号:US15444396
申请日:2017-02-28
Applicant: ASML Netherlands B.V.
Inventor: Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/00 , H01L23/544 , G06K19/06 , G06F21/44 , G09C5/00 , G06F21/73 , H04L29/06 , G06K7/14 , H01L25/065 , H04L9/14 , H04L9/32
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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公开(公告)号:US10418324B2
公开(公告)日:2019-09-17
申请号:US15389593
申请日:2016-12-23
Applicant: ASML Netherlands B.V.
IPC: H01L25/00 , H01L23/528 , G03F7/20 , G06F17/50 , H01L21/263 , H01L25/065 , H01L27/02 , H01L29/06 , H01L21/768 , H01L27/06
Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.
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