公开(公告)号：USD913980S1

公开(公告)日：2021-03-23

申请号：US29726623

申请日：2020-03-04

申请人： ASM IP Holding B.V.

设计人： Hak Joo Lee ,  Jeong Jun Woo ,  Jong Hyun Ahn ,  Yoon Ki Min

公开(公告)号：US20180315758A1

公开(公告)日：2018-11-01

申请号：US15951644

申请日：2018-04-12

申请人： ASM IP Holding B.V.

发明人： Tae Hee Yoo ,  Yoon Ki Min ,  Yong Min Yoo

IPC分类号： H01L27/105 ,  H01L21/48 ,  H01L21/768 ,  H01L21/762 ,  G11C8/14

摘要： A substrate processing method includes stacking a plurality of stack structures each including an insulating layer and a sacrificial layer, on one another. The method also includes generating a stair structure by etching the stack structures and generating a separation layer on a side surface of the stair structure. The method further includes removing the sacrificial layer and generating conductive word line structures in spaces from which the sacrificial layer is removed. The separation layer is provided between the conductive word line structures.

公开(公告)号：US20210035988A1

公开(公告)日：2021-02-04

申请号：US17072480

申请日：2020-10-16

申请人： ASM IP Holding B.V.

发明人： Tae Hee Yoo ,  Yoon Ki Min ,  Yong Min Yoo

IPC分类号： H01L27/1157 ,  H01L21/311 ,  H01L21/768 ,  H01L27/11524 ,  H01L21/02 ,  H01L27/11575 ,  H01L27/11548

摘要： Provided is a substrate processing method that may prevent the non-uniformity of the thickness of landing pads deposited on each step in a vertical NAND device having a stepped structure. The substrate processing method includes stacking, a plurality of times, a stack structure including an insulating layer and a sacrificial layer and etching the stack structure to form a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface. The method also includes forming a barrier layer on the stepped structure, forming a mask layer on the barrier layer and exposing at least a portion of the barrier layer by etching at least a portion of the mask layer with a first etching solution The method further includes etching the exposed barrier layer with a second etching solution and etching the mask layer with a third etching solution,

公开(公告)号：US20180301460A1

公开(公告)日：2018-10-18

申请号：US15951626

申请日：2018-04-12

申请人： ASM IP Holding B.V.

发明人： Tae Hee Yoo ,  Yoon Ki Min ,  Yong Min Yoo

IPC分类号： H01L27/1157 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11524 ,  H01L21/768 ,  H01L21/311

摘要： Provided is a substrate processing method that may prevent the non-uniformity of the thickness of landing pads deposited on each step in the process of selectively depositing a landing pad in a vertical NAND device having a stepped structure. The substrate processing method includes stacking, a plurality of times, a stack structure including an insulating layer and a sacrificial layer and etching the stack structure to form a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface. The method also includes forming a barrier layer on the stepped structure, forming a mask layer on the barrier layer and exposing at least a portion of the barrier layer by etching at least a portion of the mask layer with a first etching solution The method further includes etching the exposed barrier layer with a second etching solution and etching the mask layer with a third etching solution.

公开(公告)号：US11908733B2

公开(公告)日：2024-02-20

申请号：US17741401

申请日：2022-05-10

申请人： ASM IP Holding B.V.

发明人： Yoon Ki Min

IPC分类号： H01L27/11578 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L21/311 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

CPC分类号： H01L21/76826 ,  H01L21/31111 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5283 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

摘要： Provided are a substrate processing method and a device manufactured by using the same, which may improve etch selectivity of an insulating layer deposited on a stepped structure. The substrate processing method includes: forming a first layer on a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface; weakening at least a portion of the first layer; forming a second layer on the first layer; and performing an isotropic etching process on the first layer and the second layer.

公开(公告)号：US11361990B2

公开(公告)日：2022-06-14

申请号：US16421339

申请日：2019-05-23

申请人： ASM IP Holding B.V.

发明人： Yoon Ki Min

IPC分类号： H01L21/768 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528 ,  H01L21/311 ,  H01L27/11582

摘要： Provided are a substrate processing method and a device manufactured by using the same, which may improve etch selectivity of an insulating layer deposited on a stepped structure. The substrate processing method includes: forming a first layer on a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface; weakening at least a portion of the first layer; forming a second layer on the first layer; and performing an isotropic etching process on the first layer and the second layer.

公开(公告)号：US10134757B2

公开(公告)日：2018-11-20

申请号：US15640239

申请日：2017-06-30

申请人： ASM IP Holding B.V.

发明人： Seung Ju Chun ,  Yong Min Yoo ,  Jong Wan Choi ,  Young Jae Kim ,  Sun Ja Kim ,  Wan Gyu Lim ,  Yoon Ki Min ,  Hae Jin Lee ,  Tae Hee Yoo

IPC分类号： H01L27/115 ,  H01L21/311 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11556

摘要： A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.

公开(公告)号：US20180130701A1

公开(公告)日：2018-05-10

申请号：US15640239

申请日：2017-06-30

申请人： ASM IP Holding B.V.

发明人： Seung Ju Chun ,  Yong Min Yoo ,  Jong Wan Choi ,  Young Jae Kim ,  Sun Ja Kim ,  Wan Gyu Lim ,  Yoon Ki Min ,  Hae Jin Lee ,  Tae Hee Yoo

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L27/11582 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76829 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76892 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5329 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11575

摘要： A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.

公开(公告)号：US20220270920A1

公开(公告)日：2022-08-25

申请号：US17741401

申请日：2022-05-10

申请人： ASM IP Holding B.V.

发明人： Yoon Ki Min

IPC分类号： H01L21/768 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528 ,  H01L21/311 ,  H01L27/11582

摘要： Provided are a substrate processing method and a device manufactured by using the same, which may improve etch selectivity of an insulating layer deposited on a stepped structure. The substrate processing method includes: forming a first layer on a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface; weakening at least a portion of the first layer; forming a second layer on the first layer; and performing an isotropic etching process on the first layer and the second layer.

公开(公告)号：US11195845B2

公开(公告)日：2021-12-07

申请号：US17072480

申请日：2020-10-16

申请人： ASM IP Holding B.V.

发明人： Tae Hee Yoo ,  Yoon Ki Min ,  Yong Min Yoo

IPC分类号： H01L21/311 ,  H01L27/1157 ,  H01L21/768 ,  H01L27/11524 ,  H01L21/02 ,  H01L27/11575 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11582

摘要： Provided is a substrate processing method that may prevent the non-uniformity of the thickness of landing pads deposited on each step in a vertical NAND device having a stepped structure. The substrate processing method includes stacking, a plurality of times, a stack structure including an insulating layer and a sacrificial layer and etching the stack structure to form a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface. The method also includes forming a barrier layer on the stepped structure, forming a mask layer on the barrier layer and exposing at least a portion of the barrier layer by etching at least a portion of the mask layer with a first etching solution The method further includes etching the exposed barrier layer with a second etching solution and etching the mask layer with a third etching solution.