-
公开(公告)号：US5801867A
公开(公告)日：1998-09-01
申请号：US619851
申请日：1996-03-20
IPC分类号： H04B10/158 , H04L25/06 , H04B10/06
CPC分类号： H04L25/061 , H04B10/695
摘要： A dc-coupled receiver for a shared optical system includes an input feedback amplifier circuit which establishes a dc reference baseline voltage level for incoming packets of data. A pair of sample-and-hold circuits are connected in parallel to receive and sample signals from the feedback amplifier circuit when no data is being transmitted and at the initial edge of incoming packets of data. A voltage divider circuit receiving signals from the sample-and-hold circuits establishes a dc slicing level for each incoming packet of data. An output feedback circuit can be added to compensate for offset error without affecting the performance of the sample-and-hold circuitry.
摘要翻译： 用于共享光学系统的直流耦合接收器包括输入反馈放大器电路，其为输入的数据分组建立直流参考基准电压电平。 一对采样和保持电路并联连接，以便在没有数据传输和数据传入数据包的初始边缘时从反馈放大器电路接收和采样信号。 接收来自采样和保持电路的信号的分压器电路为每个输入的数据分组建立直流限幅电平。 可以添加输出反馈电路来补偿偏移误差，而不影响采样保持电路的性能。
-
公开(公告)号：US5412498A
公开(公告)日：1995-05-02
申请号：US677044
申请日：1991-03-29
IPC分类号： H03K5/08 , H04B10/158 , H04L7/04 , H04L25/06 , H04J14/08
CPC分类号： H04L25/062 , H03K5/084 , H04B10/695 , H04L7/046
摘要： A protocol for fiber-optic communication systems, or other communication systems based on transmission of unipolar pulses having wide dynamic range provides for information to be transmitted in packets having a predictable time slot for each transmitter. The receiver for such protocol has a first relatively long RC time constant mode conditioned for reception of data packets whose time of arrival is well predictable and a second relatively short RC time constant mode conditioned for reception of asynchronous randomly received packets. In the relatively long RC time constant mode, each packet includes a preamble having a first clamp interval in which no pulse is transmitted, and a second clamp interval in which a continual pulse is transmitted. A transducer on the receiver translates the packets of pulses into differential electronic signals on first and second outputs. First and second coupling capacitors, receive respective outputs of the transducer and AC couples the signals to respective second terminals of the capacitors. First and second switches connect the second terminals of the respective coupling capacitors to ground during the first and second clamping intervals, respectively, of the preamble. By clamping the outputs of the transducer to ground during the first and second clamping intervals, a DC level for each incoming packet is instantly established independent of the magnitude of the incoming packet. In the asynchronous mode, relatively low impedance discharge paths are established to reduce the time constant of the receiver. An output circuit, connected to the second terminal of each of the first and second coupling capacitors, supplies sequences of digital output signals in response to the differential signals.
摘要翻译： 用于光纤通信系统或基于具有宽动态范围的单极性脉冲的传输的其他通信系统的协议提供要在每个发射机具有可预测的时隙的分组中发送的信息。 用于这种协议的接收机具有第一相对较长的RC时间常数模式，用于接收其到达时间是可预测的数据分组，以及用于接收异步随机接收分组的第二相对较短的RC时间常数模式。 在相对长的RC时间常数模式中，每个分组包括具有其中没有脉冲被发送的第一钳位间隔的前同步码和其中发送连续脉冲的第二钳位间隔。 接收器上的换能器将第一和第二输出端的脉冲分组转换成差分电子信号。 第一和第二耦合电容器，接收换能器和AC的相应输出，将信号耦合到电容器的相应的第二端子。 分别在前导码的第一和第二钳位间隔期间，第一和第二开关将各个耦合电容器的第二端子接地。 通过在第一和第二钳位间隔期间将换能器的输出钳位到地，每个输入分组的DC电平立即被建立，而与输入分组的幅度无关。 在异步模式中，建立相对低阻抗的放电路径以减少接收机的时间常数。 连接到第一和第二耦合电容器中的每一个的第二端子的输出电路响应于差分信号而提供数字输出信号的序列。
-
公开(公告)号：US4272762A
公开(公告)日：1981-06-09
申请号：US75769
申请日：1979-09-17
IPC分类号： G08B13/183 , G08B13/18
CPC分类号： G08B13/183
摘要： Sensing apparatus for monitoring the passage of objects, including people, through a doorway. A source of radiant energy is positioned at one side of the doorway and two spaced-apart detectors are positioned at the opposite side to receive beams of radiant energy from the source. A receiver is connected to each detector and produces a signal indicating whether the beam of radiation from the source is impinging on its associated detector or is being blocked by a passing object. Logic circuitry responds to the signals from the receivers and produces a first or second output condition depending upon which beam from the source is the last one to be interrupted by a passing object. Output circuitry coupled to the logic circuitry produces a pulse at one output terminal on a transition from the first to the second output condition indicating passage of an object through the doorway in one direction and produces a pulse at another output terminal on a transition from the second to the first output condition indicating passage of an object through the doorway in the opposite direction.
摘要翻译： 用于监视物体（包括人）通过门口的传感装置。 辐射能量源位于门口的一侧，两个间隔开的检测器位于相对侧，以接收来自源的辐射能量束。 接收器连接到每个检测器并且产生一个信号，该信号指示来自源的辐射束是否撞击在其相关联的检测器上，或者被传递对象阻挡。 逻辑电路响应来自接收器的信号，并产生第一或第二输出条件，取决于来自源的哪个波束是被传递对象中断的最后一个波束。 耦合到逻辑电路的输出电路在从第一输出条件到第二输出条件的转变中在一个输出端产生脉冲，指示物体在一个方向上通过门口的通路，并且在另一个输出端产生从第二个 指示物体在相反方向通过门口的通道的第一输出条件。
-
公开(公告)号：US5208693A
公开(公告)日：1993-05-04
申请号：US677707
申请日：1991-03-29
IPC分类号： H03K5/08 , H04B10/158 , H04L25/06
CPC分类号： H03K5/084 , H04B10/695 , H04L25/062
摘要： A protocol for fiber-optic communication systems, or other communication systems based on transmission of unipolar pulses having wide dynamic range provides for information to be transmitted in packets having a predictable time slot for each transmitter. The receiver for such protocol has a first relatively long RC time constant mode conditioned for reception of data packets whose time of arrival is well predictable and a second relatively short RC time constant mode conditioned for reception of asynchronous randomly received packets. In the relatively long RC time constant mode, each packet includes a preamble having a first clamp interval in which no pulse is transmitted, and a second clamp interval in which a continual pulse is transmitted. A transducer on the receiver translates the packets of pulses into differential electronic signals on first and second outputs. First and second coupling capacitors, receive respective outputs of the transducer and AC couples the signals to respective second terminals of the capacitors. First and second switches connect the second terminals of the respective coupling capacitors to ground during the first and second clamping intervals, respectively, of the preamble. By clamping the outputs of the transducer to ground during the first and second clamping intervals, a DC level for each incoming packet is instantly established independent of the magnitude of the incoming packet. In the asynchronous mode, relatively low impedance discharge paths are established to reduce the time constant of the receiver. An output circuit, connected to the second terminal of each of the first and second coupling capacitors, supplies sequences of digital output signals in response to the differential signals.
摘要翻译： 用于光纤通信系统或基于具有宽动态范围的单极性脉冲的传输的其他通信系统的协议提供要在每个发射机具有可预测的时隙的分组中发送的信息。 用于这种协议的接收机具有第一相对较长的RC时间常数模式，用于接收其到达时间是可预测的数据分组，以及用于接收异步随机接收分组的第二相对较短的RC时间常数模式。 在相对长的RC时间常数模式中，每个分组包括具有其中没有脉冲被发送的第一钳位间隔的前同步码和其中发送连续脉冲的第二钳位间隔。 接收器上的换能器将第一和第二输出端的脉冲分组转换成差分电子信号。 第一和第二耦合电容器，接收换能器和AC的相应输出，将信号耦合到电容器的相应的第二端子。 分别在前导码的第一和第二钳位间隔期间，第一和第二开关将各个耦合电容器的第二端子接地。 通过在第一和第二钳位间隔期间将换能器的输出钳位到地，每个输入分组的DC电平立即被建立，而与输入分组的幅度无关。 在异步模式中，建立相对低阻抗的放电路径以减少接收机的时间常数。 连接到第一和第二耦合电容器中的每一个的第二端子的输出电路响应于差分信号而提供数字输出信号的序列。
-
公开(公告)号：US4458200A
公开(公告)日：1984-07-03
申请号：US438090
申请日：1982-11-01
申请人： William L. Geller
发明人： William L. Geller
CPC分类号： G05F3/30
摘要： Band gap voltage regulator employing a self-balancing bridge circuit for controlling current flow through two parallel branches. Voltage points in each branch are alternately sampled and applied to one input of a comparator in a delta modulator circuit. The output of the delta modulator circuit is applied to the other input of the comparator. The output of the comparator is applied to a control circuit which controls a current source in each of the two branches. The voltages at each voltage point are alternately compared with the voltage at the other input of the comparator, and the result is employed to control the current sources so that the voltages at both points are equalized despite any offset voltage in the comparator.
摘要翻译： 带隙稳压器采用自平衡桥式电路，用于控制通过两个并联支路的电流。 每个分支中的电压点被交替采样并施加到增量调制器电路中的比较器的一个输入端。 Δ调制器电路的输出被施加到比较器的另一个输入端。 比较器的输出被施加到控制两个分支中的每一个的电流源的控制电路。 每个电压点处的电压交替地与比较器的另一个输入端的电压进行比较，结果用于控制电流源，使得两个点的电压均衡，尽管比较器中有任何偏移电压。
-
公开(公告)号：US4408133A
公开(公告)日：1983-10-04
申请号：US249036
申请日：1981-03-30
IPC分类号： G01R19/165 , H03K3/356 , H03K5/153
CPC分类号： H03K3/356034 , G01R19/16519
摘要： A comparator circuit of one type, prior to this invention, had a reliability problem due to an undesirable conductive path, and had limited speed due to stray capacitances. Reliability is achieved through separate triodes for coupling an inverted storage pulse to a primary electrode of each of two triodes of a differential amplifier. Speed is achieved through coupling a transistor across the other primary electrodes of the differential amplifier, the transistor's gate electrode receiving a narrow pulse upon termination of the storage pulse.
摘要翻译： 在本发明之前的一种类型的比较器电路由于不期望的导电路径而具有可靠性问题，并且由于杂散电容而具有有限的速度。 通过单独的三极管实现可靠性，用于将反相存储脉冲耦合到差分放大器的两个三极管中的每一个的主电极。 通过将晶体管连接到差分放大器的其它主电极上来实现速度，晶体管的栅电极在存储脉冲终止时接收窄脉冲。
-
公开(公告)号：US4328434A
公开(公告)日：1982-05-04
申请号：US95136
申请日：1979-11-16
申请人： William L. Geller
发明人： William L. Geller
IPC分类号： G01R17/00 , G01R19/165 , H03K5/24 , H03K5/153
CPC分类号： H03K5/24 , G01R17/00 , G01R19/16519
摘要： A comparator circuit having offset correction circuitry for use in an analog-to-digital converter. The first input of the comparator circuit is periodically connected to ground. The second input of the comparator circuit is connected through a capacitance to ground. The offset voltage generated within the comparator circuit can be considered as being present at the first input. When the offset voltage at the first input is greater than the voltage at the second input a fixed increment of electrical charge is added to the capacitance. When it is less, a fixed increment of electrical charge is subtracted from the capacitance. Thus, increments of electrical charge are accumulated in the capacitance producing a compensating voltage thereacross to correct for the offset voltage.
摘要翻译： 具有用于模数转换器的偏移校正电路的比较器电路。 比较器电路的第一个输入周期性接地。 比较器电路的第二个输入端通过电容连接到地。 在比较器电路内产生的偏移电压可以被认为存在于第一输入端。 当第一输入端的偏移电压大于第二输入端的电压时，将固定的电荷增量加到电容上。 当它较少时，从电容中减去固定的电荷增量。 因此，在电容中积累电荷的增量，从而产生补偿电压，从而校正偏移电压。
-
公开(公告)号：US4307465A
公开(公告)日：1981-12-22
申请号：US84976
申请日：1979-10-15
申请人： William L. Geller
发明人： William L. Geller
CPC分类号： H04L27/063
摘要： Receiving apparatus for receiving and detecting binary encoded continuous wave RF signals. The binary signal is detected by a superregenerative detector. The detected signal and a DC reference voltage are applied to an amplifier which produces a signal corresponding to the detected signal but shifted to vary in amplitude about an axis at the DC reference voltage. The shifted signal and the DC reference voltage are applied to a comparator which produces an output signal at a predetermined voltage level when the shifted signal is greater than the DC reference voltage and at 0 volts when the shifted signal is less than the DC reference voltage. Thus a noise-free binary signal having sharply defined voltage transitions is obtained.
摘要翻译： 用于接收和检测二进制编码的连续波RF信号的接收装置。 二进制信号由超级再生检测器检测。 检测到的信号和直流参考电压被施加到放大器，该放大器产生对应于检测信号的信号，但移动以在直流参考电压下绕轴线的幅度变化。 移位信号和直流参考电压被施加到比较器，当比较信号大于直流参考电压时，比较器产生预定电压电平的输出信号，当移位信号小于直流参考电压时，输出信号为0伏特。 因此获得具有急剧定义的电压转换的无噪声二进制信号。
-
公开(公告)号：US4255701A
公开(公告)日：1981-03-10
申请号：US103021
申请日：1979-12-13
申请人： William L. Geller
发明人： William L. Geller
摘要： Variable phase shift apparatus employing two transistors having their bases connected together and their collectors connected together. The input terminal is coupled to the emitter of the first transistor. A phase control arrangement of a capacitance and a variable resistance in series is connected between the input terminal and ground. The juncture of the capacitance and the variable resistance is connected to the bases of both transistors. A phase control signal is present at this juncture. The collector current in the first transistor is in phase with the difference between the input signal and the phase control signal. The collector current in the second transistor is 180.degree. out of phase with the phase control signal. The two collector currents are combined by flowing through a common load resistance to produce an output signal which is the resultant of the collector currents in the two transistors. By decreasing the variable resistance the collector current in the first transistor is increased and that in the second transistor decreased. By increasing the variable resistance the collector current in the first transistor is decreased and that in the second transistor increased. Thus by varying the variable resistance the phase of the output signal with respect to the input signal can be varied between 0.degree. and 180.degree..
摘要翻译： 可变相移装置采用两个晶体管，其基极连接在一起，它们的集电极连接在一起。 输入端耦合到第一晶体管的发射极。 串联的电容和可变电阻的相位控制装置连接在输入端和地之间。 电容和可变电阻的关系连接到两个晶体管的基极。 在这个时刻存在相位控制信号。 第一晶体管中的集电极电流与输入信号和相位控制信号之间的差异同相。 第二晶体管中的集电极电流与相位控制信号相差180°。 通过流过公共负载电阻来组合两个集电极电流，以产生作为两个晶体管中的集电极电流的结果的输出信号。 通过减小可变电阻，第一晶体管中的集电极电流增加，而第二晶体管中的集电极电流减小。 通过增加可变电阻，第一晶体管中的集电极电流降低，而第二晶体管中的集电极电流增加。 因此，通过改变可变电阻，输出信号相对于输入信号的相位可以在0°和180°之间变化。
-
公开(公告)号：US4333104A
公开(公告)日：1982-06-01
申请号：US130944
申请日：1980-03-17
申请人： William L. Geller
发明人： William L. Geller
CPC分类号： H04N9/646
摘要： Color demodulating apparatus for a color television receiver. The chrominance signal is separated from other components of the composite video signal and sampled at the color subcarrier frequency to produce charges representative of the synchronously detected chrominance signal. The charges are applied to two CCD delay lines which introduce a delay differential at their outputs equal to the horizontal line period of the television receiver. The outputs of the CCD delay lines are combined in a summing network. Due to the interleaving principle present with standard NTSC signals the demodulated chrominance signals add and any unwanted high frequency luminance components cancel. The output of the summing network is lowpass filtered to produce a continuous color video signal which is free of cross-color effects.
摘要翻译： 彩色电视接收机的彩色解调装置。 色度信号与复合视频信号的其他分量分离，并以彩色副载波频率进行采样，以产生代表同步检测的色度信号的电荷。 电荷被施加到两个CCD延迟线，其在其输出处引入等于电视接收机的水平线周期的延迟差分。 CCD延迟线的输出在求和网络中组合。 由于与标准NTSC信号存在的交织原理，解调的色度信号增加，并且任何不需要的高频亮度分量被消除。 求和网络的输出被低通滤波，以产生没有跨色效果的连续彩色视频信号。
-
-
-
-
-
-
-
-
-
搜索结果
17 条记录 (耗时 0.016 秒)
