公开(公告)号：US08912661B2

公开(公告)日：2014-12-16

申请号：US12939524

申请日：2010-11-04

申请人： Scott McGrath ,  Jeffrey S. Leal ,  Ravi Shenoy ,  Loreto Cantillep ,  Simon McElrea ,  Suzette K. Pangrle

发明人： Scott McGrath ,  Jeffrey S. Leal ,  Ravi Shenoy ,  Loreto Cantillep ,  Simon McElrea ,  Suzette K. Pangrle

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L21/563 ,  H01L23/3121 ,  H01L23/49805 ,  H01L23/562 ,  H01L24/06 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24145 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00

摘要： Methods are disclosed for improving electrical interconnection in stacked die assemblies, and stacked die assemblies are disclosed having structural features formed by the methods. The resulting stacked die assemblies are characterized by having reduced electrical interconnect failure.

摘要翻译： 公开了用于改进堆叠模具组件中的电互连的方法，并且公开了具有通过该方法形成的结构特征的堆叠模具组件。 所得到的堆叠的模具组件的特征在于具有减小的电互连故障。

公开(公告)号：US20130049196A1

公开(公告)日：2013-02-28

申请号：US13216465

申请日：2011-08-24

申请人： Simon McElrea ,  Wael Zohni ,  Belgacem Haba

发明人： Simon McElrea ,  Wael Zohni ,  Belgacem Haba

IPC分类号： H01L23/488 ,  H01L23/48

CPC分类号： H01L24/73 ,  H01L21/486 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic package includes a subassembly, a second substrate, and a monolithic encapsulant. The subassembly includes a first substrate that has at least one aperture, a coefficient of thermal expansion (CTE) of eight parts per million per degree Celsius or less, and first and second contacts arranged so as to have a pitch of 200 microns or less. First and second microelectronic elements are respectively electrically connected to the first and second contacts. Wire bonds may be used to connect the second element contacts with the second contacts. A second substrate may underlie either the first or the second microelectronic elements and be electrically interconnected with the first substrate. The second substrate may have terminals configured for electrical connection to a component external to the microelectronic package. A monolithic encapsulant may contact the first and second microelectronic elements and the first and second substrates.

摘要翻译： 微电子封装包括子组件，第二衬底和整体式密封剂。 子组件包括具有至少一个孔的第一衬底，每摄氏度或更低的百万分之八的热膨胀系数（CTE）以及布置成具有200微米或更小的间距的第一和第二接触。 第一和第二微电子元件分别电连接到第一和第二触点。 引线键可用于将第二元件触点与第二触点连接。 第二衬底可以位于第一或第二微电子元件之下，并且与第一衬底电互连。 第二基板可以具有被配置为电连接到微电子封装外部的部件的端子。 单片密封剂可以接触第一和第二微电子元件以及第一和第二基板。

公开(公告)号：US06607939B2

公开(公告)日：2003-08-19

申请号：US10028261

申请日：2001-12-18

申请人： Richard Pommer ,  Simon McElrea ,  Brad Banister

发明人： Richard Pommer ,  Simon McElrea ,  Brad Banister

IPC分类号： H01L2144

CPC分类号： H01L22/20 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L23/5383 ,  H01L23/5385 ,  H01L2924/0002 ,  H01L2924/014 ,  H05K1/0268 ,  H05K1/142 ,  H05K3/0097 ,  H05K3/225 ,  H05K3/4611 ,  H05K2201/10598 ,  H05K2203/0165 ,  Y10T29/49126 ,  H01L2924/00

摘要： Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.

摘要翻译： 在高密度互连（HDI）生产中提高产量的方法和装置。 特别地，其中测试面板以识别良好的细胞/部分的方法，从面板中去除良好的细胞，并且完全由识别的/已知的良好细胞产生的新的面板允许增加在HDI中使用的层数，而不会导致减少 通常与这样的分层过程相关联。

公开(公告)号：US08872318B2

公开(公告)日：2014-10-28

申请号：US13216465

申请日：2011-08-24

申请人： Simon McElrea ,  Wael Zohni ,  Belgacem Haba

发明人： Simon McElrea ,  Wael Zohni ,  Belgacem Haba

IPC分类号： H01L23/48 ,  H01L29/40 ,  H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L23/13 ,  H01L23/00

CPC分类号： H01L24/73 ,  H01L21/486 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic package includes a subassembly, a second substrate, and a monolithic encapsulant. The subassembly includes a first substrate that has at least one aperture, a coefficient of thermal expansion (CTE) of eight parts per million per degree Celsius or less, and first and second contacts arranged so as to have a pitch of 200 microns or less. First and second microelectronic elements are respectively electrically connected to the first and second contacts. Wire bonds may be used to connect the second element contacts with the second contacts. A second substrate may underlie either the first or the second microelectronic elements and be electrically interconnected with the first substrate. The second substrate may have terminals configured for electrical connection to a component external to the microelectronic package. A monolithic encapsulant may contact the first and second microelectronic elements and the first and second substrates.

摘要翻译： 微电子封装包括子组件，第二衬底和整体式密封剂。 子组件包括具有至少一个孔的第一衬底，每摄氏度或更低的百万分之八的热膨胀系数（CTE）以及布置成具有200微米或更小的间距的第一和第二接触。 第一和第二微电子元件分别电连接到第一和第二触点。 引线键可用于将第二元件触点与第二触点连接。 第二衬底可以位于第一或第二微电子元件之下，并且与第一衬底电互连。 第二基板可以具有被配置为电连接到微电子封装外部的部件的端子。 单片密封剂可以接触第一和第二微电子元件以及第一和第二基板。

公开(公告)号：US06388325B2

公开(公告)日：2002-05-14

申请号：US09432200

申请日：1999-11-02

申请人： Richard Pommer ,  Simon McElrea ,  Brad Banister

发明人： Richard Pommer ,  Simon McElrea ,  Brad Banister

IPC分类号： H01L2348

CPC分类号： H01L22/20 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L23/5383 ,  H01L23/5385 ,  H01L2924/0002 ,  H01L2924/014 ,  H05K1/0268 ,  H05K1/142 ,  H05K3/0097 ,  H05K3/225 ,  H05K3/4611 ,  H05K2201/10598 ,  H05K2203/0165 ,  Y10T29/49126 ,  H01L2924/00

摘要： Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.