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公开(公告)号：US20160133832A1
公开(公告)日：2016-05-12
申请号：US14979445
申请日：2015-12-27
Inventor： Yimin Guo
CPC classification number: H01L43/12 , G11C11/00 , G11C11/16 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01L27/228 , H01L43/02 , H01L43/08
Abstract: A planar STT-MRAM includes apparatus, made by a method of operating and a method of manufacturing a spin-torque magnetoresistive memory and a plurality of magnetoresistive memory element having a ferromagnetic recording layer forming a flux closure with a self-aligned ferromagnetic soft adjacent layer which has an electric field enhanced perpendicular anisotropy through an interface interaction with a dielectric functional layer. The energy switch barrier of the soft adjacent layer is reduced under an electric field along a perpendicular direction with a proper voltage on a digital line from a control circuitry; accordingly, the in-plane magnetization of the recording layer is readily reversible in a low spin-transfer switching current.
Abstract translation: 平面STT-MRAM包括通过操作方法制造的装置和制造自旋转矩磁阻存储器的方法以及具有铁磁记录层的多个磁阻存储元件，所述铁磁记录层形成具有自对准铁磁软相邻层的磁通闭合 其通过与介电功能层的界面相互作用而具有增强的垂直各向异性的电场。 柔性相邻层的能量开关势垒沿着垂直方向的电场在来自控制电路的数字线上具有适当的电压而减小; 因此，记录层的平面内磁化在低自旋转移开关电流中容易可逆。
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Patent Agency Ranking
公开(公告)号：US20220059758A1
公开(公告)日：2022-02-24
申请号：US15412076
申请日：2017-01-23
Inventor： Yimin Guo , Rongfu Xiao , Jun Chen
IPC: H01L43/12
Abstract: The invention disclosed a method to make hard mask with ultra-small dimensions for fabricating integrated nonvolatile random access memory, for example, a magnetic-random-access memory (MRAM), a resistance random access memory (RRAM), a phase change random access memory (PCRAM), or a ferroelectric random access memory (FRAM). Instead of directly depositing hard mask material on top of the memory film stack element, we first make ultra-small VIA holes on a pattern transfer molding (PTM) layer using a reverse memory mask, then fill in the hard mask material into the VIA holes within the PTM material. Ultra-small hard mask pillars are formed after removing the PTM material. To improve the adhesion of the hard mask pillars with the underneath memory stack element, a hard mask sustaining (HMS) layer is added below PTM. Using PTM as the mask, array of HM ditches are first formed in the HMS layer to implant a hard mask seed in it before filling the main portion of the hard mask in the PTM VIAs. For a better formation of the HMS ditches, an etching stop layer can be used below the HMS layer to allow some over-etch of the HMS without punching into the memory film stack. Due to a better materials adhesion between HMS and the hard mask, a stronger hard mask array can be formed.
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3.发明申请公开(公告)号：US20160149124A1
公开(公告)日：2016-05-26
申请号：US15012130
申请日：2016-02-01
Inventor： Yimin Guo
CPC classification number: H01L43/14 , G11C11/1675 , G11C11/18 , H01L27/228 , H01L43/04 , H01L43/08 , H01L43/12
Abstract: Present invention includes an apparatus of and method of making a spin-transfer-torque magnetoresistive memory with three terminal magnetoresistive memory element(s) having highly conductive bottom electrodes overlaid on top of a SHE-metal layer in the regions outside of an MTJ stack. The memory cell has a bit line positioned adjacent to selected ones of the plurality of magnetoresistive memory elements to supply a reading current across the magnetoresistive element stack and two highly conductive bottom electrodes overlaid and electrically contacting on top of a SHE-metal layer in the outside of an MTJ region and to supply a bi-directional spin Hall effect recording current, and accordingly to switch the magnetization of the recording layer. Thus magnetization of a recording layer can be readily switched or reversed to the direction in accordance with a direction of a current along the SHE-metal layer by applying a low write current.
Abstract translation: 本发明包括一种制造具有三个端子磁阻存储元件的自旋转移 - 转矩磁阻存储器的装置和方法，该三端子磁阻存储元件在MTJ堆叠之外的区域中覆盖在SHE-金属层的顶部上。 存储单元具有与多个磁阻存储元件中的选定的磁阻存储元件相邻的位线，以提供跨磁阻元件堆叠的读取电流，并且两个高度导电的底部电极重叠并电接触外部的SHE-金属层的顶部 并提供双向旋转霍尔效应记录电流，并因此切换记录层的磁化。 因此，通过施加低写入电流，记录层的磁化可以容易地根据沿着SHE-金属层的电流的方向切换或反向。
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公开(公告)号：US20180033957A1
公开(公告)日：2018-02-01
申请号：US15219286
申请日：2016-07-26
Inventor： Yun Sen Zhang , Rongfu Xiao , Yimin Guo , Jun Chen
CPC classification number: H01L43/12
Abstract: This invention is about a method to make magnetic random access memory with small footprint directly on CMOS VIA with a self-aligned etching process. The process schemes of the method proceeds as: (1) Etch MTJ and BE using one or more of RIE and/or IBE processes with Ta as hard mask; (2) Etch BE using one or more of RIE and/or IBE processes with Ta & sidewall protection layer on MTJ as hard mask; and (3) Etch a part of MTJ and BE using one or more of RIE and/or IBE processes with Ta & sidewall protection layer on top portion of MTJ as hard mask. All the three schemes lead the BE to be self-aligned to MTJ cells, the photo overlay margin is not necessary and circuits could be made extremely small with lower manufacturing cost; The invention also provides schemes to prevent the electrical shorting across the tunnel barrier layer. Through trimming and sidewall protection deposition process, device performance and electrical/magnetic properties could be greatly improved.
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公开(公告)号：US09666793B2
公开(公告)日：2017-05-30
申请号：US14979445
申请日：2015-12-27
Inventor： Yimin Guo
CPC classification number: H01L43/12 , G11C11/00 , G11C11/16 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01L27/228 , H01L43/02 , H01L43/08
Abstract: A planar STT-MRAM includes apparatus, made by a method of operating and a method of manufacturing a spin-torque magnetoresistive memory and a plurality of magnetoresistive memory element having a ferromagnetic recording layer forming a flux closure with a self-aligned ferromagnetic soft adjacent layer which has an electric field enhanced perpendicular anisotropy through an interface interaction with a dielectric functional layer. The energy switch barrier of the soft adjacent layer is reduced under an electric field along a perpendicular direction with a proper voltage on a digital line from a control circuitry; accordingly, the in-plane magnetization of the recording layer is readily reversible in a low spin-transfer switching current.
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公开(公告)号：US20160126288A1
公开(公告)日：2016-05-05
申请号：US14994166
申请日：2016-01-13
Inventor： Yimin Guo
CPC classification number: H01L27/222 , G11C11/161 , H01L27/228 , H01L43/02 , H01L43/08 , H01L43/10 , H01L43/12
Abstract: A STT-MRAM comprises apparatus and a method of manufacturing a plurality of magnetoresistive memory element having a dielectric thermal buffer layer between a thin top electrode of the MTJ element and a bit line, and a bit-line VIA electrically connecting the top electrode and the bit line having a vertical distance away from the location of the MTJ stack. In a laser thermal annealing, a short wavelength of a laser has a shallow thermal penetration depth and a high thermal resistance from the bit line to the MTJ stack only causes a temperature rise of the MTJ stack being much smaller than that of the bit line. As the temperature of the MTJ element during the laser thermal annealing of bit line copper layer is controlled under 300-degree C., possible damages on MTJ and magnetic property can be avoided.
Abstract translation: STT-MRAM包括在MTJ元件的薄上电极和位线之间具有介电热缓冲层的多个磁阻存储元件的制造装置和方法，以及电连接顶电极和 位线距离MTJ堆叠的位置具有垂直距离。 在激光热退火中，短波长的激光器具有浅的热穿透深度，并且从位线到MTJ堆叠的高热阻仅导致MTJ堆叠的温度升高远小于位线的温度升高。 由于位线铜层的激光热退火期间的MTJ元件的温度控制在300℃以下，可以避免对MTJ和磁性的损害。
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