公开(公告)号：US09583638B2

公开(公告)日：2017-02-28

申请号：US12923241

申请日：2010-09-10

申请人： Sun-il Kim ,  Sang-wook Kim ,  Jae-chul Park ,  Chang-jung Kim

发明人： Sun-il Kim ,  Sang-wook Kim ,  Jae-chul Park ,  Chang-jung Kim

IPC分类号： H01L29/10 ,  H01L29/786

CPC分类号： H01L29/78696 ,  H01L29/7869

摘要： A transistor, a method of manufacturing a transistor, and an electronic device including a transistor are provided, the transistor may include a channel layer having a multi-layer structure. The channel layer may have a double layer structure or a triple layer structure. At least two layers of the channel layer may have different oxygen concentrations.

摘要翻译： 提供晶体管，制造晶体管的方法和包括晶体管的电子器件，所述晶体管可以包括具有多层结构的沟道层。 沟道层可以具有双层结构或三层结构。 至少两层通道层可能具有不同的氧浓度。

公开(公告)号：US09165211B2

公开(公告)日：2015-10-20

申请号：US13251782

申请日：2011-10-03

申请人： Seon Min Rhee ,  Yong Beom Lee ,  Sang Wook Kim

发明人： Seon Min Rhee ,  Yong Beom Lee ,  Sang Wook Kim

IPC分类号： G06K9/00 ,  G06K9/46

CPC分类号： G06K9/4671 ,  G06K9/00201

摘要： Provided is an image processing apparatus for extracting a three-dimensional (3D) feature point from a depth image. An input processing unit may receive a depth image and may receive, via a user interface, selection information of at least one region that is selected as a target region in the depth image. A geometry information analyzer of the image processing apparatus may analyze geometry information of the target region within the input depth image, and a feature point extractor may extract at least one feature point from the target region based on the geometry information of the target region.

摘要翻译： 提供了一种用于从深度图像提取三维（3D）特征点的图像处理装置。 输入处理单元可以接收深度图像，并且可以经由用户界面接收在深度图像中被选择为目标区域的至少一个区域的选择信息。 图像处理装置的几何信息分析器可以分析输入深度图像内的目标区域的几何信息，并且特征点提取器可以基于目标区域的几何信息从目标区域提取至少一个特征点。

公开(公告)号：US08938276B2

公开(公告)日：2015-01-20

申请号：US12560343

申请日：2009-09-15

申请人： Woo-Young Kwak ,  Sang-Wook Kim

发明人： Woo-Young Kwak ,  Sang-Wook Kim

IPC分类号： H04M1/00 ,  H04M1/02 ,  G06F1/16 ,  H04M1/23

CPC分类号： H04M1/0237 ,  G06F1/1624 ,  G06F1/1671 ,  G06F1/1677 ,  G06F2200/1614 ,  H04M1/0245 ,  H04M1/23

摘要： A mobile terminal comprises a body comprising a keypad and a slider slidingly coupled to the body. The slider is configured to slide transversely with respect to the body and may comprise a display unit to display image information. The mobile terminal may further comprise a processor coupled to the slider to detect when the slider is slid from a first position to a second position and when the slider is slid from a second position to a first position. The image information may be rotated 90 degrees from a transverse orientation to a longitudinal orientation when the processor detects that the slider has been slid from the first position to the second position. Conversely, the image information may be rotated 90 degrees from a longitudinal orientation to a transverse orientation when the processor detects that the slider has been slid from the second position to the first position.

公开(公告)号：US08932947B1

公开(公告)日：2015-01-13

申请号：US13948269

申请日：2013-07-23

申请人： Joo Won Han ,  Kee Young Cho ,  Han Soo Cho ,  Sang Wook Kim ,  Anisul H. Khan

发明人： Joo Won Han ,  Kee Young Cho ,  Han Soo Cho ,  Sang Wook Kim ,  Anisul H. Khan

IPC分类号： H01L21/302 ,  H01L21/762 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3065

CPC分类号： H01L21/3065 ,  H01J37/32082 ,  H01J2237/3347 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/67109 ,  H01L21/6831 ,  H01L21/76224 ,  H01L21/76898 ,  H01L29/66621

摘要： Embodiments of the present invention provide methods to etching a recess channel in a semiconductor substrate, for example, a silicon containing material. In one embodiment, a method of forming a recess structure in a semiconductor substrate includes transferring a silicon substrate into a processing chamber having a patterned photoresist layer disposed thereon exposing a portion of the substrate, providing an etching gas mixture including a halogen containing gas and a Cl2 gas into the processing chamber, supplying a RF source power to form a plasma from the etching gas mixture, supplying a pulsed RF bias power in the etching gas mixture, and etching the portion of the silicon substrate exposed through the patterned photoresist layer in the presence of the plasma.

摘要翻译： 本发明的实施例提供了蚀刻半导体衬底（例如含硅材料）中的凹槽通道的方法。 在一个实施例中，在半导体衬底中形成凹陷结构的方法包括将硅衬底转移到其中设置有图案化光致抗蚀剂层的处理室中，暴露一部分衬底，提供包含含卤素气体和 Cl 2气体进入处理室，提供RF源功率以从蚀刻气体混合物形成等离子体，在蚀刻气体混合物中提供脉冲RF偏置功率，以及蚀刻通过图案化光致抗蚀剂层暴露的硅衬底的部分， 存在等离子体。

公开(公告)号：US08669551B2

公开(公告)日：2014-03-11

申请号：US12289252

申请日：2008-10-23

申请人： Sun-il Kim ,  Young-soo Park ,  I-hun Song ,  Chang-jung Kim ,  Jae-chul Park ,  Sang-wook Kim

发明人： Sun-il Kim ,  Young-soo Park ,  I-hun Song ,  Chang-jung Kim ,  Jae-chul Park ,  Sang-wook Kim

IPC分类号： H01L29/10 ,  H01L29/12

CPC分类号： H01L29/7869

摘要： A transistor according to example embodiments may include a channel layer, a source and a drain respectively contacting ends of the channel layer, a gate electrode separated from the channel layer, a gate insulating layer interposed between the channel layer and the gate electrode, and/or an insertion layer that is formed between the channel layer and the gate insulating layer. The insertion layer may have a work function different from that of the channel layer.

摘要翻译： 根据示例实施例的晶体管可以包括沟道层，分别接触沟道层的端部的源极和漏极，与沟道层分离的栅电极，介于沟道层和栅电极之间的栅极绝缘层和/ 或形成在沟道层和栅极绝缘层之间的插入层。 插入层可以具有与沟道层不同的功函数。

公开(公告)号：US08547719B2

公开(公告)日：2013-10-01

申请号：US12588275

申请日：2009-10-09

申请人： Jae-chul Park ,  Kee-won Kwon ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

发明人： Jae-chul Park ,  Kee-won Kwon ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

IPC分类号： G11C5/02

CPC分类号： G11C5/02 ,  G11C5/143 ,  G11C7/18 ,  G11C8/12 ,  G11C13/0023 ,  G11C2213/71

摘要： A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit.

摘要翻译： 堆叠存储器件包括多个存储器层，其中多个存储器层中的至少一个堆叠在多个存储器层中的另一个上，并且每个存储器层包括存储器单元阵列，第一有源电路单元配置 将至少一个存储器单元的地址信息分类并处理为垂直地址信息和水平地址信息，以及至少一个第二有源电路单元，配置为基于处理的信号为存储器单元中的至少一个生成存储器选择信号 由第一有源电路单元。

公开(公告)号：US08482108B2

公开(公告)日：2013-07-09

申请号：US13109435

申请日：2011-05-17

申请人： Jae-chul Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

发明人： Jae-chul Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

IPC分类号： H01L31/115

CPC分类号： H01L27/14676 ,  H01L23/481 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14659 ,  H01L27/14661 ,  H01L27/1469 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227

摘要： A wafer-scale x-ray detector and a method of manufacturing the same are provided. The wafer-scale x-ray detector includes: a seamless silicon substrate electrically connected to a printed circuit substrate; a chip array having a plurality of pixel pads formed on a central region thereof and a plurality of pin pads formed at edges thereof on the seamless silicon substrate; a plurality of pixel electrodes formed to correspond to the pixel pads; vertical wirings and horizontal wirings formed to compensate a difference of regions expanded towards the pixel electrodes from the pixel pads between the chip array and the pixel electrodes; a redistribution layer having an insulating layer to separate the vertical wirings and the horizontal wirings; and a photoconductor layer and a common electrode which cover the pixel electrodes on the redistribution layer.

摘要翻译： 提供了晶片级X射线检测器及其制造方法。 晶片级x射线检测器包括：电连接到印刷电路衬底的无缝硅衬底; 芯片阵列，其具有形成在其中心区域上的多个像素焊盘和在其无端硅衬底上的边缘处形成的多个焊盘; 形成为对应于所述像素焊盘的多个像素电极; 垂直布线和水平布线形成以补偿从芯片阵列和像素电极之间的像素焊盘向像素电极扩展的区域的差异; 再分布层，具有用于分离垂直布线和水平布线的绝缘层; 以及覆盖再分布层上的像素电极的感光体层和公共电极。

公开(公告)号：US08461597B2

公开(公告)日：2013-06-11

申请号：US12805648

申请日：2010-08-11

申请人： Sun-il Kim ,  Jae-chul Park ,  Sang-wook Kim ,  Young-soo Park ,  Chang-jung Kim

发明人： Sun-il Kim ,  Jae-chul Park ,  Sang-wook Kim ,  Young-soo Park ,  Chang-jung Kim

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969 ,  H01L29/78606

摘要： Transistors, methods of manufacturing a transistor, and electronic devices including a transistor are provided, the transistor includes a channel layer, a source and a drain respectively contacting opposing ends of the channel layer, a gate corresponding to the channel layer, a gate insulating layer between the channel layer and the gate, and a first passivation layer and a second passivation layer sequentially disposed on the gate insulating layer. The first passivation layer covers the source, the drain, the gate, the gate insulating layer and the channel layer. The second passivation layer includes fluorine (F).

摘要翻译： 提供晶体管，制造晶体管的方法和包括晶体管的电子器件，晶体管包括沟道层，分别接触沟道层的相对端的源极和漏极，对应于沟道层的栅极，栅极绝缘层 在沟道层和栅极之间，以及顺序地设置在栅极绝缘层上的第一钝化层和第二钝化层。 第一钝化层覆盖源极，漏极，栅极，栅极绝缘层和沟道层。 第二钝化层包括氟（F）。

公开(公告)号：US08426852B2

公开(公告)日：2013-04-23

申请号：US12923089

申请日：2010-09-01

申请人： Jae-cheol Lee ,  Chang-seung Lee ,  Jae-gwan Chung ,  Eun-ha Lee ,  Anass Benayad ,  Sang-wook Kim ,  Se-jung Oh

发明人： Jae-cheol Lee ,  Chang-seung Lee ,  Jae-gwan Chung ,  Eun-ha Lee ,  Anass Benayad ,  Sang-wook Kim ,  Se-jung Oh

IPC分类号： H01L29/12

CPC分类号： H01L29/78606 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： Transistors and electronic apparatuses including the same are provided, the transistors include a channel layer on a substrate. The channel layer includes a zinc (Zn)-containing oxide. The transistors include a source and a drain, respectively, contacting opposing ends of the channel layer, a gate corresponding to the channel layer, and a gate insulating layer insulating the channel layer from the gate. The channel layer has a first surface adjacent to the substrate, a second surface facing the first surface, and a channel layer-protection portion on the second surface. The channel layer-protection portion includes a fluoride material.

摘要翻译： 提供了包括它们的晶体管和电子设备，晶体管包括在衬底上的沟道层。 沟道层包括含锌（Zn）的氧化物。 晶体管分别包括与沟道层的相对端接触的源极和漏极，对应于沟道层的栅极以及将沟道层与栅极绝缘的栅极绝缘层。 沟道层具有与基板相邻的第一表面，与第一表面相对的第二表面和在第二表面上的沟道层保护部分。 沟道层保护部分包括氟化物材料。

公开(公告)号：US08392854B2

公开(公告)日：2013-03-05

申请号：US13084143

申请日：2011-04-11

申请人： Sang-wook Kim ,  Chun-suk Suh ,  Seong-woon Choi ,  Jung-hoon Ser ,  Moon-gyu Jeong ,  Seong-bo Shim

发明人： Sang-wook Kim ,  Chun-suk Suh ,  Seong-woon Choi ,  Jung-hoon Ser ,  Moon-gyu Jeong ,  Seong-bo Shim

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F2217/12 ,  Y02P90/265

摘要： A method of manufacturing a semiconductor device includes dividing a design pattern layout into a repetitive pattern part and a non-repetitive pattern part, obtaining an optical proximity correction (OPC) bias from an extracted portion, the extracted portion being a partial portion of the repetitive pattern part, applying the OPC bias obtained from the extracted portion equally to the extracted portion and other portions of the repetitive pattern part so as to form a first corrected layout in which corrected layouts of the other portions are the same as that of the extracted portion, and forming a photomask in all portions of the repetitive pattern part according to the first corrected layout.

摘要翻译： 一种制造半导体器件的方法包括将设计图案布局划分为重复图案部分和非重复图案部分，从提取部分获得光学邻近校正（OPC）偏压，提取部分是重复的部分部分 将从所提取的部分获得的OPC偏差平均地应用于提取部分和重复图案部分的其他部分，以便形成第一校正布局，其中其他部分的校正布局与提取部分的校正布局相同 并且根据第一校正布局在重复图案部分的所有部分中形成光掩模。