公开(公告)号：US20160132335A1

公开(公告)日：2016-05-12

申请号：US14998272

申请日：2015-12-26

申请人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  IIhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

发明人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  IIhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

IPC分类号： G06F9/30 ,  G06F13/42 ,  G06F13/40 ,  G06F12/08 ,  G06F13/16

CPC分类号： G06F9/3855 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30087 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/3016 ,  G06F9/3802 ,  G06F9/3834 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3859 ,  G06F9/3861 ,  G06F9/467 ,  G06F9/528 ,  G06F12/0806 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/1045 ,  G06F13/1673 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2212/452 ,  G06F2212/50 ,  G06F2212/60 ,  G06F2212/602 ,  G06F2212/621 ,  G06F2212/68 ,  G06F2212/682

摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

公开(公告)号：US20160132333A1

公开(公告)日：2016-05-12

申请号：US14998248

申请日：2015-12-26

申请人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

发明人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

IPC分类号： G06F9/30 ,  G06F13/40 ,  G06F12/08 ,  G06F13/16

CPC分类号： G06F9/3855 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30087 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/3016 ,  G06F9/3802 ,  G06F9/3834 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3859 ,  G06F9/3861 ,  G06F9/467 ,  G06F9/528 ,  G06F12/0806 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/1045 ,  G06F13/1673 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2212/452 ,  G06F2212/50 ,  G06F2212/60 ,  G06F2212/602 ,  G06F2212/621 ,  G06F2212/68 ,  G06F2212/682

摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

摘要翻译： 本文描述了一种用于提供鲁棒的推测代码部分中止控制机制的装置和方法。 硬件能够跟踪推测性代码区域中止事件，条件和/或场景，例如显式中止指令，数据冲突，推测定时器到期，不允许的指令属性或类型等。硬件，固件，软件， 或其组合基于跟踪的中止事件进行中止判定。 作为示例，硬件可以基于一个或多个预定义事件进行初始中止确定，或者选择将事件信息传递到固件或软件处理程序以进行这种中止确定。 在确定要执行推测代码区域的中止时，硬件，固件，软件或其组合执行中止，其可以包括跟随由硬件或软件指定的回退路径。 并且为了能够测试这样的回退路径，在一个实现中，硬件为软件提供一种总是中止推测代码区域的机制。

公开(公告)号：US20140059333A1

公开(公告)日：2014-02-27

申请号：US13997248

申请日：2012-02-02

申请人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

发明人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

IPC分类号： G06F9/30

CPC分类号： G06F9/3855 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30087 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/3016 ,  G06F9/3802 ,  G06F9/3834 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3859 ,  G06F9/3861 ,  G06F9/467 ,  G06F9/528 ,  G06F12/0806 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/1045 ,  G06F13/1673 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2212/452 ,  G06F2212/50 ,  G06F2212/60 ,  G06F2212/602 ,  G06F2212/621 ,  G06F2212/68 ,  G06F2212/682

摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

摘要翻译： 本文描述了一种用于提供鲁棒的推测代码部分中止控制机制的装置和方法。 硬件能够跟踪推测性代码区域中止事件，条件和/或场景，例如显式中止指令，数据冲突，推测定时器到期，不允许的指令属性或类型等。硬件，固件，软件， 或其组合基于跟踪的中止事件进行中止判定。 作为示例，硬件可以基于一个或多个预定义事件进行初始中止确定，或者选择将事件信息传递到固件或软件处理程序以进行这种中止确定。 在确定要执行推测代码区域的中止时，硬件，固件，软件或其组合执行中止，其可以包括遵循由硬件或软件指定的回退路径。 并且为了能够测试这样的回退路径，在一个实现中，硬件为软件提供一种总是中止推测代码区域的机制。

公开(公告)号：US08578138B2

公开(公告)日：2013-11-05

申请号：US12550737

申请日：2009-08-31

申请人： Mahesh S. Natu ,  Thanunathan Rangarajan ,  Gautam B. Doshi ,  Shammanna M. Datta ,  Baskaran Ganesan ,  Mohan J. Kumar ,  Rajesh S. Parthasarathy ,  Frank Binns ,  Rajesh Nagaraja Murthy ,  Robert C. Swanson

发明人： Mahesh S. Natu ,  Thanunathan Rangarajan ,  Gautam B. Doshi ,  Shammanna M. Datta ,  Baskaran Ganesan ,  Mohan J. Kumar ,  Rajesh S. Parthasarathy ,  Frank Binns ,  Rajesh Nagaraja Murthy ,  Robert C. Swanson

IPC分类号： G06F9/48

CPC分类号： G06F13/24 ,  G06F9/30101 ,  G06F9/3017 ,  G06F9/30189 ,  G06F9/3851 ,  G06F9/461 ,  G11C7/1072 ,  G11C11/40615

摘要： In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括具有诸如静态随机存取存储器之类的片上存储器的处理器，用于存储在进入系统时从处理器的架构状态存储器交换的一个或多个线程的架构状态 管理模式（SMM）。 以这种方式，可以避免该状态信息与系统管理存储器的通信，减少与进入SMM相关联的延迟。 实施例还可以使处理器更新处于长指令流或处于系统管理中断（SMI）阻塞状态中的执行代理的状态，以向SMM内的代理提供指示。 描述和要求保护其他实施例。

公开(公告)号：US07627706B2

公开(公告)日：2009-12-01

申请号：US11850782

申请日：2007-09-06

申请人： Shivnandan D. Kaushik ,  Keshavan K. Tiruvallur ,  James B. Crossland ,  Sridhar Muthrasanallur ,  Rajesh S. Parthasarathy ,  Luke P. Hood

发明人： Shivnandan D. Kaushik ,  Keshavan K. Tiruvallur ,  James B. Crossland ,  Sridhar Muthrasanallur ,  Rajesh S. Parthasarathy ,  Luke P. Hood

IPC分类号： G06F13/24 ,  G06F13/32

CPC分类号： G06F13/24

摘要： In some embodiments, an apparatus includes logical interrupt identification number creation logic to receive physical processor identification numbers and create logical processor identification numbers through using the physical processor identification numbers. Each of the logical processor identification numbers corresponds to one of the physical processor identification numbers, and the logical processor identification numbers each include a processor cluster identification number and an intra-cluster identification number. The processor cluster identification numbers are each formed to include a group of bits from the corresponding physical processor identification number shifted in position, and the intra-cluster identification numbers are each formed in response to values of others of the bits of the corresponding physical processor identification number. Other embodiments are described.

摘要翻译： 在一些实施例中，装置包括用于接收物理处理器标识号的逻辑中断识别号码创建逻辑，并通过使用物理处理器标识号创建逻辑处理器标识号。 每个逻辑处理器识别号对应于物理处理器识别号之一，并且逻辑处理器标识号各自包括处理器群标识号和群内标识号。 每个处理器集群标识号被形成为包括从相应的物理处理器标识号码位置移位的一组位，并且群内标识号分别响应于对应的物理处理器标识的其他位的值而形成 数。 描述其他实施例。

公开(公告)号：US07506121B2

公开(公告)日：2009-03-17

申请号：US11322757

申请日：2005-12-30

申请人： Gilbert Neiger ,  Andrew V. Anderson ,  Steven M. Bennett ,  Rajesh Sankaran Madukkarumukumana ,  Richard A. Uhlig ,  Rajesh S. Parthasarathy ,  Sebastian Schoenberg

发明人： Gilbert Neiger ,  Andrew V. Anderson ,  Steven M. Bennett ,  Rajesh Sankaran Madukkarumukumana ,  Richard A. Uhlig ,  Rajesh S. Parthasarathy ,  Sebastian Schoenberg

IPC分类号： G06F12/00

CPC分类号： G06F12/1441 ,  G06F12/145 ,  G06F2009/45587

摘要： Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to the device and based on an access type, whether the access is allowed. The exit logic is to transfer control to a host if the evaluation logic determines that the access is not allowed.

摘要翻译： 公开了访客访问存储器映射设备的装置，方法和系统的实施例。 在一个实施例中，装置包括评估逻辑和退出逻辑。 评估逻辑是为了响应于访客访问使用映射到设备的存储器地址并基于访问类型访问设备的尝试，确定访问是否被允许。 如果评估逻辑确定不允许访问，退出逻辑将控制传送到主机。

公开(公告)号：US20090070511A1

公开(公告)日：2009-03-12

申请号：US11850790

申请日：2007-09-06

申请人： Shivnandan D. Kaushik ,  Keshavan K. Tiruvallur ,  James B. Crossland ,  Sridhar Muthrasanallur ,  Rajesh S. Parthasarathy ,  Luke P. Hood

发明人： Shivnandan D. Kaushik ,  Keshavan K. Tiruvallur ,  James B. Crossland ,  Sridhar Muthrasanallur ,  Rajesh S. Parthasarathy ,  Luke P. Hood

IPC分类号： G06F13/24

CPC分类号： G06F9/505 ,  G06F9/3885 ,  G06F9/3891 ,  G06F9/5094 ,  G06F13/24 ,  Y02D10/14 ,  Y02D10/22

摘要： In some embodiments, an apparatus includes processor selection logic to receive logical destination identification numbers that are associated with interrupts each having a processor cluster identification number to identify a cluster of processors to which the interrupts are directed. The logical destination identification numbers are each to identify which processors within the identified cluster of processors are available to receive the corresponding one of interrupts. The processor selection logic is to select one of the available processors to receive the interrupt, and the selected one of the available processors is identified through a relative position of a corresponding bit in the logical destination identification numbers. Other embodiments are described.

摘要翻译： 在一些实施例中，一种装置包括处理器选择逻辑，以接收与每个具有处理器集群标识号的中断相关联的逻辑目的地标识号，以识别中断指向的处理器的集群。 逻辑目的地识别号码各自用于识别所识别的处理器簇内的哪些处理器可用于接收相应的一个中断。 处理器选择逻辑是选择一个可用的处理器来接收中断，并且通过逻辑目的地标识号中的对应位的相对位置来识别所选择的一个可用处理器。 描述其他实施例。

公开(公告)号：US06944745B2

公开(公告)日：2005-09-13

申请号：US10229317

申请日：2002-08-26

申请人： Rajesh S. Parthasarathy

发明人： Rajesh S. Parthasarathy

IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F9/44 ,  G06F15/00 ,  G06F15/80

CPC分类号： G06F9/30094 ,  G06F9/30036 ,  G06F9/3861

摘要： Processing a micro-operation may include providing information to an event handler indicating which of multiple sets of data caused events during processing of a single instruction on multiple sets of data in parallel. The event handler may access the provided information to simplify handling of data sets that did not cause an event. Handling the data sets may include the event handler determining a result for data sets that caused events, accessing results determined outside of the event handler for data sets that did not cause an event, and accumulating all of the results.

摘要翻译： 处理微操作可以包括向事件处理器提供信息，该事件处理器指示在并行处理多组数据的单个指令的处理期间引起事件的多个组中的哪一个。 事件处理程序可以访问提供的信息，以简化没有引起事件的数据集的处理。 处理数据集可以包括事件处理程序确定导致事件的数据集的结果，访问在事件处理程序之外的不导致事件的数据集的结果，并且累积所有结果。

公开(公告)号：US20160132336A1

公开(公告)日：2016-05-12

申请号：US14998276

申请日：2015-12-26

申请人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

发明人： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

IPC分类号： G06F9/30 ,  G06F12/08 ,  G06F13/42 ,  G06F13/16 ,  G06F13/40

CPC分类号： G06F9/3855 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30087 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/3016 ,  G06F9/3802 ,  G06F9/3834 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3859 ,  G06F9/3861 ,  G06F9/467 ,  G06F9/528 ,  G06F12/0806 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/1045 ,  G06F13/1673 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2212/452 ,  G06F2212/50 ,  G06F2212/60 ,  G06F2212/602 ,  G06F2212/621 ,  G06F2212/68 ,  G06F2212/682

摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

公开(公告)号：US20150006496A1

公开(公告)日：2015-01-01

申请号：US13931860

申请日：2013-06-29

申请人： Ravi RAJWAR ,  Matthew C. MERTEN ,  Christine E. WANG ,  Vijaykumar B. KADGI ,  Rajesh S. PARTHASARATHY

发明人： Ravi RAJWAR ,  Matthew C. MERTEN ,  Christine E. WANG ,  Vijaykumar B. KADGI ,  Rajesh S. PARTHASARATHY

IPC分类号： G06F9/46

CPC分类号： G06F9/467 ,  G06F9/3836 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3857 ,  G06F9/3861 ,  G06F9/3863 ,  G06F9/466 ,  G06F9/528

摘要： A processor, system, and method are described for continued retirement of operations during a commit of a speculative region of program code. For example, one embodiment of a method comprises the operations of identifying a plurality of transactional memory regions in program code, including a first transactional memory region; and retiring one or more of a plurality of operations which follow the first transactional memory region even when a commit operation associated with the first transactional memory region is waiting to complete.

摘要翻译： 描述了处理器，系统和方法，用于在提交程序代码的推测区域期间继续退出操作。 例如，方法的一个实施例包括在程序代码中识别多个事务存储区域的操作，包括第一事务存储器区域; 以及即使当与第一事务存储器区域相关联的提交操作等待完成时，退出遵循第一事务存储器区域的多个操作中的一个或多个操作。