公开(公告)号：US20120009769A1

公开(公告)日：2012-01-12

申请号：US13177216

申请日：2011-07-06

Applicant: Orin W. Holland ,  Khalid Hossain

Inventor： Orin W. Holland ,  Khalid Hossain

IPC: H01L21/265

CPC classification number: H01L21/265 ,  H01L21/3003

Abstract: The invention is directed to ion implantation. Ion implantation is a process whereby energetic ions are used to uniformly irradiate the surface of a material—typically a semiconductor wafer. Either atomic or molecular ions are created in an ion source and then extracted for analysis (e.g. by magnetic separation) to ensure the purity of the ion beam. Post-analysis acceleration and scanning of the beam is done prior to sample irradiation. Each dopant-type acts, in general, to increase the conductivity of the silicon.

Abstract translation: 本发明涉及离子注入。 离子注入是使用高能离子来均匀地照射材料的表面（通常是半导体晶片）的过程。 在离子源中产生原子或分子离子，然后提取用于分析（例如通过磁分离）以确保离子束的纯度。 在样品照射之前进行光束的后分析加速和扫描。 通常，每种掺杂剂类型的作用是增加硅的导电性。

公开(公告)号：US4928156A

公开(公告)日：1990-05-22

申请号：US319000

申请日：1989-03-06

Applicant: John R. Alvis ,  James R. Pfiester ,  Orin W. Holland

Inventor： John R. Alvis ,  James R. Pfiester ,  Orin W. Holland

IPC: H01L21/265 ,  H01L21/336 ,  H01L29/08 ,  H01L29/167 ,  H01L29/36 ,  H01L29/78

CPC classification number: H01L29/6659 ,  H01L21/26506 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/36 ,  H01L29/7836 ,  Y10S257/919

Abstract: Metal-oxide-semiconductor (MOS) transistors with n-type source/drain regions also having germanium-doped regions in or near the source/drains. The presence of germanium near or at the location of phosphorus in graded source drains (GSDs), lightly doped drains (LDDs) and double diffused drains (DDDs) gives a better profile of the drain region with a reduced junction depth than that obtainable with phosphorus or particularly phosphorus and arsenic together. Good grading of the drain junction to avoid hot carrier instability or hot carrier injection problems is obtained along with shallow source junctions, which minimizes lateral dopant diffusion and decreases the distance between n.sup.- and n.sup.+ regions in GSDs and LDDs.

Abstract translation: 具有n型源极/漏极区域的金属氧化物半导体（MOS）晶体管在源/漏极中或附近也具有锗掺杂区域。 分级源极漏极（GSD），轻掺杂漏极（LDD）和双扩散漏极（DDD）中磷附近或位置处的锗的存在提供了漏极区的更好的轮廓，其结点深度低于磷获得的结点深度 或特别是磷和砷一起。 获得漏极结的良好分级，以避免热载流子不稳定或热载流子注入问题，同时连接浅源极结，这可以最大限度地减小横向掺杂剂扩散，并减小GSD和LDD中n +和n +区之间的距离。

公开(公告)号：US4704367A

公开(公告)日：1987-11-03

申请号：US853840

申请日：1986-04-21

Applicant: John R. Alvis ,  Orin W. Holland

Inventor： John R. Alvis ,  Orin W. Holland

IPC: H01L21/3215 ,  H01L21/265

CPC classification number: H01L21/3215 ,  Y10S148/14 ,  Y10S438/937

Abstract: A technique for suppressing hillock growth in metal films on integrated circuits through multiple thermal cycles by argon implantation. Although it was known that ion implantation of many species such as arsenic suppressed the growth of hillocks in metal films through one thermal cycle, it was discovered that only one of the proposed ions, argon, would suppress hillock formation for multiple subsequent thermal cycles. For the other species, hillock formation would reoccur after multiple cycles. This characteristic is important for double layer metal (DLM) processes to prevent interlayer shorting.

Abstract translation: 通过氩气注入通过多个热循环来抑制集成电路上的金属膜的小丘生长的技术。 虽然众所周知，许多物质如砷的离子注入通过一个热循环抑制金属膜中的小丘的生长，但是发现只有一个所提出的离子氩就可以抑制多个后续热循环的小丘形成。 对于其他物种，小丘形成将在多个周期后再次发生。 这种特性对于防止层间短路的双层金属（DLM）工艺很重要。

公开(公告)号：US20100327276A1

公开(公告)日：2010-12-30

申请号：US12831808

申请日：2010-07-07

Applicant: Orin W. Holland ,  Terry D. Golding ,  John H. Dinan ,  Ronald Paul Hellmer

Inventor： Orin W. Holland ,  Terry D. Golding ,  John H. Dinan ,  Ronald Paul Hellmer

IPC: H01L29/22 ,  H01L21/30

CPC classification number: H01L31/1832 ,  H01L21/02381 ,  H01L21/0248 ,  H01L21/02562 ,  H01L21/02664 ,  H01L21/67115 ,  H01L31/1868 ,  Y02E10/50 ,  Y02P70/521

Abstract: Apparatus and method to improve the operating parameters of HgCdTe-based optoelectric devices by the addition of hydrogen to passivate dislocation defects. A chamber and a UV light source are provided. The UV light source is configured to provide UV radiation within the chamber. The optoelectric device, which may comprise a HgCdTe semiconductor, is placed into the chamber and may be held in position by a sample holder. Hydrogen gas is introduced into the chamber. The material is irradiated within the chamber by the UV light source with the device and hydrogen gas present within the chamber to cause absorption of the hydrogen into the material.

Abstract translation: 通过添加氢来改善HgCdTe基光电器件的工作参数的设备和方法，以钝化位错缺陷。 提供了一个室和一个UV光源。 UV光源被配置为在腔室内提供UV辐射。 可以包括HgCdTe半导体的光电装置被放置在室中并且可以通过样品保持器保持就位。 氢气被引入腔室。 该材料通过UV光源在室内照射，该装置和存在于室内的氢气引起氢气吸收到材料中。

公开(公告)号：US20090309623A1

公开(公告)日：2009-12-17

申请号：US12137151

申请日：2008-06-11

Applicant: Orin W. Holland ,  Terry D. Golding ,  Ronald P. Hellmer ,  Thomas H. Myers

Inventor： Orin W. Holland ,  Terry D. Golding ,  Ronald P. Hellmer ,  Thomas H. Myers

IPC: G01R31/26

CPC classification number: G01R31/2648 ,  G01R31/307 ,  G21K2207/00 ,  H01L22/12

Abstract: A method is provided for measuring defects in semiconductor materials. In one embodiment the method includes placing deuterium in the material and directing an ion beam onto the material to cause a nuclear reaction with the deuterium. Products of the nuclear reaction are analyzed (NRA) to measure the concentration of defects. In other embodiments, a spectroscopic technique is used to detect the deuterium taggant. Lattice defect or total defect occurrences can be selected by selecting the method of placing deuterium in the sample. Defect concentration vs. depth below the surface of material can be determined by varying the energy of the ion beam or by measuring energy profiles of products of the nuclear reaction. The method may be applied to wafers, pixels or other forms of semiconductor materials and may be combined with X-ray analysis of elements on the material.

Abstract translation: 提供了一种用于测量半导体材料中的缺陷的方法。 在一个实施方案中，该方法包括将氘放置在材料中并将离子束引导到材料上以引起与氘的核反应。 分析核反应的产物（NRA）以测量缺陷的浓度。 在其他实施例中，使用光谱技术来检测氘标记物。 可以通过选择在样品中放置氘的方法来选择晶格缺陷或全部缺陷发生。 可以通过改变离子束的能量或通过测量核反应产物的能量分布来确定材料表面以下的缺陷浓度与深度。 该方法可以应用于晶片，像素或其他形式的半导体材料，并且可以与材料上的元件的X射线分析结合。

公开(公告)号：US4743563A

公开(公告)日：1988-05-10

申请号：US53917

申请日：1987-05-26

Applicant: James R. Pfiester ,  John R. Alvis ,  Orin W. Holland

Inventor： James R. Pfiester ,  John R. Alvis ,  Orin W. Holland

IPC: H01L21/225 ,  H01L21/316 ,  H01L21/762 ,  H01L27/092 ,  H01L21/265 ,  H01L21/22

CPC classification number: H01L21/02238 ,  H01L21/02255 ,  H01L21/02299 ,  H01L21/2255 ,  H01L21/31662 ,  H01L21/76213 ,  H01L27/092 ,  Y10S148/082 ,  Y10S438/981

Abstract: A process is disclosed for controlling the surface doping of two regions of a semiconductor device and more specifically for using such control to achieve the necessary field doping in a CMOS device structure. In accordance with one embodiment of the invention a silicon substrate is provided which has first and second regions of opposite conductivity type. A uniform doping such as by ion implantation is provided into each of the conductivity regions. The two regions or portions thereof are then simultaneously differently oxidized to cause a differential segregation of the dopant into the thermally grown oxide. The differential oxide growth can be achieved by selectively implanting halogen ions into the wafer surface prior to the thermal oxidation.

Abstract translation: 公开了一种用于控制半导体器件的两个区域的表面掺杂的方法，更具体地说是用于在CMOS器件结构中实现必要的场掺杂的这种控制。 根据本发明的一个实施例，提供了具有相反导电类型的第一和第二区域的硅衬底。 在每个导电区域中提供诸如通过离子注入的均匀掺杂。 然后，两个区域或其部分被同时不同地氧化，以引起掺杂剂与热生长的氧化物的差异偏析。 可以通过在热氧化之前将卤素离子选择性地注入晶片表面来实现差异氧化物生长。

公开(公告)号：US4728619A

公开(公告)日：1988-03-01

申请号：US63934

申请日：1987-06-19

Applicant: James R. Pfiester ,  John R. Alvis ,  Orin W. Holland

Inventor： James R. Pfiester ,  John R. Alvis ,  Orin W. Holland

IPC: H01L21/22 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/263

CPC classification number: H01L21/22 ,  H01L21/76218 ,  H01L21/823878 ,  H01L27/0928

Abstract: A complementary metal-oxide-semiconductor (CMOS) isolation structure where the field isolation structure between the adjacent areas of different conductivity types has a channel stop doped with boron or phosphorus affected by germanium. The dual use of germanium and a second dopant selected from the group of phosphorus and boron provides a more precisely placed channel stop, since the germanium retards the diffusion of the boron and phosphorus and surprisingly provides improved width effect for the devices in the well where the channel stop is employed. Alternatively, the germanium may be placed in such a manner as to avoid retarding absorption of boron or phosphorus into the field oxide and retard its diffusion over the well of a different conductivity type where it is not desired.

Abstract translation: 互补金属氧化物半导体（CMOS）隔离结构，其中不同导电类型的相邻区域之间的场隔离结构具有掺杂有受锗影响的硼或磷的沟道阻挡层。 锗和选自磷和硼的二次掺杂物的双重用途提供了更精确地放置的通道阻挡，因为锗阻碍了硼和磷的扩散，并且令人惊讶地为其中的器件提供了改进的宽度效应，其中 通道停止。 或者，可以以这样的方式放置锗，以避免将硼或磷吸收到场氧化物中，并阻止其在不希望的不同导电类型的阱上的扩散。

公开(公告)号：US4908334A

公开(公告)日：1990-03-13

申请号：US300863

申请日：1989-01-24

Applicant: Raymond A. Zuhr ,  Orin W. Holland

Inventor： Raymond A. Zuhr ,  Orin W. Holland

IPC: H01L21/285

CPC classification number: H01L21/28518

Abstract: Metallic silicide films are formed on silicon substrates by contacting the substrates with a low-energy ion beam of metal ions while moderately heating the substrate. The heating of the substrate provides for the diffusion of silicon atoms through the film as it is being formed to the surface of the film for interaction with the metal ions as they contact the diffused silicon. The metallic silicide films provided by the present invention are contaminant free, of uniform stoichiometry, large grain size, and exhibit low resistivity values which are of particular usefulness for integrated circuit production.

Abstract translation: 金属硅化物膜通过使基板与金属离子的低能量离子束接触而在硅衬底上形成，同时适度加热衬底。 衬底的加热提供了硅原子通过膜的扩散，因为它们被形成在膜的表面上，用于与金属离子接触扩散硅时与金属离子相互作用。 由本发明提供的金属硅化物膜是无污染的，具有均匀的化学计量，较大的晶粒尺寸，并且表现出低电阻率值，这对于集成电路生产是特别有用的。

公开(公告)号：US4837173A

公开(公告)日：1989-06-06

申请号：US72932

申请日：1987-07-13

Applicant: John R. Alvis ,  James R. Pfiester ,  Orin W. Holland

Inventor： John R. Alvis ,  James R. Pfiester ,  Orin W. Holland

IPC: H01L21/265 ,  H01L21/336 ,  H01L29/08 ,  H01L29/167 ,  H01L29/36 ,  H01L29/78

CPC classification number: H01L29/6659 ,  H01L21/26506 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/36 ,  H01L29/7836

Abstract: Metal-oxide-semiconductor (MOS) transistors with n-type source/drain regions also having germanium-doped regions in or near the source/drains. The presence of germanium near or at the location of phosphorus in graded source drains (GSDs), lightly doped drains (LDDs) and double diffused drains (DDDs) gives a better profile of the drain region with a reduced junction depth than that obtainable with phosphorus or particularly phosphorus and arsenic together. Good grading of the drain junction to avoid hot carrier instability or hot carrier injection problems is obtained along with shallow source junctions, which minimizes lateral dopant diffusion and decreases the distance between n- and n+ regions in GSDs and LDDs.

Abstract translation: 具有n型源极/漏极区域的金属氧化物半导体（MOS）晶体管在源/漏极中或附近也具有锗掺杂区域。 分级源极漏极（GSD），轻掺杂漏极（LDD）和双扩散漏极（DDD）中磷附近或位置处的锗的存在提供了漏极区的更好的轮廓，其结点深度低于磷获得的结点深度 或特别是磷和砷一起。 获得漏极结的良好分级，以避免热载流子不稳定或热载流子注入问题，同时连接浅源极结，这可以最大限度地减小横向掺杂剂扩散，并减小GSD和LDD中n +和n +区之间的距离。

公开(公告)号：US09196497B2

公开(公告)日：2015-11-24

申请号：US13155947

申请日：2011-06-08

Applicant: Orin W. Holland ,  Ryan J. Cottier ,  Terry D. Golding ,  Khalid Hossain ,  Ronald Paul Hellmer

Inventor： Orin W. Holland ,  Ryan J. Cottier ,  Terry D. Golding ,  Khalid Hossain ,  Ronald Paul Hellmer

IPC: H01L21/02 ,  H01L21/30 ,  H01L21/302

CPC classification number: H01L21/3003 ,  H01L21/02041 ,  H01L21/02043 ,  H01L21/02046 ,  H01L21/02057 ,  H01L21/302

Abstract: An apparatus and method for hydrogenating a sample, such as a semiconductor wafer. The invention utilizes a top electrode comprising a UV-transparent dielectric and a metal contact to provide an electric field to the sample while the sample is irradiated with UV light and hydrogenated with a hydrogenating gas or gasses. The field may be applied to the sample at a number of different pressures, temperatures and concentrations of gas to manipulate the rate and type of hydrogenation. Further, the method of hydrogenating the sample may be used in conjunction with masking and etching techniques.

Abstract translation: 用于使样品（例如半导体晶片）氢化的装置和方法。 本发明利用包含UV透明电介质和金属接触的顶部电极在样品被UV光照射并用氢化气体或气体氢化的同时向样品提供电场。 该场可以以多种不同的压力，气体的温度和浓度施加到样品上以操纵氢化的速率和类型。 此外，氢化样品的方法可以与掩模和蚀刻技术结合使用。