公开(公告)号：US06171513B2

公开(公告)日：2001-01-09

申请号：US09303471

申请日：1999-04-30

申请人： Kenneth Morgan Davis ,  Ralph R. Comulada, Jr. ,  Fen Fen Jamin ,  Bradley Paul Jones ,  Francis R. Krug ,  Michael Francis Lofaro

发明人： Kenneth Morgan Davis ,  Ralph R. Comulada, Jr. ,  Fen Fen Jamin ,  Bradley Paul Jones ,  Francis R. Krug ,  Michael Francis Lofaro

IPC分类号： B24B100

CPC分类号： B24B37/30

摘要： A system for chemical-mechanical polishing is described which includes a wafer backing film having concentric first and second portions, and a wafer carrier having corresponding first and second portions for mounting the portions of the wafer backing film thereon. The portions of the wafer backing film are of different materials. The second portion of the wafer backing film has an annular shape and surrounds the first portion; the second portion of the wafer carrier is adjustable with respect to the first portion of the wafer carrier in a vertical direction. The second portion of the wafer backing film is less compressible than the first portion, and is adjusted in the vertical direction so that the outer edge of the wafer is substantially sealed when backside air is applied to the wafer during a film removal process.

摘要翻译： 描述了一种用于化学机械抛光的系统，其包括具有同心的第一和第二部分的晶片背衬膜，以及具有相应的第一和第二部分的晶片载体，用于将晶片背衬膜的部分安装在其上。 晶片背衬膜的部分是不同的材料。 晶片背衬膜的第二部分具有环形形状并围绕第一部分; 晶片载体的第二部分在垂直方向上相对于晶片载体的第一部分是可调节的。 晶片背衬膜的第二部分比第一部分可压缩性低，并且在垂直方向上被调节，使得当在膜去除过程中将背面空气施加到晶片时，晶片的外边缘基本上被密封。

公开(公告)号：US07442647B1

公开(公告)日：2008-10-28

申请号：US12043129

申请日：2008-03-05

申请人： Sivananda Kanakasabapathy ,  Eugene J. O'Sullivan ,  Michael Christopher Gaidis ,  Michael Francis Lofaro

发明人： Sivananda Kanakasabapathy ,  Eugene J. O'Sullivan ,  Michael Christopher Gaidis ,  Michael Francis Lofaro

IPC分类号： H01L21/311

CPC分类号： H01L43/12 ,  H01L21/76844 ,  H01L21/76849 ,  H01L27/222

摘要： A structure and method for fabricating a top strap in a magnetic random access memory, MRAM, comprising a damascene process forming a trench in a dielectric layer and resulting in a metal conductor clad on three sides by an inverted U-shape trench liner and cap made up of three layers consisting of a stack of a ferromagnetic material sandwiched between two layers of a refractory metal or an alloy of a refractory metal. First the two sidewalls of the trench are formed with the cladding layer, followed by filling the trench with the metal conductor. In preparing the structure for the capping layer, the metal conductor is recessed with an etch that is selective to the metal conductor over the sidewall stack. This preparation may be performed on selected metal filled trenches and blocked on others, such that after a final polishing step, only those metal conductors that received the recess operation will have the capping layer.

摘要翻译： 一种用于制造磁性随机存取存储器中的顶带的结构和方法，MRAM，包括在电介质层中形成沟槽的镶嵌工艺，并且通过倒置的U形沟槽衬垫和盖制成三面包覆金属导体 三层由夹在两层难熔金属或耐火金属合金之间的铁磁材料堆叠组成。 首先，用覆层形成沟槽的两个侧壁，然后用金属导体填充沟槽。 在制备覆盖层的结构时，金属导体以对侧壁叠层上的金属导体有选择性的蚀刻凹陷。 该制备方法可以在所选择的金属填充沟槽上进行，并且在其它金属填充沟槽上进行封闭，使得在最终抛光步骤之后，只有接收到凹陷操作的那些金属导体将具有覆盖层。

公开(公告)号：US06228744B1

公开(公告)日：2001-05-08

申请号：US09427898

申请日：1999-10-27

申请人： Ernest Norman Levine ,  Michael Francis Lofaro ,  James Gardner Ryan

发明人： Ernest Norman Levine ,  Michael Francis Lofaro ,  James Gardner Ryan

IPC分类号： H01L2176

CPC分类号： G02B6/131 ,  G02B6/132 ,  G02B2006/12176 ,  H01L23/473 ,  H01L2924/0002 ,  Y10S366/03 ,  H01L2924/00

摘要： A semiconductor device or other suitable substrate and method with single or multi layers of buried micro pipes are disclosed. This is achieved by controlling the aspect ratio of trenches as well as controlling the deposition characteristics of the material used to fill the trenches. A buried micro pipe is formed by filling a trench that has a height which is larger than a width thereof, so that the trench filler material lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench. Another layer can be formed over the filler material and planarized. Alternatively, the filler material itself can be planarized. Forming trenches in the planarized layer, and repeating the above steps forms a second set of buried micro pipes in these new trenches. This forms a semiconductor device having multiple layer of buried micro pipes. Via holes may be etched to contact a micro pipe, or to inter connect micro pipes buried at different levels Thus, instead of eliminating defective voids in trenches, the voids are controlled to form the micro pipes, which may be used to circulate a cooling fluid, or lined with a conductive material to form a micro light pipe channel, or buried conductive pipes.

摘要翻译： 公开了一种具有单层或多层埋入微管的半导体器件或其它合适的衬底和方法。 这通过控制沟槽的纵横比以及控制用于填充沟槽的材料的沉积特性来实现。 通过填充具有大于其宽度的高度的沟槽而形成埋入的微管，使得沟槽填充材料管道沟槽的侧壁和底部，并且覆盖沟槽的顶部以在该沟槽的内部形成微管 沟。 可以在填料材料上形成另一层并进行平面化。 或者，填充材料本身可以被平坦化。 在平坦化层中形成沟槽，并重复上述步骤，在这些新的沟槽中形成第二组埋入的微管。 这形成具有多层埋藏微管的半导体器件。 可以蚀刻通孔以接触微管，或者将不同级别的微管相互连接。因此，不用消除沟槽中的有缺陷的空隙，可以控制空隙以形成微管，这可以用来循环冷却流体 或用导电材料衬里形成微光管通道，或埋入导电管。

公开(公告)号：US5968841A

公开(公告)日：1999-10-19

申请号：US851920

申请日：1997-05-06

申请人： William Francis Landers ,  Michael Francis Lofaro ,  Adam Dan Ticknor

发明人： William Francis Landers ,  Michael Francis Lofaro ,  Adam Dan Ticknor

IPC分类号： B24B1/04 ,  B24B37/10 ,  B24B37/22 ,  H01L21/304 ,  H01L21/00

CPC分类号： B24B37/107 ,  B24B1/04 ,  B24B37/22

摘要： A device and method for preventing settlement of particles on a chemical-mechanical polishing pad is provided. Specifically, a device capable of preventing settlement of particles on the pad is located between the polishing pad and a platen of a chemical-mechanical polishing apparatus.

摘要翻译： 提供一种用于防止化学机械抛光垫上的颗粒沉降的装置和方法。 具体地说，能够防止在焊盘上沉降颗粒的装置位于抛光垫和化学机械抛光装置的压板之间。

公开(公告)号：US6031286A

公开(公告)日：2000-02-29

申请号：US808927

申请日：1997-02-28

申请人： Ernest Norman Levine ,  Michael Francis Lofaro ,  James Gardner Ryan

发明人： Ernest Norman Levine ,  Michael Francis Lofaro ,  James Gardner Ryan

IPC分类号： G02B6/12 ,  G02B6/13 ,  G02B6/132 ,  H01L23/473 ,  H01L23/34

CPC分类号： G02B6/131 ,  G02B6/132 ,  H01L23/473 ,  G02B2006/12176 ,  H01L2924/0002 ,  Y10S366/03

摘要： A semiconductor device or other suitable substrate and method with single or multi layers of buried micro pipes are disclosed. This is achieved by controlling the aspect ratio of trenches as well as controlling the deposition characteristics of the material used to fill the trenches. A buried micro pipe is formed by filling a trench that has a height which is larger than a width thereof, so that the trench filler material lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench. Another layer can be formed over the filler material and planarized. Alternatively, the filler material itself can be planarized. Forming trenches in the planarized layer, and repeating the above steps forms a second set of buried micro pipes in these new trenches. This forms a semiconductor device having multiple layer of buried micro pipes. Via holes may be etched to contact a micro pipe, or to inter connect micro pipes buried at different levels. Thus, instead of eliminating defective voids in trenches, the voids are controlled to form the micro pipes, which may be used to circulate a cooling fluid, or lined with a conductive material to form a micro light pipe channel, or buried conductive pipes.

摘要翻译： 公开了一种具有单层或多层埋入微管的半导体器件或其它合适的衬底和方法。 这通过控制沟槽的纵横比以及控制用于填充沟槽的材料的沉积特性来实现。 通过填充具有大于其宽度的高度的沟槽而形成埋入的微管，使得沟槽填充材料管道沟槽的侧壁和底部，并且覆盖沟槽的顶部以在该沟槽内部形成微管 沟。 可以在填料材料上形成另一层并进行平面化。 或者，填充材料本身可以被平坦化。 在平坦化层中形成沟槽，并重复上述步骤，在这些新的沟槽中形成第二组埋入的微管。 这形成具有多层埋藏微管的半导体器件。 可以蚀刻通孔以接触微管，或者将不同层次的微管相互连接。 因此，不是消除沟槽中的有缺陷的空隙，而是控制空隙以形成可用于循环冷却流体或用导电材料衬里以形成微光管通道的微管或埋入的导电管。

公开(公告)号：US06812193B2

公开(公告)日：2004-11-02

申请号：US10231047

申请日：2002-08-30

申请人： Michael Todd Brigham ,  Donald Francis Canaperi ,  Michael Addison Cobb ,  William Cote ,  Kenneth Morgan Davis ,  Scott Alan Estes ,  Edward Jack Gordon ,  James Willard Hannah ,  Mahadevaiyer Krishnan ,  Michael Francis Lofaro ,  Michael Joseph MacDonald ,  Dean Allen Schaffer ,  George James Slusser ,  James Anthony Tornello ,  Eric Jeffrey White

发明人： Michael Todd Brigham ,  Donald Francis Canaperi ,  Michael Addison Cobb ,  William Cote ,  Kenneth Morgan Davis ,  Scott Alan Estes ,  Edward Jack Gordon ,  James Willard Hannah ,  Mahadevaiyer Krishnan ,  Michael Francis Lofaro ,  Michael Joseph MacDonald ,  Dean Allen Schaffer ,  George James Slusser ,  James Anthony Tornello ,  Eric Jeffrey White

IPC分类号： C09K1300

CPC分类号： C11D3/046 ,  C11D7/34 ,  C11D11/0047 ,  H01L21/3212

摘要： Slurry compositions comprising an oxidizing agent, optionally a copper corrosion inhibitor, abrasive particles; surface active agent, a service of chloride and a source of sulfate ions.

摘要翻译： 包含氧化剂，任选的铜腐蚀抑制剂，磨料颗粒的浆料组合物; 表面活性剂，氯化物和硫酸根离子的使用。

公开(公告)号：US06478665B2

公开(公告)日：2002-11-12

申请号：US09777539

申请日：2001-02-06

申请人： Michael Francis Lofaro

发明人： Michael Francis Lofaro

IPC分类号： B24B2900

CPC分类号： B24B37/08 ,  B24B27/0076 ,  B24B37/345 ,  B24B41/061

摘要： A wafer polishing tool is disclosed which includes a polishing platen which is rotatable about a central platen axis, and a wafer carrier which supports a wafer for rotational movement to cause a portion of a surface of the wafer to only intermittently contact a polishing surface of the platen while the wafer rotates. The polishing tool may include a plurality of vertically stacked polishing platens which are rotatable about a central platen axis, and a plurality of stacked wafer carriers, wherein each carrier supports a wafer for rotational movement and vertical movement into contact with one of the polishing platens. During polishing, the carrier pack maintains the wafers in uninterrupted contact with the platen over less than entire surfaces of the wafers.

摘要翻译： 公开了一种晶片抛光工具，其包括可围绕中心压板轴线旋转的抛光压板，以及晶片载体，其支撑用于旋转运动的晶片，以使晶片表面的一部分仅间歇地接触晶片的抛光表面 当晶片旋转时，压板。 抛光工具可以包括可围绕中心压板轴线旋转的多个垂直堆叠的抛光平板，以及多个堆叠的晶片载体，其中每个载体支撑用于旋转运动的晶片，并且垂直运动与其中一个抛光平台接触。 在抛光期间，载体包将晶片在晶片的不到整个表面上保持不间断地与压板接触。

公开(公告)号：US06186877B1

公开(公告)日：2001-02-13

申请号：US09205935

申请日：1998-12-04

申请人： Michael Francis Lofaro

发明人： Michael Francis Lofaro

IPC分类号： B24B2900

CPC分类号： B24B37/08 ,  B24B27/0076 ,  B24B37/345 ,  B24B41/061

摘要： A wafer polishing tool is disclosed which includes a polishing platen which is rotatable about a central platen axis, and a wafer carrier which supports a wafer for rotational movement to cause a portion of a surface of the wafer to only intermittently contact a polishing surface of the platen while the wafer rotates. The polishing tool may include a plurality of vertically stacked polishing platens which are rotatable about a central platen axis, and a plurality of stacked wafer carriers, wherein each carrier supports a wafer for rotational movement and vertical movement into contact with one of the polishing platens. During polishing, the carrier pack maintains the wafers in uninterrupted contact with the platen over less than entire surfaces of the wafers.

公开(公告)号：US06344414B1

公开(公告)日：2002-02-05

申请号：US09303470

申请日：1999-04-30

申请人： Kenneth Morgan Davis ,  Fen Fen Jamin ,  Bradley Paul Jones ,  Michael Francis Lofaro

发明人： Kenneth Morgan Davis ,  Fen Fen Jamin ,  Bradley Paul Jones ,  Michael Francis Lofaro

IPC分类号： H01L21302

CPC分类号： B24B37/30

摘要： A system for chemical-mechanical polishing is described which includes a wafer backing film having concentric first and second portions. The portions of the wafer backing film are of different materials. The second portion of the wafer backing film has an annular shape and surrounds the first portion; a backing shim is used to adjust the first portion and second portion with respect to each other in a vertical direction. The first and second portions of the wafer backing film and the backing shim are mounted on an adhesive assembly film, thereby forming an assembly for mounting on a wafer carrier. The second portion of the wafer backing film is less compressible than the first portion, and is adjusted in the vertical direction so that the outer edge of the wafer is substantially sealed when backside air is applied to the wafer during a film removal process.

摘要翻译： 描述了一种用于化学机械抛光的系统，其包括具有同心的第一和第二部分的晶片背衬膜。 晶片背衬膜的部分是不同的材料。 晶片背衬膜的第二部分具有环形形状并围绕第一部分; 背衬垫片用于在垂直方向上相对于彼此调节第一部分和第二部分。 晶片背衬膜和背衬垫片的第一和第二部分安装在粘合剂组合膜上，从而形成用于安装在晶片载体上的组件。 晶片背衬膜的第二部分比第一部分可压缩性低，并且在垂直方向上被调节，使得当在膜去除过程中将背面空气施加到晶片时，晶片的外边缘基本上被密封。