公开(公告)号：US09276099B2

公开(公告)日：2016-03-01

申请号：US13415926

申请日：2012-03-09

Applicant: Miki Yumoto ,  Masahiko Kuraguchi

Inventor： Miki Yumoto ,  Masahiko Kuraguchi

IPC: H01L29/15 ,  H01L31/0256 ,  H01L29/778 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/20

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/66462

Abstract: A semiconductor device of one embodiment, including the semiconductor layer including a III-V group nitride semiconductor; a groove portion formed in the semiconductor layer; the gate insulating film formed at least on a bottom surface of the groove portion, the gate insulating film being a stacked film of a first insulating film and a second insulating film of which dielectric constant is higher than that of the first insulating film; the gate electrode formed on the gate insulating film; and a source electrode and a drain electrode formed on the semiconductor layer across the gate electrode, in which the second insulating film is selectively formed only under the gate electrode.

Abstract translation: 一种实施方式的半导体器件，包括包括III-V族氮化物半导体的半导体层; 形成在所述半导体层中的槽部; 所述栅极绝缘膜至少形成在所述槽部的底面上，所述栅极绝缘膜是第一绝缘膜和第二绝缘膜的叠层膜，所述第二绝缘膜的介电常数高于所述第一绝缘膜的介电常数; 形成在栅极绝缘膜上的栅电极; 以及形成在半导体层上的源电极和漏电极，跨越栅电极，其中第二绝缘膜仅选择性地形成在栅极下方。

公开(公告)号：US20110220978A1

公开(公告)日：2011-09-15

申请号：US12876598

申请日：2010-09-07

Applicant: Kentaro IKEDA ,  Masahiko Kuraguchi

Inventor： Kentaro IKEDA ,  Masahiko Kuraguchi

IPC: H01L27/06 ,  H01L29/24 ,  H01L29/20

CPC classification number: H01L27/0605 ,  H01L27/0629 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/7786

Abstract: In an embodiment, provided is a semiconductor device in which a normally-on type FET; a capacitor having one electrode electrically connected to a gate of the FET and the other electrode electrically connected to an input terminal; and a diode having an anode electrode electrically connected to the gate of the FET and a cathode electrode electrically connected to a source of the FET are formed on the same chip on which the FET is formed. Also, the capacitor may have a structure in which an insulation film such as a dielectric substance is formed on a gate drawn electrode of the FET, and a metallic layer is formed on the insulation layer.

Abstract translation: 在一个实施例中，提供了一种半导体器件，其中常导型FET; 电容器，其一个电极与FET的栅极电连接，另一个电极与输入端电连接; 并且在与FET的栅极电连接的阳极电极和与FET的源极电连接的阴极电极的二极管形成在形成有FET的同一芯片上。 此外，电容器可以具有其中在FET的栅极拉制电极上形成诸如电介质的绝缘膜的结构，并且在绝缘层上形成金属层。

公开(公告)号：US20070045670A1

公开(公告)日：2007-03-01

申请号：US11506776

申请日：2006-08-21

Applicant: Masahiko Kuraguchi

Inventor： Masahiko Kuraguchi

IPC: H01L29/768

CPC classification number: H01L29/2003 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/78

Abstract: The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped AlxGa1-xN (0≦X

Abstract translation: 氮化物类半导体器件包括由非掺杂Al x Ga 1-x N（0 <= X 1）构成的载流子行进层1。 形成在载体行进层1上并由非掺杂或n型Al Y 1 Y 1-Y N（0

公开(公告)号：US08368084B2

公开(公告)日：2013-02-05

申请号：US12876598

申请日：2010-09-07

Applicant: Kentaro Ikeda ,  Masahiko Kuraguchi

Inventor： Kentaro Ikeda ,  Masahiko Kuraguchi

IPC: H01L29/772

CPC classification number: H01L27/0605 ,  H01L27/0629 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/7786

Abstract: In an embodiment, provided is a semiconductor device in which a normally-on type FET; a capacitor having one electrode electrically connected to a gate of the FET and the other electrode electrically connected to an input terminal; and a diode having an anode electrode electrically connected to the gate of the FET and a cathode electrode electrically connected to a source of the FET are formed on the same chip on which the FET is formed. Also, the capacitor may have a structure in which an insulation film such as a dielectric substance is formed on a gate drawn electrode of the FET, and a metallic layer is formed on the insulation layer.

Abstract translation: 在一个实施例中，提供了一种半导体器件，其中常导型FET; 电容器，其一个电极与FET的栅极电连接，另一个电极与输入端电连接; 并且在与FET的栅极电连接的阳极电极和与FET的源极电连接的阴极电极的二极管形成在形成有FET的同一芯片上。 此外，电容器可以具有其中在FET的栅极拉制电极上形成诸如电介质的绝缘膜的结构，并且在绝缘层上形成金属层。

公开(公告)号：US20070051977A1

公开(公告)日：2007-03-08

申请号：US11507493

申请日：2006-08-22

Applicant: Wataru Saito ,  Masaaki Onomura ,  Akira Tanaka ,  Koichi Tachibana ,  Masahiko Kuraguchi ,  Takao Noda ,  Tomohiro Nitta ,  Akira Yoshioka

Inventor： Wataru Saito ,  Masaaki Onomura ,  Akira Tanaka ,  Koichi Tachibana ,  Masahiko Kuraguchi ,  Takao Noda ,  Tomohiro Nitta ,  Akira Yoshioka

IPC: H01L31/00 ,  H01L21/336

CPC classification number: H01L29/7787 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/42316

Abstract: A nitride semiconductor device comprises: a substrate body including a conductive substrate portion and a high resistance portion; a first semiconductor layer of a nitride semiconductor provided on the substrate body; a second semiconductor layer provided on the first semiconductor layer; a first main electrode provided on the second semiconductor layer; a second main electrode provided on the second semiconductor layer; and a control electrode provided on the second semiconductor layer between the first main electrode and the second main electrode. The second semiconductor layer is made of a nondoped or n-type nitride semiconductor having a wider bandgap than the first semiconductor layer. The first main electrode is provided above the conductive portion and the second main electrode is provided above the high resistance portion.

Abstract translation: 一种氮化物半导体器件包括：衬底本体，包括导电衬底部分和高电阻部分; 设置在基板主体上的氮化物半导体的第一半导体层; 设置在所述第一半导体层上的第二半导体层; 设置在所述第二半导体层上的第一主电极; 设置在所述第二半导体层上的第二主电极; 以及设置在第一主电极和第二主电极之间的第二半导体层上的控制电极。 第二半导体层由具有比第一半导体层宽的带隙的非掺杂或n型氮化物半导体制成。 第一主电极设置在导电部分的上方，第二主电极设置在高电阻部分的上方。

公开(公告)号：US08841681B2

公开(公告)日：2014-09-23

申请号：US12984106

申请日：2011-01-04

Applicant: Masahiko Kuraguchi

Inventor： Masahiko Kuraguchi

IPC: H01L23/544 ,  H01L21/66 ,  G03F9/00

CPC classification number: H01L23/544 ,  G03F9/7076 ,  G03F9/708 ,  H01L2223/54426 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wide-gap semiconductor substrate includes a narrow-gap semiconductor layer, a wide-gap semiconductor layer and an alignment mark. The narrow-gap semiconductor layer has a main surface. The wide-gap semiconductor layer is epitaxially grown on the narrow-gap semiconductor layer. The alignment mark is preliminarily carved in a prescribed position on the main surface so that the alignment mark is preliminarily buried in the wide-gap semiconductor substrate.

Abstract translation: 宽间隙半导体衬底包括窄间隙半导体层，宽间隙半导体层和对准标记。 窄间隙半导体层具有主表面。 宽间隙半导体层在窄间隙半导体层上外延生长。 对准标记被预先雕刻在主表面上的规定位置，使得对准标记预先埋在宽间隙半导体衬底中。

公开(公告)号：US08698198B2

公开(公告)日：2014-04-15

申请号：US11870836

申请日：2007-10-11

Applicant: Masahiko Kuraguchi

Inventor： Masahiko Kuraguchi

IPC: H01L21/02

CPC classification number: H01L29/802 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7781 ,  H01L29/7785 ,  H01L29/7787 ,  H01L29/861

Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer formed of non-doped AlXGa1-XN (0≦X

Abstract translation: 氮化物半导体器件包括：由非掺杂Al x Ga 1-x N（0＆amp; N e; X 1）形成的第一氮化物半导体层; 第二氮化物半导体层，形成在第一氮化物半导体层上的非掺杂或n型AlYGa1-YN（0

公开(公告)号：US20120235156A1

公开(公告)日：2012-09-20

申请号：US13220038

申请日：2011-08-29

Applicant: Masahiko KURAGUCHI

Inventor： Masahiko KURAGUCHI

IPC: H01L29/78

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/42316

Abstract: According to one embodiment, a nitride semiconductor device includes a semiconductor layer, a source electrode, a drain electrode, a first and a second gate electrode. The semiconductor layer includes a nitride semiconductor. The source electrode provided on a major surface of the layer forms ohmic contact with the layer. The drain electrode provided on the major surface forms ohmic contact with the layer and is separated from the source electrode. The first gate electrode is provided on the major surface between the source and drain electrodes. The second gate electrode is provided on the major surface between the source and first gate electrodes. When a potential difference between the source and first gate electrodes is 0 volts, a portion of the layer under the first gate electrode is conductive. The first gate electrode is configured to switch a constant current according to a voltage applied to the second gate electrode.

Abstract translation: 根据一个实施例，氮化物半导体器件包括半导体层，源电极，漏电极，第一和第二栅电极。 半导体层包括氮化物半导体。 设置在该层的主表面上的源电极与层形成欧姆接触。 设在主表面上的漏电极与该层形成欧姆接触并与源电极分离。 第一栅电极设置在源极和漏极之间的主表面上。 第二栅电极设置在源极和第一栅电极之间的主表面上。 当源极和第一栅电极之间的电位差为0伏时，第一栅电极下方的一部分导电。 第一栅电极被配置为根据施加到第二栅电极的电压来切换恒定电流。

公开(公告)号：US20100244050A1

公开(公告)日：2010-09-30

申请号：US12728901

申请日：2010-03-22

Applicant: Masahiko Kuraguchi

Inventor： Masahiko Kuraguchi

IPC: H01L29/24 ,  H01L29/201

CPC classification number: H01L27/0211 ,  H01L21/8213 ,  H01L27/0207 ,  H01L27/0629 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/7787 ,  H01L29/872

Abstract: A semiconductor device which is capable of operating at an operation frequency “f”, includes a substrate, a first element unit and a second element unit. The substrate has a thermal diffusion coefficient “D”. The first element unit is formed on the substrate. The first element includes a first active element. The second element unit is adjacent to the first element unit on the substrate. The second element includes a second active element. The second active element acts on a different timing from the first active element. Moreover, a distance of between a first gravity center of the first element unit and a second gravity center of the second element unit is equal to or less than twice of a thermal diffusion length (D/πf)1/2.

Abstract translation: 能够以工作频率“f”工作的半导体器件包括衬底，第一元件单元和第二元件单元。 基板具有热扩散系数“D”。 第一元件单元形成在基板上。 第一元件包括第一有源元件。 第二元件单元与基板上的第一元件单元相邻。 第二元件包括第二有源元件。 第二有源元件作用于与第一有源元件不同的定时。 此外，第一元件单元的第一重心与第二元件单元的第二重心之间的距离等于或小于热扩散长度（D /＆pgr; f）1/2的两倍。

公开(公告)号：US20070145390A1

公开(公告)日：2007-06-28

申请号：US11564571

申请日：2006-11-29

Applicant: Masahiko KURAGUCHI

Inventor： Masahiko KURAGUCHI

IPC: H01L33/00

CPC classification number: H01L29/861 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/872

Abstract: A nitride-based semiconductor device includes a diode provided on a semiconductor substrate. The diode contains a first nitride-based semiconductor layer made of non-doped AlXGa1-XN (0≦X

Abstract translation: 氮化物类半导体器件包括设置在半导体衬底上的二极管。 二极管包含由非掺杂Al x Ga 1-X N（0 <= X 1）构成的第一氮化物基半导体层; 由非掺杂或n型Al Y 1 Y Y N（0≤Y≤1，X