公开(公告)号：US20110080538A1

公开(公告)日：2011-04-07

申请号：US12890730

申请日：2010-09-27

申请人： KUNIHIRO SHIOTA ,  KOJI MIMURA

发明人： KUNIHIRO SHIOTA ,  KOJI MIMURA

IPC分类号： G02F1/1335 ,  G03F7/20 ,  G03B27/54 ,  F21V11/00

CPC分类号： G03F7/0007 ,  G02B2207/123 ,  G02F1/133524 ,  G03F7/2053

摘要： Provided is an optical element manufacturing method that is capable of forming various kinds of shapes and capable of achieving sophisticated functions, improved yields, and cost reductions. The method includes: a step that applies a transparent photosensitive resin on a transparent substrate with light-shielding patterns provided thereon; a step that forms transparent layers by performing patterning through irradiating exposure light of an arbitrary amount on the transparent photosensitive resin via the transparent substrate with the light-shielding patterns provided thereon; a step that forms light absorption layers by filling a black curable resin between the transparent layers; and an irradiation step that irradiates the exposure light in an oblique direction to the surface of the transparent substrate where the light-shielding patterns are formed in a state where the transparent substrate is being bent.

摘要翻译： 提供一种能够形成各种形状并且能够实现复杂功能，提高产量和降低成本的光学元件制造方法。 该方法包括：将透明感光树脂施加在其上设置有遮光图案的透明基板上的步骤; 通过在其上设置有遮光图案的透明基板在透明感光性树脂上照射任意量的曝光光进行图案化，形成透明层的工序; 通过在透明层之间填充黑色可固化树脂形成光吸收层的步骤; 以及照射步骤，其在透明基板被弯曲的状态下沿倾斜方向照射形成有遮光图案的透明基板的表面。

公开(公告)号：US20100244037A1

公开(公告)日：2010-09-30

申请号：US12727352

申请日：2010-03-19

申请人： KUNIHIRO SHIOTA

发明人： KUNIHIRO SHIOTA

IPC分类号： H01L33/00 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L29/78618 ,  G02F1/13454 ,  G02F1/1368 ,  G02F2202/104 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78675

摘要： A thin film transistor (TFT) is provided which is capable of reducing leakage currents in a polycrystalline silicon TFT without causing an increase in manufacturing processes. Source/drain regions of an activated layer of the TFT to be formed in a circuit region and pixel region formed on a glass substrate of a liquid crystal display panel for a mobile phone is formed so that its boron impurity falls within a range of 2.5×1018/cm3 to 5.5×1018/cm3 and its impurity activation falls within a range of 1% to 7%.

摘要翻译： 提供薄膜晶体管（TFT），其能够减少多晶硅TFT中的漏电流，而不会导致制造工艺的增加。 形成在电路区域中的TFT的激活层的源极/漏极区域和形成在用于移动电话的液晶显示面板的玻璃基板上的像素区域形成为使得其硼杂质落入2.5× 1018 / cm 3至5.5×10 18 / cm 3，其杂质活化在1％至7％的范围内。

公开(公告)号：US20090286341A1

公开(公告)日：2009-11-19

申请号：US12510605

申请日：2009-07-28

申请人： Kunihiro Shiota ,  Hiroshi Tanabe

发明人： Kunihiro Shiota ,  Hiroshi Tanabe

IPC分类号： H01L21/205 ,  H01L21/336

CPC分类号： G02F1/136213 ,  G02F1/136227

摘要： A pixel circuit substrate includes a first interlayer insulating film which is made of an inorganic material at least in a source and drain regions of a thin film transistor. A contact hole is formed in an area above the source and drain regions of a thin film transistor in the first interlayer insulating film. A wiring layer is formed on the first interlayer insulating film, extends to an inner wall and a bottom surface of the contact hole. On a top surface of the wiring layer is formed a recess reflecting the shape of a contact hole. A second interlayer insulating film is formed on the wiring layer, embedded in the recess and has a flat top surface in an area above the thin film transistor. A storage capacitor on the second interlayer insulating film is disposed in the area above the thin film transistor.

摘要翻译： 像素电路基板包括至少在薄膜晶体管的源极和漏极区域中由无机材料制成的第一层间绝缘膜。 在第一层间绝缘膜中的薄膜晶体管的源区和漏区上方的区域中形成接触孔。 布线层形成在第一层间绝缘膜上，延伸到接触孔的内壁和底面。 在布线层的上表面形成反映接触孔形状的凹部。 第二层间绝缘膜形成在布线层上，嵌入凹槽中，并且在薄膜晶体管上方的区域中具有平坦的顶表面。 第二层间绝缘膜上的存储电容器设置在薄膜晶体管上方的区域中。

公开(公告)号：US20070262474A1

公开(公告)日：2007-11-15

申请号：US11745739

申请日：2007-05-08

申请人： Kunihiro Shiota ,  Jun Tanaka

发明人： Kunihiro Shiota ,  Jun Tanaka

IPC分类号： H01L23/29 ,  H01L21/00

CPC分类号： H01L29/78675 ,  H01L23/293 ,  H01L29/66757 ,  H01L29/78603 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided which is capable of suppressing decreased yields and increased costs, maintaining excellent optical characteristics, reducing secular changes in characteristics to ensure high erliability. After implanting a dopant into a polycrystalline silicon film and activating the implanted dopant and forming a source region, drain region, and channel region, a substrate is exposed to hydrogen gas plasma with a substrate temperature kept within a range between 350° C. and 420° C. and with treating time of 3 minutes to 60 minutes taken. This exposure suppresses a content of occluded water contained in silicon dioxide making up a primary protecting film, which prevents the diffusion of water being an impurity at operational temperatures of a thin film transistor and adverse characteristics on operational characteristics.

摘要翻译： 提供了能够抑制产量降低和成本增加，保持优异的光学特性并减少特性变化的半导体器件，以确保高可靠性。 在将掺杂剂注入多晶硅膜并激活注入的掺杂剂并形成源极区，漏极区和沟道区之后，将衬底暴露于氢气等离子体，衬底温度保持在350℃至420℃的范围内 处理时间为3分钟至60分钟。 该曝光抑制了构成初级保护膜的二氧化硅中所含的封闭水含量，这防止了在薄膜晶体管的操作温度下作为杂质的水的扩散和对操作特性的不利特性。

公开(公告)号：US06657692B2

公开(公告)日：2003-12-02

申请号：US09836506

申请日：2001-04-18

申请人： Kunihiro Shiota

发明人： Kunihiro Shiota

IPC分类号： G02F11333

CPC分类号： G02F1/136227

摘要： A method for cleaning a hole in a layered structure having a planarized transparent organic surface comprises the step of exposing said hole to sputtered particles or plasma particles in the presence of a transparent protection layer which covers said planarized transparent organic surface, except within said hole, for protecting said planarized transparent organic surface from said particles.

公开(公告)号：US5895853A

公开(公告)日：1999-04-20

申请号：US606273

申请日：1996-02-23

申请人： Kunihiro Shiota

发明人： Kunihiro Shiota

IPC分类号： G01P15/08 ,  G01P15/12 ,  H01L29/84 ,  G01P15/00

CPC分类号： G01P15/123 ,  G01P15/0802

摘要： It is the object of the invention to provide a semiconductor acceleration sensor, in which the characteristic is stable, even if minute spherical particle intrudes into the clearance of the sensor, and a yielding rate and a reliability are remarkably improved. The upper and lower surfaces of a sensor chip, which is composed of a weight portion and beams supporting it, are put between the upper and lower stopper substrates. The surfaces of the upper and lower substrates, which face the sensor chip, have engraved areas thereon, and are stuck to the aforementioned sensor chip via adhesive portions. The adhesive portion is filled with a mixture of adhesive agent and minute spherical hard plastics particle with a equal diameter. The width clearance between sensor chip and stopper substrate is determined by the diameter of the minute spherical particle made of hard plastics.

摘要翻译： 本发明的目的是提供一种半导体加速度传感器，其中特性是稳定的，即使微小的球形颗粒侵入到传感器的间隙中，并且显着提高了屈服率和可靠性。 传感器芯片的上表面和下表面由重量部分和支撑它的光束组成，放置在上下止挡基板之间。 面对传感器芯片的上基板和下基板的表面在其上刻有区域，并通过粘合部分粘贴到上述传感器芯片上。 粘合剂部分填充有相等直径的粘合剂和微小球形硬塑料颗粒的混合物。 传感器芯片和止动器基板之间的宽度间隙由硬塑料制成的微小球形颗粒的直径决定。

公开(公告)号：US07626648B2

公开(公告)日：2009-12-01

申请号：US11242935

申请日：2005-10-05

申请人： Kunihiro Shiota ,  Hiroshi Tanabe

发明人： Kunihiro Shiota ,  Hiroshi Tanabe

IPC分类号： G02F1/136

CPC分类号： G02F1/136213 ,  G02F1/136227

摘要： A pixel circuit substrate includes a first interlayer insulating film which is made of an inorganic material at least in a source and drain regions of a thin film transistor. A contact hole is formed in an area above the source and drain regions of a thin film transistor in the first interlayer insulating film. A wiring layer is formed on the first interlayer insulating film, extends to an inner wall and a bottom surface of the contact hole. On a top surface of the wiring layer is formed a recess reflecting the shape of a contact hole. A second interlayer insulating film is formed on the wiring layer, embedded in the recess and has a flat top surface in an area above the thin film transistor. A storage capacitor on the second interlayer insulating film is disposed in the area above the thin film transistor.

摘要翻译： 像素电路基板包括至少在薄膜晶体管的源极和漏极区域中由无机材料制成的第一层间绝缘膜。 在第一层间绝缘膜中的薄膜晶体管的源区和漏区上方的区域中形成接触孔。 布线层形成在第一层间绝缘膜上，延伸到接触孔的内壁和底面。 在布线层的上表面形成反映接触孔形状的凹部。 第二层间绝缘膜形成在布线层上，嵌入凹槽中，并且在薄膜晶体管上方的区域中具有平坦的顶表面。 第二层间绝缘膜上的存储电容器设置在薄膜晶体管上方的区域中。

公开(公告)号：US07011996B2

公开(公告)日：2006-03-14

申请号：US10444288

申请日：2003-05-22

申请人： Hiroshi Okumura ,  Kunihiro Shiota

发明人： Hiroshi Okumura ,  Kunihiro Shiota

IPC分类号： H01L21/335 ,  H10L21/8232

CPC分类号： H01L29/66757 ,  H01L29/4908

摘要： After a polysilicon semiconductor film 5 and a first gate oxide film 6 are formed on a transparent insulating substrate 1, the semiconductor film 5 and the first gate oxide film 6 are patterned into an island shape to form an island part. At this time, an overhang part 8 of a visor shape is formed where side end surfaces of the first gate oxide film 6 and the semiconductor film 5 are not aligned and an end part of the first gate oxide film 6 projects slightly from a position of a side end surface of the semiconductor film 5. The overhang part 8 is removed, for example, during cleaning, which thus enhances yield.

摘要翻译： 在透明绝缘基板1上形成多晶硅半导体膜5和第一栅极氧化膜6之后，将半导体膜5和第一栅极氧化膜6图案化成岛状以形成岛状部分。 此时，形成遮光板形状的突出部8，其中第一栅氧化膜6和半导体膜5的侧端面未对准，并且第一栅极氧化膜6的端部从 半导体膜5的侧端面。例如，在清洁期间移除突出部8，从而提高了产量。

公开(公告)号：US6075315A

公开(公告)日：2000-06-13

申请号：US618378

申请日：1996-03-19

申请人： Nobuya Seko ,  Hironori Imura ,  Masayuki Yoshiki ,  Kunihiro Shiota

发明人： Nobuya Seko ,  Hironori Imura ,  Masayuki Yoshiki ,  Kunihiro Shiota

IPC分类号： H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J1/02 ,  H01J1/16 ,  H01J19/10 ,  H01J63/04

CPC分类号： H01J3/022 ,  H01J9/025

摘要： Piled-up films composed of different materials or composed of the same material manufactured by different methods or different conditions are used as an insulating layer for a field-emission cold cathode. The insulating layer may have a composition which is varied continuously in the thickness direction. A cross-section of the insulating layer may be made uneven. Preferably, a triple junction in which a substrate, the insulating layer, and a vacuum are in contact with one another, is disposed at a position which can not be seen from outside the device.

摘要翻译： 作为场致发射冷阴极的绝缘层，使用由不同材料构成或由不同方法或不同条件制造的相同材料构成的堆积薄膜。 绝缘层可以具有在厚度方向上连续变化的组成。 可以使绝缘层的横截面不均匀。 优选地，其中衬底，绝缘层和真空彼此接触的三重结构被布置在从器件外部看不到的位置。

公开(公告)号：US08743317B2

公开(公告)日：2014-06-03

申请号：US12903364

申请日：2010-10-13

申请人： Kunihiro Shiota ,  Koji Mimura ,  Hiroshi Tanabe ,  Koji Shigemura

发明人： Kunihiro Shiota ,  Koji Mimura ,  Hiroshi Tanabe ,  Koji Shigemura

IPC分类号： G02F1/1335 ,  G02F1/1333

CPC分类号： G02F1/133524 ,  G02F1/13476 ,  G02F1/135

摘要： An image forming apparatus includes: a functional element substrate to which a pixel is formed in a predetermined cycle; an opposed substrate formed on the functional element substrate; and an optical device arranged on the opposed substrate, which includes a transparent layer and an optical absorption layer arranged in a cycle of 1/n (n is an integer number) of the cycle of arranging the pixel, and restricts spread of transmitted light.

摘要翻译： 图像形成装置包括：以预定周期形成像素的功能元件基板; 形成在所述功能元件基板上的相对基板; 以及布置在相对基板上的光学器件，其包括以安排像素的周期的1 / n（n为整数）的周期布置的透明层和光吸收层，并且限制透射光的扩展。