公开(公告)号：US07056770B2

公开(公告)日：2006-06-06

申请号：US10719379

申请日：2003-11-20

Applicant: Hiroshi Uragami ,  Osamu Nakagawa ,  Kinya Fujino ,  Shinji Takase ,  Hideki Tokuyama ,  Koichi Meguro ,  Toru Nishino ,  Noboru Hayasaka

Inventor： Hiroshi Uragami ,  Osamu Nakagawa ,  Kinya Fujino ,  Shinji Takase ,  Hideki Tokuyama ,  Koichi Meguro ,  Toru Nishino ,  Noboru Hayasaka

IPC: H01L21/44

CPC classification number: H01L21/565 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00

Abstract: First, a board is placed on a board mounting portion with a lower mold and an upper mold being opened. Then, a resin material having such size and shape that correspond to the size and shape of a cavity formed in the lower mold is fitted in the cavity. Thereafter, the resin material is heated resulting in melted resin. Thereafter, the lower mold and the upper mold are closed, with a space formed by the upper mold and the lower mold being reduced in pressure. As a result, chips and wires are immersed in the melted resin. Thereafter, the melted resin is set, so that a resin mold product including the board and the set resin is formed.

Abstract translation: 首先，将板放置在具有下模具的板安装部分上，并且打开上模具。 然后，具有与形成在下模具中的空腔的尺寸和形状相对应的尺寸和形状的树脂材料装配在空腔中。 此后，加热树脂材料，使其熔化。 此后，下模和上模封闭，上模和下模形成的空间减压。 结果，芯片和电线被浸入熔融的树脂中。 之后，设定熔融树脂，从而形成包括该板和固化树脂的树脂模制品。

公开(公告)号：US06673654B2

公开(公告)日：2004-01-06

申请号：US10087910

申请日：2002-03-05

Applicant: Takao Ohno ,  Koichi Meguro ,  Shigeru Kamada ,  Keisuke Fukuda ,  Yuzo Shimobeppu

Inventor： Takao Ohno ,  Koichi Meguro ,  Shigeru Kamada ,  Keisuke Fukuda ,  Yuzo Shimobeppu

IPC: H01L2144

CPC classification number: H01L21/67248 ,  H01L21/67109

Abstract: A semiconductor device is manufactured by an integrated circuit forming process, and a series of subsequent steps. In the series of steps, a protection tape 18 is adhered onto a first surface of a semiconductor substrate on which a plurality of semiconductor elements are formed, and the second surface of the semiconductor substrate is ground so that the semiconductor substrate has a desired thickness, the semiconductor substrate is then conveyed while controlling the temperature of the semiconductor substrate. The semiconductor substrate is then separated into a plurality of semiconductor elements. The occurrence of warping on the semiconductor substrate during conveyance of the semiconductor substrate is thus prevented.

Abstract translation: 通过集成电路形成工艺制造半导体器件，以及一系列后续步骤。 在一系列步骤中，将保护带18粘接到其上形成有多个半导体元件的半导体衬底的第一表面上，并且半导体衬底的第二表面被研磨以使得半导体衬底具有期望的厚度， 然后在控制半导体衬底的温度的同时传送半导体衬底。 然后将半导体衬底分离成多个半导体元件。 因此防止了在半导体衬底的传送期间在半导体衬底上翘曲的发生。

公开(公告)号：US20130280904A1

公开(公告)日：2013-10-24

申请号：US13883231

申请日：2011-10-18

Applicant: Lei Shi ,  Guohua Gao ,  Yujuan Tao ,  Naomi Masuda ,  Koichi Meguro

Inventor： Lei Shi ,  Guohua Gao ,  Yujuan Tao ,  Naomi Masuda ,  Koichi Meguro

IPC: H01L21/768

CPC classification number: H01L21/76885 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3178 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/13111 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming a first protective layer on the cutting trail; forming on the metal bonding pad a sub-ball metal electrode; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The first protective layer according to the present invention can prevent the metal in the cutting trail from being separated by electroplating, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield.

Abstract translation: 提供了一种芯片封装的方法，包括以下步骤：提供具有切割轨迹的半封装晶片和芯片的金属焊盘; 在切割道上形成第一保护层; 在金属焊盘上形成子球金属电极; 在子球金属电极上形成焊球; 沿着切割线切割晶片。 根据本发明的第一保护层可以防止切割轨迹中的金属通过电镀分离，并且在切割之后保护离散芯片的侧面。 其工艺流程简单，并且提高了包装的效率以及其收率。

公开(公告)号：US20130224910A1

公开(公告)日：2013-08-29

申请号：US13883399

申请日：2011-10-18

Applicant: Lei Shi ,  Yujuan Tao ,  Guohua Gao ,  Naomi Masuda ,  Koichi Meguro

Inventor： Lei Shi ,  Yujuan Tao ,  Guohua Gao ,  Naomi Masuda ,  Koichi Meguro

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3178 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2224/13611 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming on the metal bonding pad a sub-ball metal electrode, using a selective formation process; forming a protective layer on the wafer in a region not including the sub-ball metal electrode, with the protective layer covering the cutting trail; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The present invention can prevent metal in the cutting trail from being affected during the production of the sub-ball metal electrode, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield.

Abstract translation: 提供了一种芯片封装的方法，包括以下步骤：提供具有切割轨迹的半封装晶片和芯片的金属焊盘; 使用选择性形成工艺在金属焊盘上形成子球金属电极; 在不包括子球金属电极的区域中的晶片上形成保护层，保护层覆盖切割轨迹; 在子球金属电极上形成焊球; 沿着切割线切割晶片。 本发明可以防止在制造子球金属电极期间切割轨迹中的金属受到影响，并且在切割之后保护离散芯片的侧面。 其工艺流程简单，并且提高了包装的效率以及其收率。

公开(公告)号：US20130034934A1

公开(公告)日：2013-02-07

申请号：US13418134

申请日：2012-03-12

Applicant: Koichi MEGURO ,  Kanji Otsuka

Inventor： Koichi MEGURO ,  Kanji Otsuka

IPC: H01L21/50 ,  H01L21/78

CPC classification number: H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/02331 ,  H01L2224/02379 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method for manufacturing a wafer level package is provided that enables suppressing the wearing of a cutter and extending the lifetime of the cutter, including forming insulating first resin over the top face of a substrate, which includes a groove for wiring to be formed; forming a film of first metal that is to serve as a portion of the wiring on the top face of the first resin using physical vapor deposition; forming a film of second metal that is to form a portion of the wiring on the top face of the first metal, with a lower hardness than the first metal; setting a cutter at a height corresponding to a place where the film of the first metal is not formed on a side face of the groove or the film thickness is low; and cutting at least the first resin by scanning the cutter.

Abstract translation: 提供一种制造晶片级封装的方法，其能够抑制切割器的磨损并延长切割器的寿命，包括在包括用于要形成的布线的凹槽的基板的顶面上形成绝缘的第一树脂; 使用物理气相沉积形成用作第一树脂顶面上的布线的一部分的第一金属膜; 在所述第一金属的顶面上形成第二金属的膜，所述第二金属的膜形成在所述第一金属的顶面上的一部分布线，硬度低于所述第一金属; 在与凹槽的侧面没有形成第一金属的膜的位置相对应的高度或者膜厚度下设置切割器; 并且通过扫描切割器至少切割第一树脂。

公开(公告)号：US09362173B2

公开(公告)日：2016-06-07

申请号：US13883399

申请日：2011-10-18

Applicant: Lei Shi ,  Yujuan Tao ,  Guohua Gao ,  Naomi Masuda ,  Koichi Meguro

Inventor： Lei Shi ,  Yujuan Tao ,  Guohua Gao ,  Naomi Masuda ,  Koichi Meguro

IPC: H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3178 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2224/13611 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming on the metal bonding pad a sub-ball metal electrode, using a selective formation process; forming a protective layer on the wafer in a region not including the sub-ball metal electrode, with the protective layer covering the cutting trail; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The present invention can prevent metal in the cutting trail from being affected during the production of the sub-ball metal electrode, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield.

Abstract translation: 提供了一种芯片封装的方法，包括以下步骤：提供具有切割轨迹的半封装晶片和芯片的金属焊盘; 使用选择性形成工艺在金属焊盘上形成子球金属电极; 在不包括子球金属电极的区域中的晶片上形成保护层，保护层覆盖切割轨迹; 在子球金属电极上形成焊球; 沿着切割线切割晶片。 本发明可以防止在制造子球金属电极期间切割轨迹中的金属受到影响，并且在切割之后保护离散芯片的侧面。 其工艺流程简单，并且提高了包装的效率以及其收率。

公开(公告)号：US08883627B2

公开(公告)日：2014-11-11

申请号：US13883231

申请日：2011-10-18

Applicant: Lei Shi ,  Guohua Gao ,  Yujuan Tao ,  Naomi Masuda ,  Koichi Meguro

Inventor： Lei Shi ,  Guohua Gao ,  Yujuan Tao ,  Naomi Masuda ,  Koichi Meguro

IPC: H01L21/44 ,  H01L21/768 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L21/76885 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3178 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/13111 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming a first protective layer on the cutting trail; forming on the metal bonding pad a sub-ball metal electrode; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The first protective layer according to the present invention can prevent the metal in the cutting trail from being separated by electroplating, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield.

Abstract translation: 提供了一种芯片封装的方法，包括以下步骤：提供具有切割轨迹的半封装晶片和芯片的金属焊盘; 在切割道上形成第一保护层; 在金属焊盘上形成子球金属电极; 在子球金属电极上形成焊球; 沿着切割线切割晶片。 根据本发明的第一保护层可以防止切割轨迹中的金属通过电镀分离，并且在切割之后保护离散芯片的侧面。 其工艺流程简单，并且提高了包装的效率以及其收率。