公开(公告)号：US10096618B2

公开(公告)日：2018-10-09

申请号：US15642829

申请日：2017-07-06

Applicant: Ki-Woong Kim ,  Hyo-Jung Kim ,  Kieun Seo ,  Ki Hoon Jang ,  Byoungho Kwon ,  Boun Yoon

Inventor： Ki-Woong Kim ,  Hyo-Jung Kim ,  Kieun Seo ,  Ki Hoon Jang ,  Byoungho Kwon ,  Boun Yoon

IPC: H01L21/3205 ,  H01L27/11582 ,  H01L21/283 ,  H01L21/3105 ,  H01L27/1157 ,  H01L27/11573 ,  H01L21/02 ,  H01L27/24

Abstract: A method of fabricating a three-dimensional semiconductor device is provided. The method includes providing a substrate with a peripheral circuit region and a cell array region; forming a peripheral structure on the peripheral circuit region, and forming an electrode structure on the cell array region. The electrode structure includes a lower electrode, a lower insulating planarized layer on the lower electrode, and upper electrodes and upper insulating layers vertically and alternatingly stacked on the lower insulating planarized layer, and the lower insulating planarized layer may be extended to cover the peripheral structure on the peripheral circuit region. An upper insulating planarized layer is formed to cover the electrode structure and the lower insulating planarized layer on the peripheral circuit region.

公开(公告)号：US09222660B2

公开(公告)日：2015-12-29

申请号：US13581505

申请日：2012-08-09

Applicant: Jae Jin Kim ,  Young Joo Ahn ,  Jae O Kwak ,  Ki Woong Kim

Inventor： Jae Jin Kim ,  Young Joo Ahn ,  Jae O Kwak ,  Ki Woong Kim

IPC: F21V29/00 ,  F21V3/04 ,  F21V7/04 ,  F21V17/00 ,  F21V17/14 ,  F21V23/00 ,  F21V29/70 ,  F21V9/16 ,  F21Y101/02 ,  F21Y105/00 ,  F21K99/00

CPC classification number: F21V29/70 ,  F21K9/20 ,  F21V3/0445 ,  F21V3/0625 ,  F21V7/04 ,  F21V7/041 ,  F21V9/16 ,  F21V9/30 ,  F21V17/005 ,  F21V17/14 ,  F21V23/005 ,  F21V23/006 ,  F21V23/02 ,  F21V29/006 ,  F21Y2105/10 ,  F21Y2115/10

Abstract: A lighting device may be provided that includes: a housing having a top opening and a bottom opening; an optical plate disposed in the top opening; heat sink disposed in the bottom opening; a driving unit which is received in the housing, disposed between the optical plate and the heat sink and receives external electric power; and light source which is received in the housing, disposed between the optical plate and the driving unit, spatially separated from the driving unit and is electrically connected to the driving unit.

Abstract translation: 可以提供照明装置，其包括：具有顶部开口和底部开口的壳体; 设置在所述顶部开口中的光学板; 散热器设置在底部开口中; 驱动单元，其容纳在所述壳体中，设置在所述光学板和所述散热器之间并接收外部电力; 以及光源，其被容纳在所述壳体中，设置在所述光学板和所述驱动单元之间，在空间上与所述驱动单元分离并且电连接到所述驱动单元。

公开(公告)号：US20150280108A1

公开(公告)日：2015-10-01

申请号：US14741446

申请日：2015-06-16

Applicant: JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

Inventor： JEONG-HEON PARK ,  KI-WOONG KIM ,  HEE-JU SHIN ,  JOON-MYOUNG LEE ,  WOO-JIN KIM ,  JAE-HOON KIM ,  SE-CHUNG OH ,  YUN-JAE LEE

IPC: H01L43/02 ,  H01L27/22 ,  H01L23/528 ,  H01L43/08

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01F10/30 ,  H01F10/32 ,  H01F10/3254 ,  H01F10/3272 ,  H01L23/528 ,  H01L27/222 ,  H01L43/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.

公开(公告)号：US20150035095A1

公开(公告)日：2015-02-05

申请号：US14264049

申请日：2014-04-28

Applicant: WOOJIN KIM ,  KI WOONG KIM ,  WOO CHANG LIM

Inventor： WOOJIN KIM ,  KI WOONG KIM ,  WOO CHANG LIM

IPC: H01L43/02

CPC classification number: H01L27/222 ,  G11C11/161 ,  H01F10/3204 ,  H01F10/3254 ,  H01F10/3286 ,  H01L27/224 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetic memory device may include a free magnetic structure and a reference magnetic structure that are separated from each other by a tunnel barrier. The free magnetic structure may include an exchange-coupling layer, and first and second free layers that are separated from each other by the exchange-coupling layer. The first free layer may be provided between the second free layer and the tunnel barrier. A thickness of the first free layer may be greater than a first maximum anisotropy thickness, being the thickness at which the first free layer has maximum perpendicular anisotropy. A thickness of the second free layer may be smaller than a second maximum anisotropy thickness, being the thickness at which the second free layer has maximum perpendicular anisotropy. A magnetic tunnel junction having two free layers with different thicknesses can enable a magnetic memory device that has increased MR ratio and reduced switching current.

Abstract translation: 磁存储器件可以包括通过隧道势垒彼此分离的自由磁结构和参考磁性结构。 自由磁结构可以包括交换耦合层，以及通过交换耦合层彼此分离的第一和第二自由层。 第一自由层可以设置在第二自由层和隧道势垒之间。 第一自由层的厚度可以大于第一最大各向异性厚度，即第一自由层具有最大垂直各向异性的厚度。 第二自由层的厚度可以小于第二最大各向异性厚度，即第二自由层具有最大垂直各向异性的厚度。 具有两个具有不同厚度的自由层的磁性隧道结可实现具有增加的MR比和降低的开关电流的磁存储器件。

公开(公告)号：US20130164568A1

公开(公告)日：2013-06-27

申请号：US13562255

申请日：2012-07-30

Applicant: Ki-Woong Kim ,  Jae-Hoon Choi

Inventor： Ki-Woong Kim ,  Jae-Hoon Choi

IPC: H01M2/00 ,  H01M2/20

CPC classification number: H01M2/34

Abstract: A battery module including a battery including a connection terminal; and a battery cell; and a protective circuit module including a printed circuit board having an inner surface that faces the battery, an outer surface that opposes the inner surface, and a terminal opening, and including a conductive pattern around a periphery of the terminal opening and an insulating part around the periphery of the terminal opening, wherein the connection terminal extends from the battery cell to the outer surface of the printed circuit board through the terminal opening, the conductive pattern is coupled with the battery cell through the connection terminal, and the insulating part contacts a portion of the conductive pattern that is closest to the terminal opening.

Abstract translation: 一种电池模块，包括具有连接端子的电池; 和电池单体; 以及保护电路模块，包括具有面向电池的内表面的印刷电路板，与内表面相对的外表面和端子开口，并且包括围绕端子开口的周边的导电图案和围绕 端子开口的周边，其中连接端子通过端子开口从电池单元延伸到印刷电路板的外表面，导电图案通过连接端子与电池单元耦合，并且绝缘部分接触 最靠近端子开口的导电图案的部分。

公开(公告)号：US20100095149A1

公开(公告)日：2010-04-15

申请号：US12577946

申请日：2009-10-13

Applicant: Yeong Kyun LEE ,  Ki-Woong Kim

Inventor： Yeong Kyun LEE ,  Ki-Woong Kim

IPC: G06F11/16 ,  G06F12/00 ,  G06F11/00

CPC classification number: G06F11/1666 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/068 ,  G06F11/20 ,  G06F2201/81 ,  G11C29/765

Abstract: A method of storing data in a data storage device including a hard disk drive (HDD) and a non-volatile memory (NVM) includes analyzing an access command to access the NVM and transmitting data included in the access command to the HDD based on the analysis result.

Abstract translation: 一种将数据存储在包括硬盘驱动器（HDD）和非易失性存储器（NVM）的数据存储装置中的方法包括：分析访问NVM的访问命令，并将访问命令中包括的数据发送到HDD，基于 分析结果。

公开(公告)号：US10090458B2

公开(公告)日：2018-10-02

申请号：US15617012

申请日：2017-06-08

Applicant: Sung Chul Lee ,  Ki Woong Kim ,  Sang Hwan Park ,  Sechung Oh

Inventor： Sung Chul Lee ,  Ki Woong Kim ,  Sang Hwan Park ,  Sechung Oh

IPC: H01L27/00 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32 ,  H01F10/12

Abstract: A magnetic memory device includes a reference magnetic structure, a free magnetic structure, and a tunnel barrier pattern between the reference magnetic structure and the free magnetic structure. The reference magnetic structure includes a first pinned pattern, a second pinned pattern between the first pinned pattern and the tunnel barrier pattern, and an exchange coupling pattern between the first and the second pinned pattern. The second pinned pattern includes a first magnetic pattern adjacent the exchange coupling pattern, a second magnetic pattern adjacent the tunnel barrier pattern, a third magnetic pattern between the first and the second magnetic pattern, a first non-magnetic pattern between the first and the third magnetic pattern, and a second non-magnetic pattern between the second and the third magnetic pattern. The first non-magnetic pattern has a different crystal structure from the second non-magnetic pattern, and at least a portion of the third magnetic pattern is amorphous.

公开(公告)号：US20180026182A1

公开(公告)日：2018-01-25

申请号：US15678098

申请日：2017-08-15

Applicant: Ki-woong KIM ,  Kee-won KIM ,  Se-chung OH ,  Yong-sung PARK ,  Ju-hyun KIM

Inventor： Ki-woong KIM ,  Kee-won KIM ,  Se-chung OH ,  Yong-sung PARK ,  Ju-hyun KIM

IPC: H01L43/10 ,  H01L27/22 ,  H01L43/02 ,  H01L43/12

CPC classification number: H01L43/10 ,  H01L27/228 ,  H01L43/08

Abstract: A magnetic device includes a free layer; a pinned layer; a tunnel barrier disposed between the free layer and the pinned layer; a polarization enhancement layer disposed between the tunnel barrier and the pinned layer; and a blocking layer disposed between the polarization enhancement layer and the pinned layer, wherein the blocking layer includes a first diffusion trap layer and a second diffusion trap layer disposed on the first diffusion trap layer.

公开(公告)号：US20170125669A1

公开(公告)日：2017-05-04

申请号：US15202250

申请日：2016-07-05

Applicant: Yong Sung PARK ,  Joonmyoung LEE ,  Ki Woong KIM ,  Juhyun KIM ,  Sechung OH

Inventor： Yong Sung PARK ,  Joonmyoung LEE ,  Ki Woong KIM ,  Juhyun KIM ,  Sechung OH

IPC: H01L43/12 ,  H01L43/08

CPC classification number: H01L43/12 ,  C23C14/08 ,  C23C14/081 ,  C23C14/3464 ,  H01F41/307 ,  H01L43/08

Abstract: A method of forming a layer includes providing a first insulator and a second insulator over a lower structure, generating a first ion source and a second ion source from the first insulator and the second insulator, respectively, and forming an insulating layer on the lower structure using the first ion source and the second ion source. The first and second insulators are vertically spaced apart from the lower structure and are laterally spaced apart from each other. The first insulator and the second insulator include the same material.

公开(公告)号：US09299923B2

公开(公告)日：2016-03-29

申请号：US14874376

申请日：2015-10-02

Applicant: SeChung Oh ,  Ki Woong Kim ,  Younghyun Kim ,  Whankyun Kim ,  Sang Hwan Park

Inventor： SeChung Oh ,  Ki Woong Kim ,  Younghyun Kim ,  Whankyun Kim ,  Sang Hwan Park

IPC: H01L29/82 ,  H01L43/10 ,  H01L43/02 ,  H01L43/08 ,  G11C11/16

CPC classification number: H01L43/10 ,  B82Y25/00 ,  G11C11/161 ,  G11C11/1659 ,  H01F10/123 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3286 ,  H01F10/3295 ,  H01L27/224 ,  H01L27/226 ,  H01L27/228 ,  H01L43/08

Abstract: Provided are magnetic memory devices with a perpendicular magnetic tunnel junction. The device includes a magnetic tunnel junction including a free layer structure, a pinned layer structure, and a tunnel barrier therebetween. The pinned layer structure may include a first magnetic layer having an intrinsic perpendicular magnetization property, a second magnetic layer having an intrinsic in-plane magnetization property, and an exchange coupling layer interposed between the first and second magnetic layers. The exchange coupling layer may have a thickness maximizing an antiferromagnetic exchange coupling between the first and second magnetic layers, and the second magnetic layer may exhibit a perpendicular magnetization direction, due at least in part to the antiferromagnetic exchange coupling with the first magnetic layer.