公开(公告)号：US07081863B2

公开(公告)日：2006-07-25

申请号：US10526220

申请日：2003-12-25

Applicant: Yoshio Inasawa ,  Shinji Kuroda ,  Yoshihiko Konishi ,  Shigeru Makino ,  Kenji Kusakabe ,  Izuru Naito

Inventor： Yoshio Inasawa ,  Shinji Kuroda ,  Yoshihiko Konishi ,  Shigeru Makino ,  Kenji Kusakabe ,  Izuru Naito

IPC: H01Q13/00

CPC classification number: H01Q19/19

Abstract: A reflector antenna device includes: an auxiliary reflector 1 that receives an electric wave radiated from an opening portion by a primary radiator 3 and reflects the electric wave; and a main reflector 2 that receives the electric wave that is reflected by the auxiliary reflector 1 and radiates the electric wave to a space. In the reflector antenna device, the configurations of the auxiliary reflector 1 and the main reflector 2 are designed such that an electric power in an area of the main reflector 2 where the auxiliary reflector 1 is projected on the main reflector 2 in parallel with the radiating direction of the electric wave due to the main reflector 2 is equal 1 or lower than a predetermined first threshold value, and a radiation pattern of the antenna which is determined by the area of the main reflector 2 other than the area has a desired characteristic.

Abstract translation: 反射器天线装置包括：辅助反射器1，其接收由初级辐射器3从开口部分辐射的电波并反射电波; 以及主反射器2，其接收由辅助反射器1反射的电波并将电波辐射到空间。 在反射器天线装置中，辅助反射器1和主反射器2的构造被设计成使得主反射器2的辅助反射体1的区域中的电力与辅助反射体2平行地投射在主反射体2上 由于主反射器2引起的电波的方向等于1或低于预定的第一阈值，并且由除了该区域之外的主反射器2的面积确定的天线的辐射图案具有期望的特性。

公开(公告)号：US07009574B2

公开(公告)日：2006-03-07

申请号：US10916470

申请日：2004-08-12

Applicant: Izuru Naito ,  Kenji Kusakabe ,  Toshiyuki Horie ,  Syuji Nuimura

Inventor： Izuru Naito ,  Kenji Kusakabe ,  Toshiyuki Horie ,  Syuji Nuimura

IPC: H01Q13/00

CPC classification number: H01Q1/52 ,  H01Q19/19

Abstract: In order to lessen the deterioration of the VSWR, a plural-reflector antenna system is provided wherein an appropriately shaped vertex matching plate is disposed on the subreflector and electric waves that reenter the primary radiator are cancelled out.The electric waves radiated from the primary radiator are reflected by the subreflector and are radiated into space after being reflected by the main reflector. The passing area in the horn aperture, through which the reflected waves from the vertex matching plate pass, is made to be analogous to the aperture of the primary radiator, by defining the vertex matching plate as an ellipsoid, and by orienting its minor-axis direction in the major-axis direction of the main reflector and its major-axis direction, in the minor-axis direction of the main reflector.

Abstract translation: 为了减轻VSWR的劣化，提供了一种多反射器天线系统，其中适当形状的顶点匹配板设置在副反射器上，并且抵消重新进入初级辐射器的电波。 从主辐射器辐射的电波被副反射器反射，并在被主反射器反射之后被辐射到空间中。 通过将顶点匹配板定义为椭圆体，来自顶点匹配板的反射波通过的喇叭孔中的通过区域与初级辐射体的孔径类似，并且通过使其短轴 在主反射体的短轴方向上的主反射体的长轴方向及其长轴方向。

公开(公告)号：US20060001588A1

公开(公告)日：2006-01-05

申请号：US10526220

申请日：2003-12-25

Applicant: Yoshio Inasawa ,  Shinji Kuroda ,  Yoshihiko Konishi ,  Shigeru Makino ,  Kenji Kusakabe ,  Izuru Naito

Inventor： Yoshio Inasawa ,  Shinji Kuroda ,  Yoshihiko Konishi ,  Shigeru Makino ,  Kenji Kusakabe ,  Izuru Naito

IPC: H01Q13/00

CPC classification number: H01Q19/19

Abstract: A reflector antenna device includes: an auxiliary reflector 1 that receives an electric wave radiated from an opening portion by a primary radiator 3 and reflects the electric wave; and a main reflector 2 that receives the electric wave that is reflected by the auxiliary reflector 1 and radiates the electric wave to a space. In the reflector antenna device, the configurations of the auxiliary reflector 1 and the main reflector 2 are designed such that an electric power in an area of the main reflector 2 where the auxiliary reflector 1 is projected on the main reflector 2 in parallel with the radiating direction of the electric wave due to the main reflector 2 is equal 1 or lower than a predetermined first threshold value, and a radiation pattern of the antenna which is determined by the area of the main reflector 2 other than the area has a desired characteristic.

Abstract translation: 反射器天线装置包括：辅助反射器1，其接收由初级辐射器3从开口部分辐射的电波并反射电波; 以及主反射器2，其接收由辅助反射器1反射的电波并将电波辐射到空间。 在反射器天线装置中，辅助反射器1和主反射器2的构造被设计成使得主反射器2的辅助反射体1的区域中的电力与辅助反射体2平行地投射在主反射体2上 由于主反射器2引起的电波的方向等于1或低于预定的第一阈值，并且由除了该区域之外的主反射器2的面积确定的天线的辐射图案具有期望的特性。

公开(公告)号：US5721145A

公开(公告)日：1998-02-24

申请号：US668878

申请日：1996-06-24

Applicant: Kenji Kusakabe ,  Yoshiko Kokawa ,  Masahiro Sekine

Inventor： Kenji Kusakabe ,  Yoshiko Kokawa ,  Masahiro Sekine

IPC: H01L21/322 ,  H01L21/306

CPC classification number: H01L21/3221

Abstract: The present invention is mainly characterized in that a semiconductor substrate improved so as to maintain a gettering effect for a long time can be obtained. A polycrystalline silicon film is formed on the rear surface of a semiconductor substrate. A silicon oxide film and silicon nitride film are formed over the rear surface of semiconductor substrate so as to cover polycrystalline silicon film.

Abstract translation: 本发明的主要特征在于可以获得改善以便长时间保持吸气效果的半导体衬底。 在半导体衬底的后表面上形成多晶硅膜。 在半导体衬底的后表面上形成氧化硅膜和氮化硅膜，以覆盖多晶硅膜。

公开(公告)号：US5327007A

公开(公告)日：1994-07-05

申请号：US953345

申请日：1992-09-30

Applicant: Makoto Imura ,  Kenji Kusakabe

Inventor： Makoto Imura ,  Kenji Kusakabe

IPC: H01L21/322 ,  H01L21/38 ,  H01L29/34 ,  H01L29/36

CPC classification number: H01L21/3225 ,  H01L21/3221 ,  Y10S257/913

Abstract: A silicon wafer having a low concentration of oxygen and a silicon wafer having a high concentration of oxygen are joined and polished to prescribed thicknesses to form a semiconductor substrate according to the present invention. A region formed of the wafer having a low concentration of oxygen is used as a region where an element is formed, and a region formed of the wafer having a high concentration of oxygen produces a gettering effect on metal impurities and defects. As a DZ layer having a low concentration of oxygen, a wafer manufactured by an MCZ method or a wafer manufactured by a CZ method is used after being heat-treated at high temperature to diffuse oxygen outward. In another example, a damage layer, a polycrystalline silicon layer, an amorphous silicon layer or the like is formed between a DZ layer and an IG layer.

Abstract translation: 将具有低浓度氧的硅晶片和具有高浓度氧的硅晶片接合并抛光至规定厚度以形成根据本发明的半导体衬底。 由具有低浓度氧的晶片形成的区域用作形成元件的区域，并且由具有高浓度氧的晶片形成的区域对金属杂质和缺陷产生吸气效应。 作为具有低浓度氧的DZ层，在高温下进行热处理之后，使用通过MCZ法制造的晶片或通过CZ法制造的晶片将氧向外扩散。 在另一个实例中，在DZ层和IG层之间形成损伤层，多晶硅层，非晶硅层等。

公开(公告)号：US5374842A

公开(公告)日：1994-12-20

申请号：US20080

申请日：1993-02-19

Applicant: Kenji Kusakabe

Inventor： Kenji Kusakabe

IPC: H01L21/322

CPC classification number: H01L21/3221 ,  Y10S257/913 ,  Y10S438/974

Abstract: Silicon substrate is provided with silicon single-crystalline wafer, natural oxide film and poly-crystalline silicon film. The thickness of natural oxide film is controlled to be less than 10 .ANG.. Since the thickness of natural oxide film is made less than 10 .ANG., heavy metals travel smoothly from silicon single-crystalline wafer to poly-crystalline silicon film in the process of gettering. In other words, it is possible to enhance gettering effect.

Abstract translation: 硅衬底设置有硅单晶晶片，天然氧化物膜和多晶硅膜。 天然氧化膜的厚度控制在10安培以下。 由于天然氧化膜的厚度小于10安培，因此在吸杂过程中，重金属从硅单晶晶片平滑地移动到多晶硅膜。 换句话说，可以增强吸气效果。

公开(公告)号：US4876224A

公开(公告)日：1989-10-24

申请号：US213495

申请日：1988-06-30

Applicant: Kenji Kusakabe

Inventor： Kenji Kusakabe

IPC: H01L21/304 ,  H01L21/02 ,  H01L21/205 ,  H01L21/306 ,  H01L21/68

CPC classification number: H01L21/68 ,  Y10S148/125

Abstract: A silicon wafer for a semiconductor substrate comprises a flat wafer body, with a polycrystalline silicon layer formed only on the rear surface of said wafer body.The silicon wafer is manufactured by the steps of forming a polycrystalline silicon layer on the entire surface of the silicon wafer body, etching and removing the portion of the polycrystalline silicon layer which is formed on the side surface of silicon wafer body, and polishing and removing the polycrystalline silicon layer on the front surface of the silicon wafer body.

Abstract translation: 用于半导体衬底的硅晶片包括平坦晶片体，其中仅在所述晶片体的后表面上形成多晶硅层。 硅晶片通过以下步骤制造：在硅晶片本体的整个表面上形成多晶硅层，蚀刻并除去形成在硅晶片主体的侧表面上的多晶硅层的部分，以及抛光和去除 在硅晶片体的前表面上的多晶硅层。

公开(公告)号：US20050200547A1

公开(公告)日：2005-09-15

申请号：US10916470

申请日：2004-08-12

Applicant: Izuru Naito ,  Kenji Kusakabe ,  Toshiyuki Horie ,  Syuji Nuimura

Inventor： Izuru Naito ,  Kenji Kusakabe ,  Toshiyuki Horie ,  Syuji Nuimura

IPC: H01Q19/19 ,  H01Q13/00

CPC classification number: H01Q1/52 ,  H01Q19/19

Abstract: In order to lessen the deterioration of the VSWR, a plural-reflector antenna system is provided wherein an appropriately shaped vertex matching plate is disposed on the subreflector and electric waves that reenter the primary radiator are cancelled out. The electric waves radiated from the primary radiator are reflected by the subreflector and are radiated into space after being reflected by the main reflector. The passing area in the horn aperture, through which the reflected waves from the vertex matching plate pass, is made to be analogous to the aperture of the primary radiator, by defining the vertex matching plate as an ellipsoid, and by orienting its minor-axis direction in the major-axis direction of the main reflector and its major-axis direction, in the minor-axis direction of the main reflector.

Abstract translation: 为了减轻VSWR的劣化，提供了一种多反射器天线系统，其中适当形状的顶点匹配板设置在副反射器上，并且抵消重新进入初级辐射器的电波。 从主辐射器辐射的电波被副反射器反射，并在被主反射器反射之后被辐射到空间中。 通过将顶点匹配板定义为椭圆体，来自顶点匹配板的反射波通过的喇叭孔中的通过区域与初级辐射体的孔径类似，并且通过使其短轴 在主反射体的短轴方向上的主反射体的长轴方向及其长轴方向。

公开(公告)号：US5381032A

公开(公告)日：1995-01-10

申请号：US111964

申请日：1993-08-26

Applicant: Yoshiko Kokawa ,  Tohru Koyama ,  Kenji Kusakabe ,  Katsuhiko Tamura ,  Yasuna Nakamura

Inventor： Yoshiko Kokawa ,  Tohru Koyama ,  Kenji Kusakabe ,  Katsuhiko Tamura ,  Yasuna Nakamura

IPC: H01L21/205 ,  H01L21/265 ,  H01L21/266 ,  H01L21/28 ,  H01L21/3205 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L29/78 ,  H01L29/76 ,  H01L23/48 ,  H01L23/52 ,  H01L29/04

CPC classification number: H01L21/26586 ,  H01L21/266 ,  H01L21/28035 ,  H01L21/32055 ,  H01L29/4916

Abstract: A semiconductor device without erroneous operation and deterioration of characteristics in a transistor even when an impurity region is formed in self-alignment by ion implantation using a gate electrode as a mask, and a method of manufacturing thereof are disclosed. This semiconductor device includes a gate electrode formed of a polycrystal silicon layer 4b having the crystal orientation of the crystal grains arranged in a definite orientation. By implanting ions at a predetermined angle with respect to the crystallographic axis of the crystal grains of the polycrystal silicon layer 4b in forming a p.sup.+ impurity region 5 by ion implantation using the gate electrode as a mask, the channeling phenomenon where ions pass through the gate electrode is prevented. Therefore, generation of erroneous operation and deterioration of characteristics in a transistor are prevented in forming an impurity region in self-alignment by ion implantation using the gate electrode as a mask.

Abstract translation: 即使在通过使用栅电极作为掩模的离子注入来自对准地形成杂质区域的情况下，晶体管也不会发生误操作和特性劣化的半导体器件及其制造方法。 该半导体器件包括由具有以确定取向排列的晶粒的晶体取向的多晶硅层4b形成的栅电极。 通过使用栅极电极作为掩模通过离子注入形成p +杂质区域5时，相对于多晶硅层4b的晶粒的结晶轴以预定的角度注入离子，其中离子通过 防止栅电极。 因此，通过使用栅电极作为掩模，通过离子注入形成自对准中的杂质区域，防止了晶体管中错误操作的产生和特性劣化。

公开(公告)号：US5419786A

公开(公告)日：1995-05-30

申请号：US210398

申请日：1994-03-18

Applicant: Yoshiko Kokawa ,  Kenji Kusakabe

Inventor： Yoshiko Kokawa ,  Kenji Kusakabe

IPC: C30B15/00 ,  C30B15/20 ,  C30B29/06 ,  H01L21/02 ,  H01L21/20 ,  H01L21/322 ,  H01L21/8249 ,  H01L27/06 ,  H01L21/306

CPC classification number: H01L21/3221 ,  H01L21/3225

Abstract: A semiconductor substrate allowing reduction of crystal defects in a device formation region of an epitaxial silicon layer and allowing control of the amount of internal precipitation defects of the single crystal silicon substrate, a method of manufacturing such semiconductor substrate, and a semiconductor device utilizing such semiconductor substrate are disclosed. The semiconductor substrate includes a single crystal silicon substrate, an epitaxial silicon layer, and a polycrystalline silicon layer. The interstitial oxygen concentration of the single crystal silicon substrate is set within the range of 12.5-14.0.times.10.sup.17 (atoms/cm3) according to the old ASTM specification. The epitaxial silicon layer is formed on the top surface of the single crystal silicon substrate. The polycrystalline silicon layer is formed at least on the rear surface of the single crystal silicon substrate to a thickness of at least 1 .mu.m.

Abstract translation: 能够减少外延硅层的器件形成区域的晶体缺陷并能够控制单晶硅衬底的内部析出缺陷的量的半导体衬底，制造这种半导体衬底的方法以及利用这种半导体衬底的半导体器件 衬底。 半导体衬底包括单晶硅衬底，外延硅层和多晶硅层。 根据旧的ASTM规范，单晶硅衬底的间隙氧浓度设定在12.5-14.0×10 17（原子/ cm 3）的范围内。 外延硅层形成在单晶硅衬底的顶表面上。 多晶硅层至少形成在单晶硅衬底的后表面上至少1μm的厚度。