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    Method of temperature determination for deposition reactors
    1.
    发明授权
    Method of temperature determination for deposition reactors 有权
    沉积反应器温度测定方法

    公开(公告)号：US09011599B2

    公开(公告)日：2015-04-21

    申请号：US12835789

    申请日：2010-07-14

    申请人： Jhi-Cherng Lu ,  Jr-Hung Li ,  Chii-Horng Li ,  Pang-Yen Tsai ,  Bing-Hung Chen ,  Tze-Liang Lee

    发明人： Jhi-Cherng Lu ,  Jr-Hung Li ,  Chii-Horng Li ,  Pang-Yen Tsai ,  Bing-Hung Chen ,  Tze-Liang Lee

    IPC分类号： C30B25/08 ,  C30B25/16 ,  C30B29/06 ,  C30B29/08 ,  C30B29/52 ,  H01L21/02 ,  H01L21/66

    CPC分类号： C30B25/16 ,  C30B29/06 ,  C30B29/08 ,  C30B29/52 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L22/10 ,  H01L22/12 ,  Y10T117/1004 ,  Y10T117/1008

    摘要： A method of determining a temperature in a deposition reactor includes the steps of depositing a first epitaxial layer of silicon germanium on a substrate, depositing a second epitaxial layer of silicon above the first epitaxial layer, measuring the thickness of the second epitaxial layer and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer. The method may also include heating the deposition reactor to approximately a predetermined temperature using a heating device and a temperature measuring device and generating a signal indicative of a temperature within the deposition reactor. The method may also contain the steps of comparing the measured thickness with a predetermined thickness of the second epitaxial layer corresponding to the predetermined temperature and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer and the predetermined thickness of the second epitaxial layer.

    摘要翻译： 确定沉积反应器中的温度的方法包括以下步骤：将硅锗的第一外延层沉积在衬底上，在第一外延层上沉积硅的第二外延层，测量第二外延层的厚度并确定 使用测量的第二外延层的厚度在沉积反应器中进行温度测量。 该方法还可以包括使用加热装置和温度测量装置将沉积反应器加热至约预定温度，并产生指示沉积反应器内的温度的信号。 该方法还可以包括以下步骤：将测量的厚度与对应于预定温度的第二外延层的预定厚度进行比较，并使用第二外延层的测量厚度和第二外延层的预定厚度来确定沉积反应器中的温度 外延层。

    Honey Cone Heaters for Integrated Circuit Manufacturing
    3.
    发明申请
    Honey Cone Heaters for Integrated Circuit Manufacturing 有权
    蜂窝锥形加热器用于集成电路制造

    公开(公告)号：US20130256292A1

    公开(公告)日：2013-10-03

    申请号：US13436263

    申请日：2012-03-30

    申请人： Yi-Hung Lin ,  Jr-Hung Li ,  Chii-Horng Li ,  Tze-Liang Lee

    发明人： Yi-Hung Lin ,  Jr-Hung Li ,  Chii-Horng Li ,  Tze-Liang Lee

    IPC分类号： H05B3/06 ,  H05B6/00

    CPC分类号： H01L21/67103 ,  H05B3/0047

    摘要： A honey cone heater includes a lamp housing having an outer edge that forms a partial circle. The lamp housing has an opening extending from a top surface to a bottom surface of the lamp housing. The opening further extends from the outer edge into a center region of the lamp housing. A plurality of lamps is distributed throughout the lamp housing, and is configured to emit light out of the top surface of the lamp housing.

    摘要翻译： 蜂蜜锥加热器包括具有形成部分圆的外边缘的灯壳体。 灯壳具有从灯壳的顶表面延伸到底表面的开口。 开口进一步从外缘延伸到灯壳的中心区域。 多个灯分布在整个灯壳体中，并被构造成从灯壳的顶表面发出光。

    MOS devices with partial stressor channel
    4.
    发明授权
    MOS devices with partial stressor channel 有权
    具有部分应力通道的MOS器件

    公开(公告)号：US08274071B2

    公开(公告)日：2012-09-25

    申请号：US12985507

    申请日：2011-01-06

    申请人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr.-Hung Li

    发明人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr.-Hung Li

    IPC分类号： H01L29/06

    CPC分类号： H01L29/7848 ,  H01L29/045 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7836 ,  Y10S438/938

    摘要： A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and a stressor having at least a portion in the semiconductor substrate and adjacent the gate electrode. The stressor has a tilted sidewall on a side adjacent the gate electrode. The stressor includes a first stressor layer having a second lattice constant substantially different from the first lattice constant; and a second stressor layer on the first stressor layer, wherein the second stressor has a third lattice constant substantially different from the first and the second lattice constants.

    摘要翻译： 半导体结构包括具有第一晶格常数的半导体衬底; 半导体衬底上的栅极电介质; 半导体衬底上的栅电极; 以及在半导体衬底中具有至少一部分并且与栅电极相邻的应力源。 应力源在与栅电极相邻的一侧具有倾斜的侧壁。 应激源包括具有与第一晶格常数基本不同的第二晶格常数的第一应力层; 以及在所述第一应力层上的第二应力层，其中所述第二应力源具有与所述第一和第二晶格常数基本不同的第三晶格常数。

    MOS devices with partial stressor channel
    5.
    发明授权
    MOS devices with partial stressor channel 有权
    具有部分应力通道的MOS器件

    公开(公告)号：US07868317B2

    公开(公告)日：2011-01-11

    申请号：US12467847

    申请日：2009-05-18

    申请人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    发明人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    IPC分类号： H01L29/06

    CPC分类号： H01L29/7848 ,  H01L29/045 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7836 ,  Y10S438/938

    摘要： A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and a stressor having at least a portion in the semiconductor substrate and adjacent the gate electrode. The stressor has a tilted sidewall on a side adjacent the gate electrode. The stressor includes a first stressor layer having a second lattice constant substantially different from the first lattice constant; and a second stressor layer on the first stressor layer, wherein the second stressor has a third lattice constant substantially different from the first and the second lattice constants.

    摘要翻译： 半导体结构包括具有第一晶格常数的半导体衬底; 半导体衬底上的栅极电介质; 半导体衬底上的栅电极; 以及在半导体衬底中具有至少一部分并且与栅电极相邻的应力源。 应力源在与栅电极相邻的一侧具有倾斜的侧壁。 应激源包括具有与第一晶格常数基本不同的第二晶格常数的第一应力层; 以及在所述第一应力层上的第二应力层，其中所述第二应力源具有与所述第一和第二晶格常数基本不同的第三晶格常数。

    MOS devices with partial stressor channel
    6.
    发明授权
    MOS devices with partial stressor channel 有权
    具有部分应力通道的MOS器件

    公开(公告)号：US07554110B2

    公开(公告)日：2009-06-30

    申请号：US11732380

    申请日：2007-04-03

    申请人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    发明人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    IPC分类号： H01L29/06

    CPC分类号： H01L29/7848 ,  H01L29/045 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7836 ,  Y10S438/938

    摘要： A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and a stressor having at least a portion in the semiconductor substrate and adjacent the gate electrode. The stressor has a tilted sidewall on a side adjacent the gate electrode. The stressor includes a first stressor layer having a second lattice constant substantially different from the first lattice constant; and a second stressor layer on the first stressor layer, wherein the second stressor has a third lattice constant substantially different from the first and the second lattice constants.

    摘要翻译： 半导体结构包括具有第一晶格常数的半导体衬底; 半导体衬底上的栅极电介质; 半导体衬底上的栅电极; 以及在半导体衬底中具有至少一部分并且与栅电极相邻的应力源。 应力源在与栅电极相邻的一侧具有倾斜的侧壁。 应激源包括具有与第一晶格常数基本不同的第二晶格常数的第一应力层; 以及第一应力层上的第二应力层，其中第二应力源具有与第一和第二晶格常数基本上不同的第三晶格常数。

    MOS devices with partial stressor channel
    7.
    发明申请
    MOS devices with partial stressor channel 有权
    具有部分应力通道的MOS器件

    公开(公告)号：US20080067557A1

    公开(公告)日：2008-03-20

    申请号：US11732380

    申请日：2007-04-03

    申请人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    发明人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7848 ,  H01L29/045 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7836 ,  Y10S438/938

    摘要： A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and a stressor having at least a portion in the semiconductor substrate and adjacent the gate electrode. The stressor has a tilted sidewall on a side adjacent the gate electrode. The stressor includes a first stressor layer having a second lattice constant substantially different from the first lattice constant; and a second stressor layer on the first stressor layer, wherein the second stressor has a third lattice constant substantially different from the first and the second lattice constants.

    摘要翻译： 半导体结构包括具有第一晶格常数的半导体衬底; 半导体衬底上的栅极电介质; 半导体衬底上的栅电极; 以及在半导体衬底中具有至少一部分并且与栅电极相邻的应力源。 应力源在与栅电极相邻的一侧具有倾斜的侧壁。 应激源包括具有与第一晶格常数基本不同的第二晶格常数的第一应力层; 以及在所述第一应力层上的第二应力层，其中所述第二应力源具有与所述第一和第二晶格常数基本不同的第三晶格常数。

    METHOD OF TEMPERATURE DETERMINATION FOR DEPOSITION REACTORS
    8.
    发明申请
    METHOD OF TEMPERATURE DETERMINATION FOR DEPOSITION REACTORS 有权
    沉积反应器温度测定方法

    公开(公告)号：US20120012047A1

    公开(公告)日：2012-01-19

    申请号：US12835789

    申请日：2010-07-14

    申请人： Jhi-Cherng LU ,  Jr-Hung LI ,  Chii-Horng LI ,  Pang-Yen TSAI ,  Bing-Hung CHEN ,  Tze-Liang LEE

    发明人： Jhi-Cherng LU ,  Jr-Hung LI ,  Chii-Horng LI ,  Pang-Yen TSAI ,  Bing-Hung CHEN ,  Tze-Liang LEE

    IPC分类号： C30B25/10

    CPC分类号： C30B25/16 ,  C30B29/06 ,  C30B29/08 ,  C30B29/52 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L22/10 ,  H01L22/12 ,  Y10T117/1004 ,  Y10T117/1008

    摘要： A method of determining a temperature in a deposition reactor includes the steps of depositing a first epitaxial layer of silicon germanium on a substrate, depositing a second epitaxial layer of silicon above the first epitaxial layer, measuring the thickness of the second epitaxial layer and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer. The method may also include heating the deposition reactor to approximately a predetermined temperature using a heating device and a temperature measuring device and generating a signal indicative of a temperature within the deposition reactor. The method may also contain the steps of comparing the measured thickness with a predetermined thickness of the second epitaxial layer corresponding to the predetermined temperature and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer and the predetermined thickness of the second epitaxial layer.

    摘要翻译： 确定沉积反应器中的温度的方法包括以下步骤：将硅锗的第一外延层沉积在衬底上，在第一外延层上沉积硅的第二外延层，测量第二外延层的厚度并确定 使用测量的第二外延层的厚度在沉积反应器中的温度。 该方法还可以包括使用加热装置和温度测量装置将沉积反应器加热至约预定温度，并产生指示沉积反应器内的温度的信号。 该方法还可以包括以下步骤：将测量的厚度与对应于预定温度的第二外延层的预定厚度进行比较，并使用第二外延层的测量厚度和第二外延层的预定厚度来确定沉积反应器中的温度 外延层。

    MOS Devices with Partial Stressor Channel
    9.
    发明申请
    MOS Devices with Partial Stressor Channel 有权
    具有部分应力通道的MOS器件

    公开(公告)号：US20090224337A1

    公开(公告)日：2009-09-10

    申请号：US12467847

    申请日：2009-05-18

    申请人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    发明人： Ming-Hua Yu ,  Mong-Song Liang ,  Tze-Liang Lee ,  Jr-Hung Li

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7848 ,  H01L29/045 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7836 ,  Y10S438/938

    摘要： A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and a stressor having at least a portion in the semiconductor substrate and adjacent the gate electrode. The stressor has a tilted sidewall on a side adjacent the gate electrode. The stressor includes a first stressor layer having a second lattice constant substantially different from the first lattice constant; and a second stressor layer on the first stressor layer, wherein the second stressor has a third lattice constant substantially different from the first and the second lattice constants.

    摘要翻译： 半导体结构包括具有第一晶格常数的半导体衬底; 半导体衬底上的栅极电介质; 半导体衬底上的栅电极; 以及在半导体衬底中具有至少一部分并且与栅电极相邻的应力源。 应力源在与栅电极相邻的一侧具有倾斜的侧壁。 应激源包括具有与第一晶格常数基本不同的第二晶格常数的第一应力层; 以及第一应力层上的第二应力层，其中第二应力源具有与第一和第二晶格常数基本上不同的第三晶格常数。