公开(公告)号：US08441104B1

公开(公告)日：2013-05-14

申请号：US13297571

申请日：2011-11-16

申请人： Lejun Hu ,  Srivatsan Parthasarathy ,  Michael Coln ,  Javier Salcedo

发明人： Lejun Hu ,  Srivatsan Parthasarathy ,  Michael Coln ,  Javier Salcedo

IPC分类号： H01L27/02

CPC分类号： H01L29/0646 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/1446 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.

公开(公告)号：US20050151160A1

公开(公告)日：2005-07-14

申请号：US11032154

申请日：2005-01-11

申请人： Javier Salcedo ,  Juin Liou ,  Joseph Bernier ,  Donald Whitney

发明人： Javier Salcedo ,  Juin Liou ,  Joseph Bernier ,  Donald Whitney

IPC分类号： H01L27/02 ,  H01L29/72

CPC分类号： H01L27/0262 ,  H01L29/7436

摘要： A complementary SCR-based structure enables a tunable holding voltage for robust and versatile ESD protection. The structure are n-channel high-holding-voltage low-voltage-trigger silicon controller rectifier (N-HHLVTSCR) device and p-channel high-holding-voltage low-voltage-trigger silicon controller rectifier (P-HHLVTSCR) device. The regions of the N-HHLVTSCR and P-HHLVTSCR devices are formed during normal processing steps in a CMOS or BICMOS process. The spacing and dimensions of the doped regions of N-HHLVTSCR and P-HHLVTSCR devices are used to produce the desired characteristics. The tunable HHLVTSCRs makes possible the use of this protection circuit in a broad range of ESD applications including protecting integrated circuits where the I/O signal swing can be either within the range of the bias of the internal circuit or below/above the range of the bias of the internal circuit.

摘要翻译： 互补的基于SCR的结构使得可调谐的保持电压具有稳健和通用的ESD保护。 结构是n沟道高保持电压低压触发硅控整流器（N-HHLVTSCR）器件和p沟道高保持电压低压触发硅控整流器（P-HHLVTSCR）器件。 N-HHLVTSCR和P-HHLVTSCR器件的区域在CMOS或BICMOS工艺的正常处理步骤期间形成。 使用N-HHLVTSCR和P-HHLVTSCR器件的掺杂区域的间距和尺寸来产生所需的特性。 可调谐的HHLVTSCR可以在广泛的ESD应用中使用该保护电路，包括保护集成电路，其中I / O信号摆幅可以在内部电路的偏置范围内或低于/高于 内部电路的偏置。

公开(公告)号：US08456217B2

公开(公告)日：2013-06-04

申请号：US13196196

申请日：2011-08-02

申请人： Stephan Goldstein ,  Javier Salcedo

发明人： Stephan Goldstein ,  Javier Salcedo

IPC分类号： H03L5/00

CPC分类号： H03K19/017509

摘要： An interface circuit for controlling a cross-domain signal link between a first circuit domain and a second circuit domain in a circuit may include first and second controllers, each of the first and second controllers including a first input coupled to a first voltage source of the first circuit domain and a second input coupled to a second voltage source of the second circuit domain. The interface circuit may further include a first switch controlled by an output of the first controller, the first switch including a first end coupled to the cross-domain signal link and a second end coupled to a first defined voltage state, and a second switch controlled by an output of the second controller, the second switch including a first end coupled to the cross-domain signal link and a second end coupled to a second defined voltage state, in which during a power-up of the circuit, if one of the first and second voltage sources is unavailable, at least one of the first and second controllers generates a control signal to engage at least one of the first and second switches and pull the cross-domain signal link to one of the first and second defined voltage states, while providing cross-domain protection against field-induced charge device model (FICDM) stress conditions at small drivers and receiver inputs connected to the signal interface link.

摘要翻译： 用于控制电路中第一电路域和第二电路域之间的跨域信号链路的接口电路可以包括第一和第二控制器，第一和第二控制器中的每一个包括耦合到第一电压源的第一电压源的第一输入端 第一电路域和耦合到第二电路域的第二电压源的第二输入。 接口电路还可以包括由第一控制器的输出控制的第一开关，第一开关包括耦合到跨域信号链路的第一端和耦合到第一限定电压状态的第二端，以及第二开关控制 通过第二控制器的输出，第二开关包括耦合到跨域信号链路的第一端和耦合到第二限定电压状态的第二端，其中在电路的加电期间，如果其中一个 第一和第二电压源不可用，第一和第二控制器中的至少一个控制器产生控制信号以接合第一和第二开关中的至少一个，并将跨域信号链路拉至第一和第二限定电压状态之一 ，同时在连接到信号接口链路的小型驱动器和接收器输入端提供针对场感应充电器件模型（FICDM）应力条件的跨域保护。

公开(公告)号：US08222698B2

公开(公告)日：2012-07-17

申请号：US12686003

申请日：2010-01-12

申请人： Javier Salcedo ,  Alan Righter

发明人： Javier Salcedo ,  Alan Righter

IPC分类号： H01L23/62 ,  H01L23/58 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L27/0262 ,  H01L24/05 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/742 ,  H01L29/7436 ,  H01L29/87 ,  H01L2224/05093 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01088 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00

摘要： In various embodiments, the invention relates to bond pad structures including planar transistor structures operable as over-voltage clamps.

摘要翻译： 在各种实施例中，本发明涉及包括可操作为过电压钳位的平面晶体管结构的接合焊盘结构。

公开(公告)号：US08525299B2

公开(公告)日：2013-09-03

申请号：US13786646

申请日：2013-03-06

申请人： Lejun Hu ,  Srivatsan Parthasarathy ,  Michael Coln ,  Javier Salcedo

发明人： Lejun Hu ,  Srivatsan Parthasarathy ,  Michael Coln ,  Javier Salcedo

IPC分类号： H01L27/02

CPC分类号： H01L29/0646 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/1446 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.

摘要翻译： 形成在衬底上的半导体器件包括第一二极管结形成，第二二极管结形成以及至少一个通硅通孔（TSV），其中第一二极管的阴极和阳极交叉连接到 通过至少一个TSV来实现第二二极管的阳极和阴极，以实现基于硅通孔的集成电路中的电鲁棒性，包括用于信号处理应用的光敏器件和电路。

公开(公告)号：US20130175669A1

公开(公告)日：2013-07-11

申请号：US13786646

申请日：2013-03-06

申请人： Lejun HU ,  Srivatsan Parthasarathy ,  Michael COLN ,  Javier SALCEDO

发明人： Lejun HU ,  Srivatsan Parthasarathy ,  Michael COLN ,  Javier SALCEDO

IPC分类号： H01L29/06

CPC分类号： H01L29/0646 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/1446 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.

公开(公告)号：US20080012044A1

公开(公告)日：2008-01-17

申请号：US11691018

申请日：2007-03-26

申请人： Javier SALCEDO ,  Juin Liou ,  Joseph Bernier ,  Donald Whitney

发明人： Javier SALCEDO ,  Juin Liou ,  Joseph Bernier ,  Donald Whitney

IPC分类号： H01L29/72 ,  H01L29/74

CPC分类号： H01L27/0262 ,  H01L29/7436

摘要： A complementary SCR-based structure enables a tunable holding voltage for robust and versatile ESD protection. The structureare n-channel high-holding-voltage low-voltage -trigger silicon controller rectifier (N-HHLVTSCR) device and p-channel high-holding-voltage low-voltage -trigger silicon controller rectifier (P-HHLVTSCR) device. The regions of the N-HHLVTSCR and P-HHLVTSCR devices are formed during normal processing steps in a CMOS or BICMOS process. The spacing and dimensions of the doped regions of N-HHLVTSCR and P-HHLVTSCR devices are used to produce the desired characteristics. The tunable HHLVTSCRs makes possible the use of this protection circuit in a broad range of ESD applications including protecting integrated circuits where the I/O signal swing can be either within the range of the bias of the internal circuit or below/above the range of the bias of the internal circuit.

摘要翻译： 互补的基于SCR的结构使得可调谐的保持电压具有稳健和通用的ESD保护。 结构为n沟道高压保护电压低电压触发器硅控整流器（N-HHLVTSCR）器件和p沟道高保持电压低电压触发器硅控整流器（P-HHLVTSCR）器件。 N-HHLVTSCR和P-HHLVTSCR器件的区域在CMOS或BICMOS工艺的正常处理步骤期间形成。 使用N-HHLVTSCR和P-HHLVTSCR器件的掺杂区域的间距和尺寸来产生所需的特性。 可调谐的HHLVTSCR可以在广泛的ESD应用中使用该保护电路，包括保护集成电路，其中I / O信号摆幅可以在内部电路的偏置范围内或低于/高于 内部电路的偏置。

公开(公告)号：US20130119502A1

公开(公告)日：2013-05-16

申请号：US13297571

申请日：2011-11-16

申请人： Lejun HU ,  Srivatsan PARTHASARATHY ,  Michael COLN ,  Javier SALCEDO

发明人： Lejun HU ,  Srivatsan PARTHASARATHY ,  Michael COLN ,  Javier SALCEDO

IPC分类号： H01L27/144 ,  H01L27/06

CPC分类号： H01L29/0646 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/1446 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.

摘要翻译： 形成在衬底上的半导体器件包括第一二极管结形成，第二二极管结形成以及至少一个通硅通孔（TSV），其中第一二极管的阴极和阳极交叉连接到 通过至少一个TSV来实现第二二极管的阳极和阴极，以实现基于硅通孔的集成电路中的电鲁棒性，包括用于信号处理应用的光敏器件和电路。

公开(公告)号：US20130033299A1

公开(公告)日：2013-02-07

申请号：US13196196

申请日：2011-08-02

申请人： Stephan Goldstein ,  Javier Salcedo

发明人： Stephan Goldstein ,  Javier Salcedo

IPC分类号： H03L5/00

CPC分类号： H03K19/017509

摘要： An interface circuit for controlling a cross-domain signal link between a first circuit domain and a second circuit domain in a circuit may include first and second controllers, each of the first and second controllers including a first input coupled to a first voltage source of the first circuit domain and a second input coupled to a second voltage source of the second circuit domain. The interface circuit may further include a first switch controlled by an output of the first controller, the first switch including a first end coupled to the cross-domain signal link and a second end coupled to a first defined voltage state, and a second switch controlled by an output of the second controller, the second switch including a first end coupled to the cross-domain signal link and a second end coupled to a second defined voltage state, in which during a power-up of the circuit, if one of the first and second voltage sources is unavailable, at least one of the first and second controllers generates a control signal to engage at least one of the first and second switches and pull the cross-domain signal link to one of the first and second defined voltage states, while providing cross-domain protection against field-induced charge device model (FICDM) stress conditions at small drivers and receiver inputs connected to the signal interface link.

摘要翻译： 用于控制电路中的第一电路域和第二电路域之间的跨域信号链路的接口电路可以包括第一和第二控制器，第一和第二控制器中的每一个包括耦合到第一电压源的第一电压源的第一输入端 第一电路域和耦合到第二电路域的第二电压源的第二输入。 接口电路还可以包括由第一控制器的输出控制的第一开关，第一开关包括耦合到跨域信号链路的第一端和耦合到第一限定电压状态的第二端，以及第二开关控制 通过第二控制器的输出，第二开关包括耦合到跨域信号链路的第一端和耦合到第二限定电压状态的第二端，其中在电路的加电期间，如果其中一个 第一和第二电压源不可用，第一和第二控制器中的至少一个控制器产生控制信号以接合第一和第二开关中的至少一个，并将跨域信号链路拉至第一和第二限定电压状态之一 ，同时在连接到信号接口链路的小型驱动器和接收器输入端提供针对场感应充电器件模型（FICDM）应力条件的跨域保护。

公开(公告)号：US20100327342A1

公开(公告)日：2010-12-30

申请号：US12493692

申请日：2009-06-29

申请人： Javier Salcedo ,  Alan Righter

发明人： Javier Salcedo ,  Alan Righter

IPC分类号： H01L29/78

CPC分类号： H01L29/66659 ,  H01L27/0262 ,  H01L29/7436 ,  H01L29/78 ,  H01L29/87

摘要： In various embodiments, the invention relates to semiconductor structures, such as planar MOS structures, suitable as voltage clamp devices. Additional doped regions formed in the structures may improve over-voltage protection characteristics.

摘要翻译： 在各种实施例中，本发明涉及适合作为电压钳位装置的半导体结构，例如平面MOS结构。 在结构中形成的附加掺杂区域可以提高过电压保护特性。