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公开(公告)号：US06746897B2
公开(公告)日：2004-06-08
申请号：US10008616
申请日：2001-10-23
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
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公开(公告)号：US06365432B1
公开(公告)日：2002-04-02
申请号：US09487682
申请日：2000-01-19
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
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公开(公告)号：US5976912A
公开(公告)日：1999-11-02
申请号：US716362
申请日：1996-09-18
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L21/48 , H01L21/56 , H01L21/58 , H01L21/68 , H01L23/31 , H01L23/498 , H05K3/20 , H01L23/28
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
摘要翻译： PCT No.PCT / JP95 / 00492 Sec。 371日期1996年9月18日 102（e）1996年9月18日PCT PCT 1995年3月17日PCT公布。 公开号WO95 / 26047 日期1995年9月28日提供了半导体封装基板，可以满足半导体高集成化的趋势。 将镍层电镀在电镀铜箔上以形成布线图案。 将LSI芯片安装在铜箔上，通过引线接合连接LSI芯片和布线图案的端子，然后用半导体密封环氧树脂密封。 只有铜箔用碱蚀刻剂溶解掉才能暴露镍。 对于具有低铜溶力的镍剥离器，去除镍层以露出布线图案。 涂覆阻焊剂，并且以使连接端子部分露出的方式形成图案。 将焊球放置在布线图案的露出部分，然后熔合。 布线图案通过焊球与外部印刷电路板连接。
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公开(公告)号：US07187072B2
公开(公告)日：2007-03-06
申请号：US10705706
申请日：2003-11-10
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L21/00
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
摘要翻译： 提供了半导体封装基板，可以满足向半导体集成度高的趋势。 将镍层电镀在电镀铜箔上以形成布线图案。 将LSI芯片安装在铜箔上，通过引线接合连接LSI芯片和布线图案的端子，然后用半导体密封环氧树脂密封。 只有铜箔用碱蚀刻剂溶解掉才能暴露镍。 对于具有低铜溶力的镍剥离器，去除镍层以露出布线图案。 涂覆阻焊剂，并且以使连接端子部分露出的方式形成图案。 将焊球放置在布线图案的露出部分，然后熔合。 布线图案通过焊球与外部印刷电路板连接。
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公开(公告)号：US5504992A
公开(公告)日：1996-04-09
申请号：US268866
申请日：1994-06-30
CPC分类号： H05K3/428 , H05K2201/0355 , H05K2201/0361 , H05K2201/09509 , H05K2201/09563 , H05K2201/09781 , H05K2203/0152 , H05K2203/025 , H05K2203/0376 , H05K2203/0384 , H05K2203/0726 , H05K2203/0733 , H05K2203/1476 , H05K3/4652 , Y10T29/49156 , Y10T29/49165
摘要： The object of the present invention is to provide a wiring board fabrication process which is, not only so smooth on the surface that a fine wiring pattern can be formed thereon, but also suitable for mounting electronic parts having fine pitch terminals.The present invention is a fabrication process of a wiring board which comprises a wiring conductive line embedded in the surface of an insulating substrate so that the upper face of the conductive line and the surface of the substrate are flat, and a through-hole land which is a conductive portion projected from the surface of the substrate in a through-hole portion, which is characterized in removing the conductive portion projected from the surface of the substrate in the through-hole portion so as to have a flat surface on the surface of the substrate.
摘要翻译： 本发明的目的在于提供一种线路板制造工艺，不仅在表面上光滑地形成精细的布线图案，而且还适合于安装具有细间距端子的电子部件。 本发明是一种布线板的制造工艺，其包括布置在绝缘基板的表面上的布线导线，使得导线的上表面和基板的表面平坦，以及通孔焊盘， 是在通孔部中从基板的表面突出的导电部，其特征在于，除去从通孔部中的基板的表面突出的导电部，使其在表面上具有平坦的表面 底物。
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