Method and apparatus for generating a phase-locked output signal
    1.
    发明授权
    Method and apparatus for generating a phase-locked output signal 有权
    用于产生锁相输出信号的方法和装置

    公开(公告)号:US07574185B2

    公开(公告)日:2009-08-11

    申请号:US11015132

    申请日:2004-12-17

    Applicant: Herbert L. Ko

    Inventor: Herbert L. Ko

    CPC classification number: H03L7/23 H03L7/1976

    Abstract: A method and apparatus for generating a phase-locked output signal includes generating an intermediate signal phase locked to an input signal by frequency dividing the intermediate signal by a temporally-varying divide ratio sequence to generate a first feedback signal and phase comparing the first feedback signal with the input signal. An output signal is generated phase locked to the first feedback signal by frequency dividing the output signal by the temporally-varying divide ratio sequence to generate a second feedback signal and phase comparing the second feedback signal with the first feedback signal.

    Abstract translation: 一种用于产生锁相输出信号的方法和装置,包括:通过对中间信号进行频分割时间变化的分频比序列来产生锁相到输入信号的中间信号,以产生第一反馈信号和相位比较第一反馈信号 与输入信号。 产生锁相到第一反馈信号的输出信号,通过对输出信号进行频率分频,以产生第二反馈信号,并将第二反馈信号与第一反馈信号相比较。

    Superconducting quantizer and A/D converter system
    3.
    发明授权
    Superconducting quantizer and A/D converter system 失效
    超导量化器和A / D转换器系统

    公开(公告)号:US5351049A

    公开(公告)日:1994-09-27

    申请号:US936196

    申请日:1992-08-26

    CPC classification number: H03M1/361

    Abstract: A periodic superconducting device signal quantizer for the fine resolution of the magnetic flux quantum .PHI..sub.0 =2*10.sup.-15 Wb realized by a phase wheel 20 or a phase tree 100. The signal quantizer is used in conjunction with a superconducting A/D converter for achieving the 8-11 bit A/D converters with gigahertz, multi-gigahertz bandwidth. A method for an extra-bit resolution of the analog signal using the signal quantizer is described.

    Abstract translation: 用于通过相轮20或相位树100实现的用于精确分辨为磁通量子PHI 0 = 2×10-15Wb的周期性超导装置信号量化器。信号量化器与超导A / D转换器 用于实现千兆赫兹,千兆赫兹带宽的8-11位A / D转换器。 描述了使用信号量化器对模拟信号的额外位分辨率的方法。

    Superconducting magnetic field sensing apparatus having digital output,
on-chip quantum flux packet feedback and high bias margins
    5.
    发明授权
    Superconducting magnetic field sensing apparatus having digital output, on-chip quantum flux packet feedback and high bias margins 失效
    具有数字输出,片上量子通量分组反馈和高偏差裕度的超导磁场感测装置

    公开(公告)号:US5248941A

    公开(公告)日:1993-09-28

    申请号:US686714

    申请日:1991-04-17

    CPC classification number: G01R33/0356 Y10S505/846

    Abstract: A magnetometer having high sensitivity and high resolution is achieved using superconductive circuit elements. The magnetometer includes a pick-up coil, amplifying transformer quantum flux parametron (QFP), latch, feedback gate and feedback inductor fabricated with superconducting elements and coupled to a bidirectional counter. The magnetometer implements an on-chip negative feedback loop. The pick-up coil senses an external magnetic field or gradient resulting in an induced current which is amplified and fed to the QFP which generates a directional indicator signal sent to the latch. When the polarity of the indicator is indicated as corresponding to the polarity of a latch clock signal, a current signal is sent to the feedback gate causing a packet of quantum flux to be generated. The packet is fed back through the feedback inductor, inducing a current in the pick-up coil which opposes the induced current attributable to the external magnetic field. When the induced current in the pick-up coil attributable to the external magnetic field is offset by the induced current attributable to the feedback flux, the magnetometer stabilizes.

    Abstract translation: 使用超导电路元件实现了具有高灵敏度和高分辨率的磁力计。 磁力计包括拾波线圈,放大变压器量子通量参量(QFP),锁存器,反馈栅极和用超导元件制造的反馈电感器,并耦合到双向计数器。 磁力计实现片上负反馈回路。 拾取线圈感测外部磁场或梯度,导致感应电流被放大并馈送到产生指向锁存器的方向指示器信号的QFP。 当指示符的极性表示为对应于锁存时钟信号的极性时,电流信号被发送到反馈门,导致产生量子通量的分组。 该分组通过反馈电感器反馈,引起拾波线圈中与归因于外部磁场的感应电流相对的电流。 当归因于外部磁场的拾波线圈中的感应电流被归因于反馈通量的感应电流偏移时,磁力计稳定。

    Single-chip duplexer with isolation shield between transmit and receive filters
    6.
    发明授权
    Single-chip duplexer with isolation shield between transmit and receive filters 有权
    单片双工器,在发射和接收滤波器之间具有隔离屏蔽

    公开(公告)号:US08680944B2

    公开(公告)日:2014-03-25

    申请号:US13005807

    申请日:2011-01-13

    CPC classification number: H03H9/0571 H03H9/542 H03H9/706

    Abstract: A single-chip duplexer, interfacing a receiver and a transmitter with a common antenna, includes transmit and receive filters, an annular sealing ring and a conductive stripe. The transmit filter is connected between the antenna and the transmitter, and has a transmit passband. The receive filter is connected between the antenna and the receiver, and has a receive passband different from the transmit passband. The annular sealing ring is connected between a surface of the chip and a surface of a cap to form a sealed cavity between the chip and the cap. The conductive stripe extends across at least a portion of the surface of the chip between the transmit filter and the receive filter, the conductive stripe being directly connected to the sealing ring and electrically connected to ground. The conductive stripe provides at least one of magnetic shielding and capacitive shielding between the transmit filter and the receive filter.

    Abstract translation: 接收机和具有公共天线的发射机的单芯片双工器包括发射和接收滤波器,环形密封环和导电条纹。 发射滤波器连接在天线和发射机之间,并具有发射通带。 接收滤波器连接在天线和接收机之间,并且具有与发射通带不同的接收通带。 环形密封环连接在芯片的表面和盖的表面之间,以在芯片和盖之间形成密封空腔。 导电条纹跨过传输滤波器和接收滤波器之间的芯片表面的至少一部分延伸,导电条直接连接到密封环并电连接到地。 导电条纹在发射滤波器和接收滤波器之间提供磁屏蔽和电容屏蔽中的至少一个。

    SINGLE-CHIP DUPLEXER WITH ISOLATION SHIELD BETWEEN TRANSMIT AND RECEIVE FILTERS
    7.
    发明申请
    SINGLE-CHIP DUPLEXER WITH ISOLATION SHIELD BETWEEN TRANSMIT AND RECEIVE FILTERS 有权
    单芯片双工器与发射和接收滤波器之间的隔离屏蔽

    公开(公告)号:US20120182087A1

    公开(公告)日:2012-07-19

    申请号:US13005807

    申请日:2011-01-13

    CPC classification number: H03H9/0571 H03H9/542 H03H9/706

    Abstract: A single-chip duplexer, interfacing a receiver and a transmitter with a common antenna, includes transmit and receive filters, an annular sealing ring and a conductive stripe. The transmit filter is connected between the antenna and the transmitter, and has a transmit passband. The receive filter is connected between the antenna and the receiver, and has a receive passband different from the transmit passband. The annular sealing ring is connected between a surface of the chip and a surface of a cap to form a sealed cavity between the chip and the cap. The conductive stripe extends across at least a portion of the surface of the chip between the transmit filter and the receive filter, the conductive stripe being directly connected to the sealing ring and electrically connected to ground. The conductive stripe provides at least one of magnetic shielding and capacitive shielding between the transmit filter and the receive filter.

    Abstract translation: 接收机和具有公共天线的发射机的单芯片双工器包括发射和接收滤波器,环形密封环和导电条纹。 发射滤波器连接在天线和发射机之间,并具有发射通带。 接收滤波器连接在天线和接收机之间,并且具有与发射通带不同的接收通带。 环形密封环连接在芯片的表面和盖的表面之间,以在芯片和盖之间形成密封空腔。 导电条纹跨过传输滤波器和接收滤波器之间的芯片表面的至少一部分延伸,导电条直接连接到密封环并电连接到地。 导电条纹在发射滤波器和接收滤波器之间提供磁屏蔽和电容屏蔽中的至少一个。

    Method and apparatus for variable sigma-delta modulation
    8.
    发明授权
    Method and apparatus for variable sigma-delta modulation 有权
    用于可变Σ-Δ调制的方法和装置

    公开(公告)号:US07321634B2

    公开(公告)日:2008-01-22

    申请号:US11015608

    申请日:2004-12-17

    Applicant: Herbert L. Ko

    Inventor: Herbert L. Ko

    CPC classification number: H03M7/3015

    Abstract: A method and apparatus for modulating a digital input signal is disclosed. The digital input signal is partitioned into a less-significant bit signal and a more-significant bit signal. A lower-order modulation of the less-significant bit signal is performed to generate an intermediate output signal. The intermediate output signal is appended to the more-significant bit signal to form an intermediate input signal. A higher-order modulation of the intermediate input signal is performed to generate a digital output signal. The higher-order modulation is of an order higher than the lower-order modulation. A phase-locked loop using the method and apparatus is disclosed.

    Abstract translation: 公开了一种用于调制数字输入信号的方法和装置。 数字输入信号被划分为较低有效位信号和更高有效位信号。 执行较低有效位信号的低阶调制以产生中间输出信号。 中间输出信号附加到更高有效位信号以形成中间输入信号。 执行中间输入信号的高阶调制以产生数字输出信号。 高阶调制的次序比低阶调制高。 公开了使用该方法和装置的锁相环。

    Mutual frequency locking across a link
    9.
    发明授权
    Mutual frequency locking across a link 失效
    跨链接的互锁锁定

    公开(公告)号:US06922402B1

    公开(公告)日:2005-07-26

    申请号:US09490742

    申请日:2000-01-25

    Applicant: Herbert L. Ko

    Inventor: Herbert L. Ko

    CPC classification number: H03J7/02

    Abstract: Transmitter frequency locking across a full duplex communications link. An offset in one transmitter results in an offset at the corresponding receiver. That receiver offset shifts its transmitter in a corresponding manner, causing a correcting offset in the first receiver, which is used to correct the first transmitter. A first embodiment uses filtered received frequency information derived from a baseband demodulator to correct transmitter frequency. A second embodiment uses filtered frequency information from a frequency detector to correct transmitter frequency.

    Abstract translation: 发射机频率锁定在全双工通信链路上。 一个发射机的偏移量在相应的接收机处产生偏移。 该接收机偏移以相应的方式移动其发射机,导致第一接收机中的校正偏移,其用于校正第一发射机。 第一实施例使用从基带解调器导出的滤波的接收频率信息来校正发射机频率。 第二实施例使用来自频率检测器的滤波频率信息来校正发射机频率。

Patent Agency Ranking