公开(公告)号：US20110059590A1

公开(公告)日：2011-03-10

申请号：US12945860

申请日：2010-11-14

申请人： Li-Shyue Lai ,  Chao-Hsiung Wang ,  Denny Tang ,  Wen-Chin Lin

发明人： Li-Shyue Lai ,  Chao-Hsiung Wang ,  Denny Tang ,  Wen-Chin Lin

IPC分类号： H01L21/02

CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/1691

摘要： A phase change memory structure and method for forming the same, the method including providing a substrate comprising a conductive area; forming a spacer having a partially exposed sidewall region at an upper portion of the spacer defining a phase change memory element contact area; and, wherein the spacer bottom portion partially overlaps the conductive area. Both these two methods can reduce active area of a phase change memory element, therefore, reducing a required phase changing electrical current.

摘要翻译： 一种相变存储器结构及其形成方法，所述方法包括提供包括导电区域的衬底; 在间隔物的上部形成具有部分暴露的侧壁区域的间隔物，其限定相变存储元件接触区域; 并且其中所述间隔件底部部分与所述导电区域重叠。 这两种方法都可以减少相变存储元件的有效面积，从而减少所需的相变电流。

公开(公告)号：US07858980B2

公开(公告)日：2010-12-28

申请号：US10791607

申请日：2004-03-01

申请人： Li-Shyue Lai ,  Chao-Hsiung Wang ,  Denny Tang ,  Wen-Chin Lin

发明人： Li-Shyue Lai ,  Chao-Hsiung Wang ,  Denny Tang ,  Wen-Chin Lin

IPC分类号： H01L29/18

CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/1691

摘要： A phase change memory structure and method for forming the same, the method including providing a substrate comprising a conductive area; forming a spacer having a partially exposed sidewall region at an upper portion of the spacer defining a phase change memory element contact area; and, wherein the spacer bottom portion partially overlaps the conductive area. Both these two methods can reduce active area of a phase change memory element, therefore, reducing a required phase changing electrical current.

摘要翻译： 一种相变存储器结构及其形成方法，所述方法包括提供包括导电区域的衬底; 在间隔物的上部形成具有部分暴露的侧壁区域的间隔物，其限定相变存储元件接触区域; 并且其中所述间隔件底部部分与所述导电区域重叠。 这两种方法都可以减少相变存储元件的有效面积，从而减少所需的相变电流。

公开(公告)号：US07688616B2

公开(公告)日：2010-03-30

申请号：US11764618

申请日：2007-06-18

申请人： Yu-Jen Wang ,  Hsu-Chen Chang ,  Denny Tang

发明人： Yu-Jen Wang ,  Hsu-Chen Chang ,  Denny Tang

IPC分类号： G11C11/00

CPC分类号： G11C11/1693 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675

摘要： Thus, the present disclosure provides a method of programming a memory array. At least one memory cell including a magnetic element is provided. At least one current source coupled to the magnetic element is provided. A unipolar current is supplied from the at least one current source to the magnetic element at a plurality of non-zero current levels.

摘要翻译： 因此，本公开提供了一种对存储器阵列进行编程的方法。 提供包括磁性元件的至少一个存储单元。 提供耦合到磁性元件的至少一个电流源。 单极电流从多个非零电流电平从至少一个电流源提供给磁性元件。

公开(公告)号：US20080242071A1

公开(公告)日：2008-10-02

申请号：US11745862

申请日：2007-05-08

申请人： Ching-Ya Wang ,  Wen-Chin Lee ,  Denny Tang

发明人： Ching-Ya Wang ,  Wen-Chin Lee ,  Denny Tang

IPC分类号： H01L21/3205

CPC分类号： H01L21/28185 ,  H01L21/2822 ,  H01L29/51

摘要： The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate, forming a dielectric layer over the semiconductor substrate, treating the dielectric layer with a carbon containing group, forming a conductive layer over the treated dielectric layer, and patterning and etching the dielectric layer and conductive layer to form a gate structure. The carbon containing group includes an OCH3 or CN species.

摘要翻译： 本公开提供了制造半导体器件的方法。 该方法包括提供半导体衬底，在半导体衬底上形成电介质层，用含碳基团处理电介质层，在经处理的电介质层上形成导电层，以及图案化和蚀刻电介质层和导电层以形成 门结构。 含碳基团包括OCH 3或CN物质。

公开(公告)号：US20080239794A1

公开(公告)日：2008-10-02

申请号：US11840051

申请日：2007-08-16

申请人： Wen-Chin Lin ,  Denny Tang ,  Hsu-Chen Cheng

发明人： Wen-Chin Lin ,  Denny Tang ,  Hsu-Chen Cheng

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： Disclosed herein are toggle-mode magnetoresistive random access memory (MRAM) devices having small-angle toggle write lines, and related methods of toggle-mode switching MRAM devices. Also disclosed are layouts for MRAM devices constructed according to the disclosed principles. Generally speaking, the disclosed principles provide for non-orthogonally aligned toggle-mode write lines used to switch toggle-mode MRAM devices that employ a bias field to decrease the threshold needed to switch the magnetic state of each device. While the conventional toggle-mode write lines provide for the desired orthogonal orientation of the applied magnetic fields to optimize device switching, the use of a bias field affects this orthogonal orientation. By non-orthogonally aligning the two write lines as disclosed herein, the detrimental affect of the bias field may be compensated for such that the net fields applied to the device for both lines are again substantially orthogonal, as is desired.

摘要翻译： 这里公开了具有小角度切换写入线的触发模式磁阻随机存取存储器（MRAM）器件以及触发模式切换MRAM器件的相关方法。 还公开了根据所公开的原理构造的MRAM装置的布局。 一般来说，所公开的原理提供用于切换切换模式MRAM器件的非正交对准的触发模式写入线，其使用偏置场来降低切换每个器件的磁状态所需的阈值。 虽然常规的切换模式写入线提供所施加的磁场的期望的正交取向以优化器件切换，但偏置场的使用影响该正交取向。 如本文所公开的，通过非正交对准这两个写入线，可以补偿偏置场的有害影响，使得如所期望的那样，施加到两条线的器件的净场也基本正交。

公开(公告)号：US07417524B2

公开(公告)日：2008-08-26

申请号：US11353215

申请日：2006-02-13

申请人： Wai-Yi Lien ,  Denny Tang ,  Wen-Chin Lin ,  Chao-Hsiung Wang

发明人： Wai-Yi Lien ,  Denny Tang ,  Wen-Chin Lin ,  Chao-Hsiung Wang

IPC分类号： H01F5/00

CPC分类号： H01F17/0006 ,  H01F3/10 ,  H01F19/08 ,  H01F41/34 ,  H01F2017/0066 ,  H01F2017/0086

摘要： A semiconductor device having a semiconductor substrate and a first insulator overlying the semiconductor substrate. A spiral coil inductor overlies the first insulator and a second insulator overlies the spiral coil inductor. A patterned ferromagnetic film overlies the second insulator and a patterned magnetic-bias film overlies the patterned ferromagnetic film.

摘要翻译： 一种具有半导体衬底和覆盖半导体衬底的第一绝缘体的半导体器件。 螺旋线圈电感器覆盖在第一绝缘体上，第二绝缘体覆盖螺旋线圈电感器。 图案化的铁磁膜覆盖在第二绝缘体上，并且图案化的偏磁膜覆盖在图案化的铁磁膜上。

公开(公告)号：US07349243B2

公开(公告)日：2008-03-25

申请号：US11379527

申请日：2006-04-20

申请人： Wen-Chin Lin ,  Denny Tang ,  Hsu-Chen Cheng

发明人： Wen-Chin Lin ,  Denny Tang ,  Hsu-Chen Cheng

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： Disclosed herein are various embodiments of a 3-parameter switching technique for MRAM memory cells arranged on an MRAM array. The disclosed technique alters the relationship between the disturbance margin and write margin of MRAM arrays to reduce the overall disturbance for the arrays by either enlarging the write margin with respect to the original disturbance margin or enlarging the disturbance margin in view of the original write margin. In either approach, the disclosed 3-parameter switching technique successfully decreases the inadvertent writing of unselected bits.

摘要翻译： 这里公开了布置在MRAM阵列上的MRAM存储器单元的3参数切换技术的各种实施例。 所公开的技术改变MRAM阵列的扰动余量与写入余量之间的关系，以通过相对于原始干扰裕度放大写入裕度或者根据原始写入裕度来扩大扰动余量来减小阵列的整体干扰。 在任一方法中，所公开的3参数切换技术成功地减少了无选择位的无意写入。

公开(公告)号：US20070253244A1

公开(公告)日：2007-11-01

申请号：US11380777

申请日：2006-04-28

申请人： Chih-Huo Wu ,  Chih-Huang Lai ,  Yu-Jen Wang ,  Denny Tang

发明人： Chih-Huo Wu ,  Chih-Huang Lai ,  Yu-Jen Wang ,  Denny Tang

IPC分类号： G11C11/14

CPC分类号： G11C11/16 ,  G11C29/50 ,  G11C2029/5002

摘要： An apparatus and methods for a non-volatile magnetic random access memory (MRAM) device that includes a word line, a bit line, and a magnetic thin film memory element located at an intersection of the word and bit lines. The magnetic thin film memory element includes an alloy of a rare earth element and a transition metal element. The word line is operable to heat the magnetic thin film memory element when a heating current is applied. Heating of the magnetic thin film memory element to a predetermined temperature reduces its coercivity, which allows switching of the magnetic state upon application of a magnetic field. The magnetic state of the thin film element can be determined in accordance with principles of the Hall effect.

摘要翻译： 一种用于非易失磁性随机存取存储器（MRAM）器件的装置和方法，其包括位于字线和位线的交叉点处的字线，位线和磁薄膜存储元件。 磁性薄膜存储元件包括稀土元素和过渡金属元素的合金。 当施加加热电流时，字线可操作以加热磁性薄膜存储元件。 将磁性薄膜存储元件加热到预定温度降低其矫顽力，这允许在施加磁场时磁性转换。 薄膜元件的磁状态可以根据霍尔效应的原理来确定。

公开(公告)号：US20070247940A1

公开(公告)日：2007-10-25

申请号：US11379854

申请日：2006-04-24

申请人： Jhon Jhy Liaw ,  Denny Tang

发明人： Jhon Jhy Liaw ,  Denny Tang

IPC分类号： G11C11/00 ,  G11C7/02

CPC分类号： G11C11/16 ,  G11C7/02 ,  G11C7/062 ,  G11C7/067 ,  G11C7/14 ,  G11C13/0004 ,  G11C13/004

摘要： A method and circuits are disclosed for sensing an output of a memory cell having high and low resistance states. A high reference cell is in high resistance state and a low reference cell is in low resistance state. The resistance of the high reference cell in high resistance state has a first margin of difference from the resistance of the memory cell in high resistance state. The resistance of the low reference cell in low resistance state has a second margin of difference from the resistance of the memory cell in low resistance state. Differential amplifiers coupled to the memory cell and the high and low reference cells provide a digital output representing the resistance state of the memory cell.

摘要翻译： 公开了用于感测具有高和低电阻状态的存储单元的输出的方法和电路。 高参考电池处于高电阻状态，低参考电池处于低电阻状态。 高参考电池在高电阻状态下的电阻与高电阻状态下的存储单元的电阻具有第一差值。 低电阻状态下的低参考电池的电阻与低电阻状态下的存储单元的电阻具有第二差值。 耦合到存储器单元和高和低参考单元的差分放大器提供表示存储器单元的电阻状态的数字输出。

公开(公告)号：US20070247900A1

公开(公告)日：2007-10-25

申请号：US11379527

申请日：2006-04-20

申请人： Wen-Chin Lin ,  Denny Tang ,  H.C. Cheng

发明人： Wen-Chin Lin ,  Denny Tang ,  H.C. Cheng

IPC分类号： G11C11/14

CPC分类号： G11C11/16

摘要： Disclosed herein are various embodiments of a 3-parameter switching technique for MRAM memory cells arranged on an MRAM array. The disclosed technique alters the relationship between the disturbance margin and write margin of MRAM arrays to reduce the overall disturbance for the arrays by either enlarging the write margin with respect to the original disturbance margin or enlarging the disturbance margin in view of the original write margin. In either approach, the disclosed 3-parameter switching technique successfully decreases the inadvertent writing of unselected bits.

摘要翻译： 这里公开了布置在MRAM阵列上的MRAM存储器单元的3参数切换技术的各种实施例。 所公开的技术改变MRAM阵列的扰动余量与写入余量之间的关系，以通过相对于原始干扰裕度放大写入裕度或者根据原始写入裕度来扩大扰动余量来减小阵列的整体干扰。 在任一方法中，所公开的3参数切换技术成功地减少了无选择位的无意写入。