公开(公告)号：US20110283164A1

公开(公告)日：2011-11-17

申请号：US12781744

申请日：2010-05-17

Applicant: Yu-Shuen TANG ,  CHUANG CHENG

Inventor： Yu-Shuen TANG ,  CHUANG CHENG

IPC: H03M13/05 ,  G06F11/10

CPC classification number: H03M13/1105 ,  G06F11/10 ,  G06F11/1016 ,  H03M13/1102 ,  H03M13/152 ,  H03M13/353 ,  H03M13/3707 ,  H03M13/6511 ,  H03M13/6513 ,  H03M13/6516

Abstract: A configurable coding system and method of multiple error correcting codes (ECCs) for a memory device or devices are disclosed. The system includes an ECC codec that selectively performs different error corrections with different parameters. The system also includes means for providing a selected parameter to the ECC codec for initializing the ECC codec. The parameter used for initializing the ECC codec is an error-free parameter.

Abstract translation: 公开了一种用于存储器件或设备的多个纠错码（ECC）的可配置编码系统和方法。 该系统包括ECC编解码器，其选择性地执行具有不同参数的不同错误校正。 该系统还包括用于将ECC选择参数提供给ECC编解码器以便初始化ECC编解码器的装置。 用于初始化ECC编解码器的参数是无错参数。

公开(公告)号：US20110246855A1

公开(公告)日：2011-10-06

申请号：US12753746

申请日：2010-04-02

Applicant: Chuang Cheng ,  Chin-Jung Su

Inventor： Chuang Cheng ,  Chin-Jung Su

IPC: H03M13/00 ,  G06F12/00 ,  G06F12/02 ,  G11C16/06 ,  G11C11/34

CPC classification number: G06F11/1068 ,  G11C11/5642 ,  G11C16/3454

Abstract: A method and apparatus of generating the soft value for a memory device is disclosed. Memory read-related parameters are set, and data are read out of the memory device according to the set parameters. The data reading is performed for pre-determined plural iterations, thereby obtaining the soft value according to the read-out data and the set parameters.

Abstract translation: 公开了一种为存储器件产生软值的方法和装置。 存储器读取相关参数被设置，并且根据所设置的参数从存储器件读出数据。 对预定的多次迭代执行数据读取，从而根据读出的数据和设定的参数获得软值。

公开(公告)号：US20110041040A1

公开(公告)日：2011-02-17

申请号：US12541944

申请日：2009-08-15

Applicant: Chin-Jung Su ,  Chuang Cheng

Inventor： Chin-Jung Su ,  Chuang Cheng

IPC: H03M13/05 ,  G06F11/10

CPC classification number: H03M13/1111 ,  G06F11/1068 ,  G11C2029/0411 ,  H03M13/1108 ,  H03M13/15 ,  H03M13/152 ,  H03M13/2906 ,  H03M13/3723 ,  H03M13/3746 ,  H03M13/451 ,  H03M13/458

Abstract: An error correction method for a memory device is disclosed. A base reading of a memory device is performed, and an error correction code (ECC) decoding is performed on the data read out of the memory device. The memory device is further read when the result of the ECC decoding is not strongly determined, wherein extra information acquired in the further reading of the memory device is used in the ECC decoding.

Abstract translation: 公开了一种用于存储器件的纠错方法。 执行存储器件的基本读取，并且对从存储器件读出的数据执行纠错码（ECC）解码。 当不强烈确定ECC解码的结果时，进一步读取存储器件，其中在ECC解码中使用在进一步读取存储器件中获取的额外信息。

公开(公告)号：US20090043945A1

公开(公告)日：2009-02-12

申请号：US12120453

申请日：2008-05-14

Applicant: Chuang Cheng ,  Satashi Sugawa ,  Chih-Wei Tsai ,  Wen-Lin Chang ,  Fu-Ja Shone

Inventor： Chuang Cheng ,  Satashi Sugawa ,  Chih-Wei Tsai ,  Wen-Lin Chang ,  Fu-Ja Shone

IPC: G06F12/00

CPC classification number: G06F13/4239 ,  G11C7/1042

Abstract: A non-volatile memory system and a method for reading data therefrom are provided. The data comprises a first sub-data and a second sub-data. The non-volatile memory system comprises a first storage unit and a second storage unit, adapted for storing the two sub-data respectively. The first storage unit reads a first command from the controller, and stores the first sub-data temporarily as the first temporary sub-data according to the first command. The second storage unit reads a second command from the controller, and stores the second sub-data temporarily as the second temporary sub-data according to the second command. The first temporary sub-data is read from the first storage unit. Then, the first storage unit reads a third command from the controller. The second temporary sub-data is also read from the second storage unit while reading the third command. The time for reading data from the non-volatile memory system is reduced.

Abstract translation: 提供一种非易失性存储器系统和从其读取数据的方法。 数据包括第一子数据和第二子数据。 非易失性存储器系统包括分别存储两个子数据的第一存储单元和第二存储单元。 第一存储单元从控制器读取第一命令，并且根据第一命令临时存储第一子数据作为第一临时子数据。 第二存储单元从控制器读取第二命令，并且根据第二命令临时存储第二子数据作为第二临时子数据。 从第一存储单元读取第一临时子数据。 然后，第一存储单元从控制器读取第三命令。 在读取第三命令的同时，也从第二存储单元读取第二临时子数据。 从非易失性存储器系统读取数据的时间减少了。

公开(公告)号：US08332728B2

公开(公告)日：2012-12-11

申请号：US12753746

申请日：2010-04-02

Applicant: Chuang Cheng ,  Chin-Jung Su

Inventor： Chuang Cheng ,  Chin-Jung Su

IPC: G06F11/00

CPC classification number: G06F11/1068 ,  G11C11/5642 ,  G11C16/3454

Abstract: A method and apparatus of generating the soft value for a memory device is disclosed. Memory read-related parameters are set, and data are read out of the memory device according to the set parameters. The data reading is performed for pre-determined plural iterations, thereby obtaining the soft value according to the read-out data and the set parameters.

Abstract translation: 公开了一种为存储器件产生软值的方法和装置。 存储器读取相关参数被设置，并且根据所设置的参数从存储器件读出数据。 对预定的多次迭代执行数据读取，从而根据读出的数据和设定的参数获得软值。

公开(公告)号：US07752383B2

公开(公告)日：2010-07-06

申请号：US11753572

申请日：2007-05-25

Applicant: Chuang Cheng ,  Ching-Chang Chen ,  Satoshi Sugawa ,  Wen-Lin Chang ,  Kai-Hsun Lin ,  Fuja Shone

Inventor： Chuang Cheng ,  Ching-Chang Chen ,  Satoshi Sugawa ,  Wen-Lin Chang ,  Kai-Hsun Lin ,  Fuja Shone

IPC: G06F12/00

CPC classification number: G06F13/4022

Abstract: A method and related system for programming connections between a NAND flash memory controller and a plurality of NAND flash memory modules includes the NAND flash memory controller generating a switch signal and a swap signal according to a condition of one of the plurality of NAND flash memory modules, a remap module selectively coupling the plurality of NAND flash memory modules to the NAND flash memory controller according to the switch signal, and a swap module selectively coupling the plurality of NAND flash memory modules to the NAND flash memory controller according to the swap signal.

Abstract translation: 一种用于在NAND闪速存储器控制器和多个NAND快闪存储器模块之间编程连接的方法和相关系统包括根据多个NAND快闪存储器模块之一的状态产生开关信号和交换信号的NAND闪存控制器 ，根据切换信号将多个NAND快闪存储器模块选择性地耦合到NAND闪速存储器控制器的重映射模块，以及根据交换信号有选择地将多个NAND快闪存储器模块耦合到NAND快闪存储器控制器的交换模块。

公开(公告)号：US20090287893A1

公开(公告)日：2009-11-19

申请号：US12122568

申请日：2008-05-16

Applicant: CHUANG CHENG ,  SHIH CHIEH TAI ,  MING HUI LIN ,  CHIH NAN YEN ,  FUJA SHONE

Inventor： CHUANG CHENG ,  SHIH CHIEH TAI ,  MING HUI LIN ,  CHIH NAN YEN ,  FUJA SHONE

IPC: G06F12/12

CPC classification number: G06F12/0246 ,  G06F11/141

Abstract: A method is employed to manage a memory, e.g., a flash memory, including a plurality of paired pages. Each paired page includes a page and a respective risk zone. For each write command, at least one unwritten page is selected for writing new data. For each unwritten page whose risk zone includes at least one written page, each written page is copied or backed up, and the new data is written to the unwritten page. For each unwritten page whose risk zone lacks a written page, the new data is written to the unwritten page. In an embodiment, the written page is copied only if the unwritten page and the written page are operated by different write commands.

Abstract translation: 采用一种方法来管理包括多个配对页面的存储器，例如闪速存储器。 每个配对页面包括页面和相应的风险区域。 对于每个写入命令，至少选择一个未写入的页面来写入新数据。 对于每个未写入的页面，其风险区域至少包含一个写入页面，每个写入的页面都将被复制或备份，并将新数据写入未写入的页面。 对于其风险区缺少书面页面的每个未写入页面，新数据将写入未​​写入的页面。 在一个实施例中，仅当未写入的页面和写入的页面由不同的写入命令操作时才复制书面页面。

公开(公告)号：US20090106513A1

公开(公告)日：2009-04-23

申请号：US11875952

申请日：2007-10-22

Applicant: Chuang Cheng ,  Chih-Wei Tsai ,  Shih-Chieh Tai ,  Satoshi Sugawa ,  Wen-Lin Cheng

Inventor： Chuang Cheng ,  Chih-Wei Tsai ,  Shih-Chieh Tai ,  Satoshi Sugawa ,  Wen-Lin Cheng

IPC: G06F12/00

CPC classification number: G06F12/0246 ,  G06F11/1068 ,  G06F2212/1032

Abstract: A method for copying data in a non-volatile memory system is disclosed. The method includes calculating a number of errors of a first set of data from a source block of the non-volatile memory saved in the buffer of the controller, transmitting the first set of data saved in the buffer of the controller to a buffer of the non-volatile memory when the number of errors is lower than a threshold, and programming a destination block of the non-volatile memory with the first set of data saved in the buffer of the non-volatile memory when the number of errors is lower than the threshold.

Abstract translation: 公开了一种在非易失性存储器系统中复制数据的方法。 该方法包括从存储在控制器的缓冲器中的非易失性存储器的源块中计算第一组数据的错误数量，将保存在控制器的缓冲器中的第一组数据发送到控制器的缓冲器 当错误数量低于阈值时，非易失性存储器，并且当错误数量低于非易失性存储器的数量时，利用保存在非易失性存储器的缓冲器中的第一组数据来编程非易失性存储器的目的地块 门槛。

公开(公告)号：US20080294836A1

公开(公告)日：2008-11-27

申请号：US11753572

申请日：2007-05-25

Applicant: Chuang Cheng ,  Ching-Chang Chen ,  Satoshi Sugawa ,  Kai-Hsun Lin ,  Fuja Shone

Inventor： Chuang Cheng ,  Ching-Chang Chen ,  Satoshi Sugawa ,  Kai-Hsun Lin ,  Fuja Shone

IPC: G06F12/00

CPC classification number: G06F13/4022

Abstract: A method and related system for programming connections between a NAND flash memory controller and a plurality of NAND flash memory modules includes the NAND flash memory controller generating a switch signal and a swap signal according to a condition of one of the plurality of NAND flash memory modules, a remap module selectively coupling the plurality of NAND flash memory modules to the NAND flash memory controller according to the switch signal, and a swap module selectively coupling the plurality of NAND flash memory modules to the NAND flash memory controller according to the swap signal.

Abstract translation: 一种用于在NAND闪速存储器控制器和多个NAND快闪存储器模块之间编程连接的方法和相关系统包括根据多个NAND快闪存储器模块之一的状态产生开关信号和交换信号的NAND闪存控制器 ，根据切换信号将多个NAND快闪存储器模块选择性地耦合到NAND闪速存储器控制器的重映射模块，以及根据交换信号有选择地将多个NAND快闪存储器模块耦合到NAND快闪存储器控制器的交换模块。

公开(公告)号：US08166228B2

公开(公告)日：2012-04-24

申请号：US12120453

申请日：2008-05-14

Applicant: Chuang Cheng ,  Satashi Sugawa ,  Chih-Wei Tsai ,  Wen-Lin Chang ,  Fu-Ja Shone

Inventor： Chuang Cheng ,  Satashi Sugawa ,  Chih-Wei Tsai ,  Wen-Lin Chang ,  Fu-Ja Shone

IPC: G06F12/00

CPC classification number: G06F13/4239 ,  G11C7/1042

Abstract: A non-volatile memory system and a method for reading data therefrom are provided. The data comprises a first sub-data and a second sub-data. The non-volatile memory system comprises a first storage unit and a second storage unit, adapted for storing the two sub-data respectively. The first storage unit reads a first command from the controller, and stores the first sub-data temporarily as the first temporary sub-data according to the first command. The second storage unit reads a second command from the controller, and stores the second sub-data temporarily as the second temporary sub-data according to the second command. The first temporary sub-data is read from the first storage unit. Then, the first storage unit reads a third command from the controller. The second temporary sub-data is also read from the second storage unit while reading the third command. The time for reading data from the non-volatile memory system is reduced.

Abstract translation: 提供一种非易失性存储器系统和从其读取数据的方法。 数据包括第一子数据和第二子数据。 非易失性存储器系统包括分别存储两个子数据的第一存储单元和第二存储单元。 第一存储单元从控制器读取第一命令，并且根据第一命令临时存储第一子数据作为第一临时子数据。 第二存储单元从控制器读取第二命令，并且根据第二命令临时存储第二子数据作为第二临时子数据。 从第一存储单元读取第一临时子数据。 然后，第一存储单元从控制器读取第三命令。 在读取第三命令的同时，也从第二存储单元读取第二临时子数据。 从非易失性存储器系统读取数据的时间减少了。