公开(公告)号：US20150355977A1

公开(公告)日：2015-12-10

申请号：US14300490

申请日：2014-06-10

申请人： Bradley C. Kuszmaul ,  Christian E. Rober

发明人： Bradley C. Kuszmaul ,  Christian E. Rober

IPC分类号： G06F11/14 ,  G06F17/30

CPC分类号： G06F11/1451 ,  G06F11/1435 ,  G06F16/184 ,  G06F2201/80 ,  G06F2201/84

摘要： A system and method for backing up data on computer-readable physical medium, especially useful for databases, such as those using POSIX standard function calls, whereby select operations performed by a user of the database are intercepted and, while performed, are also translated into a shadow file having information about a database file to be backed up and the operations performed on that file. The resulting shadow file can be used to reconstitute the database file. In another mode of operation, the system and method create a copy of the database and concurrently make the same changes to the copy as the user commands while also concurrently keeping a shadow file system related to the database copy.

摘要翻译： 用于备份计算机可读物理介质上的数据的系统和方法，对于诸如使用POSIX标准函数调用的数据库尤其有用，由数据库用户执行的选择操作被截取，并且在被执行的同时被翻译成 一个影子文件，具有有关要备份的数据库文件的信息以及对该文件执行的操作。 生成的影子文件可用于重构数据库文件。 在另一种操作模式下，系统和方法创建数据库的副本，同时对用户命令的副本进行相同的更改，同时保持与数据库副本相关的影子文件系统。

公开(公告)号：US07398359B1

公开(公告)日：2008-07-08

申请号：US10836932

申请日：2004-04-30

申请人： Steven C. Miller ,  Martin M. Deneroff ,  Curt F. Schimmel ,  Larry Rudolph ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Krste Asanovic

发明人： Steven C. Miller ,  Martin M. Deneroff ,  Curt F. Schimmel ,  Larry Rudolph ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Krste Asanovic

IPC分类号： G06F12/00

CPC分类号： G06F12/0815 ,  G06F9/3004 ,  G06F9/30087 ,  G06F12/0831

摘要： A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.

摘要翻译： 处理器可以以多个操作状态中的一个操作。 在正常操作状态下，处理器不涉及存储器事务。 在接收到访问存储器位置的事务指令时，处理器转换到事务操作状态。 在事务操作状态下，处理器执行对高速缓存行的更改和与存储器位置相关联的数据。 在事务操作状态下，数据和高速缓存行的任何更改对于计算系统中的其他处理器是不可见的。 响应于接收到提交指令，处理器进入提交操作状态时，这些更改变得可见。 更改变为可见后，处理器返回到正常运行状态。 如果在接收提交指令之前发生中止事件，则处理器转换到中止操作状态，其中对数据和高速缓存行的任何改变被丢弃。

公开(公告)号：US06609189B1

公开(公告)日：2003-08-19

申请号：US09267827

申请日：1999-03-12

申请人： Bradley C. Kuszmaul ,  Dana Sue Henry-Kuszmaul

发明人： Bradley C. Kuszmaul ,  Dana Sue Henry-Kuszmaul

IPC分类号： G06F9302

CPC分类号： G06F7/506 ,  G06F9/3802 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/384 ,  G06F9/3844 ,  G06F9/3855 ,  G06F9/3857 ,  G06F9/3867 ,  G06F9/3869 ,  G06F9/3885 ,  G06F2207/5063

摘要： The poor scalability of existing superscalar processors has been of great concern to the computer engineering community. In particular, the critical-path delays of many components in existing implementations grow quadratically with the issue width and the window size. This patent presents a novel way to reimplement these components and reduce their critical-path delay growth. It then describes an entire processor microarchitecture, called the Ultrascalar processor, that has better critical-path delay growth than existing superscalars. Most of our scalable designs are based on a single circuit, a cyclic segmented parallel prefix (cspp). We observe that processor components typically operate on a wrap-around sequence of instructions, computing some associative property of that sequence. For example, to assign an ALU to the oldest requesting instruction, each instruction in the instruction sequence must be told whether any preceding instructions are requesting an ALU. Similarly, to read an argument register, an instruction must somehow communicate with the most recent preceding instruction that wrote that register. A cspp circuit can implement such functions by computing for each instruction within a wrap-around instruction sequence the accumulative result of applying some associative operator to all the preceding instructions. A cspp circuit has a critical path gate delay logarithmic in the length of the instruction sequence. Depending on its associative operation and its layout, a cspp circuit can have a critical path wire delay sublinear in the length of the instruction sequence.

摘要翻译： 现有超标量处理器的可扩展性较差已成为计算机工程界极为关注的问题。 特别地，现有实现中的许多组件的关键路径延迟随着问题宽度和窗口大小而二次增长。 该专利提出了一种重新实现这些组件并减少其关键路径延迟增长的新方法。 然后，它描述了一种称为Ultrascalar处理器的整个处理器微架构，其具有比现有超标量更好的关键路径延迟增长。 我们的大部分可扩展设计都是基于单个电路，循环分段并行前缀（cspp）。 我们观察到，处理器组件通常在循环的指令序列上运行，计算该序列的一些关联属性。 例如，为了将ALU分配给最早的请求指令，必须告知指令序列中的每个指令是否有任何先前的指令要求ALU。 类似地，要读取参数寄存器，指令必须以某种方式与写入该寄存器的最新的前一条指令进行通信。 cspp电路可以通过对环绕指令序列内的每个指令计算将一些关联运算符应用于所有先前的指令的累积结果来实现这样的功能。 cspp电路在指令序列的长度上具有对数关键路径门延迟。 根据其关联操作及其布局，cspp电路可以在指令序列的长度上具有亚线性的关键路径线延迟。

公开(公告)号：US5390298A

公开(公告)日：1995-02-14

申请号：US183217

申请日：1994-01-14

申请人： Bradley C. Kuszmaul ,  Charles E. Leiserson ,  Shaw-Wen Yang ,  Carl R. Feynman ,  W. Daniel Hillis ,  David Wells ,  Cynthia J. Spiller

发明人： Bradley C. Kuszmaul ,  Charles E. Leiserson ,  Shaw-Wen Yang ,  Carl R. Feynman ,  W. Daniel Hillis ,  David Wells ,  Cynthia J. Spiller

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F13/00

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A computer including a processor array and a routing network. Processors in the processor array generate messages for transfer to over the routing network, each message including a path identifier portion identifying a path from a source, message processor to a destination processor. The routing network comprises a plurality of interconnected router nodes, at least some of said router nodes being connected to the processors to receive messages therefrom and transmit messages thereto. Each router node operates in a plurality of modes. In a first mode, the router nodes couple received messages to a router node connected thereto in accordance with the path identifier portion to thereby transfer each respective message along the path identified in its path identifier portion. In a second mode, the router node couple received messages to predetermined ones of the router nodes or processors connected thereto, the predetermined ones of said router nodes or processors being selected to facilitate transfer of a message to a nearby processor to facilitate the rapid emptying of the routing network of messages. A control element controls the router nodes to enable them to operate in the first mode or second mode generally contemporaneously.

摘要翻译： 包括处理器阵列和路由网络的计算机。 处理器阵列中的处理器产生用于通过路由网络传送的消息，每个消息包括标识从源，消息处理器到目的地处理器的路径的路径标识符部分。 路由网络包括多个互连的路由器节点，所述路由器节点中的至少一些连接到处理器以从其接收消息并向其发送消息。 每个路由器节点以多种模式操作。 在第一模式中，路由器节点根据路径标识符部分将接收到的消息耦合到与其连接的路由器节点，从而沿着其路径标识符部分中标识的路径传送每个相应的消息。 在第二模式中，路由器节点将接收到的消息耦合到连接到其上的路由器节点或处理器中的预定路由器节点，所选择的所述路由器节点或处理器中的预定路由器节点或处理器便于将消息传送到附近的处理器，以便于快速排空 消息的路由网络。 控制元件控制路由器节点，使得它们能够在第一模式或第二模式下同时运行。

公开(公告)号：US5111198A

公开(公告)日：1992-05-05

申请号：US629026

申请日：1990-12-18

申请人： Bradley C. Kuszmaul

发明人： Bradley C. Kuszmaul

IPC分类号： H04L12/56

CPC分类号： H04L45/00 ,  H04L45/24

摘要： A message is generated at each of a plurality of source nodes, each message comprising at least address information identifying a first or destination node Di, and address information identifying a source node Si. The address information for the destination node is then used to route each message through the nodes of the communication network toward its destination node. At each node where two messages meet that are addressed to the same destination node, a second two messages are generated in place of the first two messages. One of these messages is routed toward the destination node while the other is routed toward an auxiliary node Ai whose address is specified in the message. If any further collisions take place between two messages routed to the same destination node, again two more messages are generated in place of the two colliding messages and one is routed toward the destination node while the other is routed toward another auxiliary node. The messages routed to the auxiliary node contain address information sufficient to route a message from the destination node to all the source nodes that originally addressed it.

摘要翻译： 在多个源节点的每一个处生成消息，每个消息至少包括标识第一或目的节点Di的地址信息，以及标识源节点Si的地址信息。 然后，目的地节点的地址信息用于将通过通信网络的节点的每个消息路由到其目的地节点。 在两个消息满足的每个节点寻址到相同目的地节点的情况下，生成第二个两个消息来代替前两个消息。 这些消息之一被路由到目的地节点，而另一个消息被路由到在消息中指定其地址的辅助节点Ai。 如果在路由到同一目的地节点的两个消息之间发生任何进一步的冲突，则再次产生两个消息来代替两个冲突消息，一个路由到目的节点，而另一个被路由到另一个辅助节点。 路由到辅助节点的消息包含足以将消息从目的地节点路由到最初对其寻址的所有源节点的地址信息。

公开(公告)号：US08185551B2

公开(公告)日：2012-05-22

申请号：US11760379

申请日：2007-06-08

申请人： Bradley C. Kuszmaul ,  Michael A. Bender ,  Martin Farach-Colton

发明人： Bradley C. Kuszmaul ,  Michael A. Bender ,  Martin Farach-Colton

IPC分类号： G06F7/00 ,  G06F17/30

CPC分类号： G06F17/30336 ,  G06F11/1471 ,  G06F17/30327 ,  G06F2201/82

摘要： A method, apparatus and computer program product for storing data in a disk storage system is presented. A dictionary data structure is defined and stored on the disk storage system. Key-value pairs can be inserted and deleted into the dictionary data structure, with full transactional semantics, at a rate that is faster than one insertion per disk-head movement. Keys can be looked up with only a logarithmic number of transfers, even for keys that have been recently inserted or deleted. Queries can be performed on ranges of key-value pairs, including recently inserted or deleted pairs, at a constant fraction of the bandwidth of the disk. The dictionary employs indirect logging for physical block logging.

摘要翻译： 提出了一种用于在磁盘存储系统中存储数据的方法，装置和计算机程序产品。 字典数据结构被定义并存储在磁盘存储系统上。 键值对可以插入并删除到字典数据结构中，具有完整的事务语义，速度比每个磁盘头运动快一个插入速度。 密钥只能以对数的传输次数查询，即使是最近插入或删除的密钥。 对于键值对的范围，包括最近插入或删除的对，可以在磁盘带宽的不变部分执行查询。 字典采用间接日志记录进行物理块记录。

公开(公告)号：US20110246503A1

公开(公告)日：2011-10-06

申请号：US12755391

申请日：2010-04-06

申请人： Michael A. Bender ,  Martin Farach-Colton ,  Yonatan R. Fogel ,  Zardosht Kasheff ,  Bradley C. Kuszmaul ,  Vincenzo Liberatore ,  Barry Perlman ,  Rich Prohaska ,  David S. Wells

发明人： Michael A. Bender ,  Martin Farach-Colton ,  Yonatan R. Fogel ,  Zardosht Kasheff ,  Bradley C. Kuszmaul ,  Vincenzo Liberatore ,  Barry Perlman ,  Rich Prohaska ,  David S. Wells

IPC分类号： G06F17/30

CPC分类号： G06F17/30528 ,  G06F9/546 ,  G06F17/30306 ,  G06F17/30327 ,  G06F17/30342 ,  G06F17/30345 ,  G06F17/30371 ,  G06F17/30569

摘要： A method, apparatus and computer program product for storing data in a disk storage system is presented. A high-performance dictionary data structure is defined. The dictionary data structure is stored on a disk storage system. Key-value pairs can be inserted and deleted into the dictionary data structure. Updates run faster than one insertion per disk-head movement. The structure can also be stored on any system with two or more levels of memory. The dictionary is high performance and supports with full transactional semantics, concurrent access from multiple transactions, and logging and recovery. Keys can be looked up with only a logarithmic number of transfers, even for keys that have been recently inserted or deleted. Queries can be performed on ranges of key-value pairs, including recently inserted or deleted pairs, at a constant fraction of the bandwidth of the disk.

摘要翻译： 提出了一种用于在磁盘存储系统中存储数据的方法，装置和计算机程序产品。 定义了高性能字典数据结构。 字典数据结构存储在磁盘存储系统中。 键值对可以插入并删除到字典数据结构中。 每个磁盘头运动的更新运行速度超过一次插入。 该结构也可以存储在具有两个或更多级别的存储器的任何系统上。 字典是高性能的，并支持完整的事务语义，多个事务的并发访问以及日志和恢复。 密钥只能以对数的传输次数查询，即使是最近插入或删除的密钥。 对于键值对的范围，包括最近插入或删除的对，可以在磁盘带宽的不变部分执行查询。

公开(公告)号：US20110191545A1

公开(公告)日：2011-08-04

申请号：US13084280

申请日：2011-04-11

申请人： Steven C. Miller ,  Martin M. Deneroff ,  Curt F. Schimmel ,  Larry Rudolph ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Krste Asanovic

发明人： Steven C. Miller ,  Martin M. Deneroff ,  Curt F. Schimmel ,  Larry Rudolph ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Krste Asanovic

IPC分类号： G06F12/08

CPC分类号： G06F12/0815 ,  G06F9/3004 ,  G06F9/30087 ,  G06F12/0831

摘要： A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.

摘要翻译： 处理器可以以多个操作状态中的一个操作。 在正常操作状态下，处理器不涉及存储器事务。 在接收到访问存储器位置的事务指令时，处理器转换到事务操作状态。 在事务操作状态下，处理器执行对高速缓存行的更改和与存储器位置相关联的数据。 在事务操作状态下，数据和高速缓存行的任何更改对于计算系统中的其他处理器是不可见的。 响应于接收到提交指令，处理器进入提交操作状态时，这些更改变得可见。 更改变为可见后，处理器返回到正常运行状态。 如果在接收提交指令之前发生中止事件，则处理器转换到中止操作状态，其中对数据和高速缓存行的任何改变被丢弃。

公开(公告)号：US20080307181A1

公开(公告)日：2008-12-11

申请号：US11760379

申请日：2007-06-08

申请人： Bradley C. Kuszmaul ,  Michael A. Bender ,  Martin Farach-Colton

发明人： Bradley C. Kuszmaul ,  Michael A. Bender ,  Martin Farach-Colton

IPC分类号： G06F12/14

CPC分类号： G06F17/30336 ,  G06F11/1471 ,  G06F17/30327 ,  G06F2201/82

摘要： A method, apparatus and computer program product for storing data in a disk storage system is presented. A dictionary data structure is defined and stored on the disk storage system. Key-value pairs can be inserted and deleted into the dictionary data structure, with full transactional semantics, at a rate that is faster than one insertion per disk-head movement. Keys can be looked up with only a logarithmic number of transfers, even for keys that have been recently inserted or deleted. Queries can be performed on ranges of key-value pairs, including recently inserted or deleted pairs, at a constant fraction of the bandwidth of the disk. The dictionary employs indirect logging for physical block logging.

摘要翻译： 提出了一种用于在磁盘存储系统中存储数据的方法，装置和计算机程序产品。 字典数据结构被定义并存储在磁盘存储系统上。 键值对可以插入并删除到字典数据结构中，具有完整的事务语义，速度比每个磁盘头运动快一个插入速度。 密钥只能以对数的传输次数查询，即使是最近插入或删除的密钥。 对于键值对的范围，包括最近插入或删除的对，可以在磁盘带宽的不变部分执行查询。 字典采用间接日志记录进行物理块记录。

公开(公告)号：US5333268A

公开(公告)日：1994-07-26

申请号：US946242

申请日：1992-09-16

申请人： David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Bradley C. Kuszmaul ,  Charles E. Leiserson ,  David S. Wells ,  Monica C. Wong ,  Shaw-Wen Yang ,  Robert C. Zak

发明人： David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Bradley C. Kuszmaul ,  Charles E. Leiserson ,  David S. Wells ,  Monica C. Wong ,  Shaw-Wen Yang ,  Robert C. Zak

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer includes a plurality of processing elements, a command processor, a diagnostic processor and a communications network. The processing elements each performs data processing and data communications operations in connection with commands. The processing elements also performing diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The command processor generates commands for the processing elements, and also performs diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The diagnostic processor generates diagnostic requests. The communication network includes three elements, including a data router, a control network and a diagnostic network. The data router is connected to the processing elements for facilitating the transfer of data among them during a data communications operation. The control network is connected to the processing elements and the command processor for transferring commands from the command processor to the processing elements. The diagnostic network connected to the processing elements, the command processor and the diagnostic processor for transferring diagnostic requests from the diagnostic processor to the processing elements and the command processor and for transferring diagnostic results from the processing elements and the command processor to the diagnostic processor.

摘要翻译： 数字计算机包括多个处理元件，命令处理器，诊断处理器和通信网络。 处理元件各自执行与命令相关的数据处理和数据通信操作。 处理元件还响应诊断操作请求执行诊断操作，并响应于此提供诊断结果。 命令处理器为处理元件生成命令，并且还响应诊断操作请求执行诊断操作并响应于此提供诊断结果。 诊断处理器产生诊断请求。 通信网络包括三个元件，包括数据路由器，控制网络和诊断网络。 数据路由器连接到处理元件，以便在数据通信操作期间便于它们之间的数据传输。 控制网络连接到处理元件和命令处理器，用于将命令从命令处理器传送到处理元件。 连接到处理元件的诊断网络，命令处理器和诊断处理器，用于将诊断请求从诊断处理器传送到处理元件和命令处理器，并将诊断结果从处理元件和命令处理器传送到诊断处理器。