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公开(公告)号：US12124400B2
公开(公告)日：2024-10-22
申请号：US18157000
申请日：2023-01-19
CPC分类号： G06F13/4291
摘要： A data communication apparatus coupled to a serial bus has a protocol controller that configures a first plurality of subordinate devices with device identifiers unique within the first plurality of subordinate devices and configures a second plurality of subordinate devices with device identifiers unique within the second plurality of subordinate devices. A sequence start condition transmitted over the serial bus indicates either a first communication mode in which a clock signal is provided to the serial bus or a second communication mode in which no clock signal is provided. A device identifier associated with the first plurality of subordinate devices is used to transmit a first datagram over the serial bus in the first communication mode, and a device identifier associated with the second plurality of subordinate devices is used to transmit a second datagram over the serial bus in the second communication mode.
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公开(公告)号：US12124315B2
公开(公告)日：2024-10-22
申请号：US17901468
申请日：2022-09-01
IPC分类号： G06F1/32 , G06F1/3212 , G06F1/324
CPC分类号： G06F1/324 , G06F1/3212
摘要： Aspects relate to a stepped clocking frequency mode for integrated circuit components. An apparatus includes a processor core configured to perform operations at a received clocking frequency and a clock controller. The clock controller is configured to clock the processor core with a default frequency in response to the processor core operating in a default mode of operation, and, responsive to a parameter value associated with the processor core exceeding a first threshold, to enter a stepped clocking frequency mode, that includes alternating between clocking the processor core at a first frequency for a first time interval, and clocking the processor core at a second frequency different than the first frequency for a second time interval.
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公开(公告)号：US12079055B2
公开(公告)日：2024-09-03
申请号：US17949968
申请日：2022-09-21
IPC分类号： G06F1/28 , G06F13/42 , H03K19/0185
CPC分类号： G06F1/28 , G06F13/4221 , H03K19/018507 , G06F2213/0026
摘要： Aspects relate to techniques for controlling signal voltage levels across a wired data link for data communication between apparatuses. A first device can advertise multiple supported signal voltage levels to a peer device connected by the wired data link. The devices can implement the same signal voltage level(s) or different signal voltage levels. The peer devices can compare and select a compatible signal voltage level for data communication. The first device can provide a signal voltage indication signal that is configurable to a plurality of voltage levels corresponding to a plurality of signal voltages. At least one of the plurality of voltage levels can indicate that the first device can operate the data link at a plurality of signal voltages. In some examples, the wired data link can be a peripheral component interconnect express (PCIe) link.
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公开(公告)号：US12019577B2
公开(公告)日：2024-06-25
申请号：US17960050
申请日：2022-10-04
CPC分类号： G06F13/4031 , G06F13/4221 , G06F2213/0026
摘要： Aspects relate to link speed for a peripheral component interconnect. In one aspect, an apparatus includes an interface circuit configured to provide an interface with a multiple lane data link, the data link having a first set of lanes in an active state and a second set of lanes in an idle state and a controller. The controller is configured to receive a request at the controller to change a data rate of the data link to a requested data rate, change the second set of lanes from an idle state to an active state, train the second set of lanes to the requested data rate, transfer data traffic from the first set of lanes to the second set of lanes after the training, and transmit the data traffic on the second set of lanes.
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公开(公告)号：US12007934B1
公开(公告)日：2024-06-11
申请号：US18096093
申请日：2023-01-12
发明人： Yasser Ahmed , Sachin Ajit Devamare
CPC分类号： G06F13/4291 , G06F13/405
摘要： A communication interface circuit has a deserializer configured to convert a serial stream of 3-bit symbols received from a three-wire serial bus to a parallel multi-symbol word comprising a plurality of symbols ordered in accordance with time of arrival at an input of the deserializer, detection circuits configured to determine whether a pattern of symbols in the parallel multi-symbol word indicates a corrupt data packet, and a finite state machine configured to activate one or more flags responsive to feedback received from the detection circuits. each flag can be configured to cause termination of reception of the corrupt data packet when the each flag is active.
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公开(公告)号：US11968154B2
公开(公告)日：2024-04-23
申请号：US16224311
申请日：2018-12-18
发明人： Prasad Kadiri , Umesh Phuyal
CPC分类号： H04L5/0098 , H04L5/001 , H04L5/0053 , H04W36/0069 , H04W36/08 , H04W72/0453 , H04W76/11 , H04W76/27 , H04W80/02
摘要： Aspects of the disclosure relate to a method of operating a user equipment (UE) for wireless communication with a network. In some aspects, the UE obtains a medium access control (MAC) control element (CE) from a network. The MAC CE may be configured to indicate any one of a plurality of state transition actions for a secondary cell. The UE transitions to a secondary cell dormant state when a state transition action indicated by the MAC CE includes a transition to the secondary cell dormant state. The UE operates in the secondary cell dormant state.
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7.发明授权公开(公告)号：US11962278B2
公开(公告)日：2024-04-16
申请号：US17318959
申请日：2021-05-12
发明人： Ahmed Abbas Mohamed Helmy , Mehran Bakhshiani , Francesco Gatta , Hasnain Lakdawala , Rahul Karmaker , Shankar Guhados
CPC分类号： H03F3/45475 , H03G3/30 , H03H11/1226 , H03H19/004 , H04B1/0032 , H04B1/0039 , H04B1/0042 , H04B1/0078 , H04B1/1615 , H04B1/18 , H03F2200/129 , H03F2200/165 , H03F2203/45526
摘要： An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.
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8.发明授权公开(公告)号：US11863140B2
公开(公告)日：2024-01-02
申请号：US17318968
申请日：2021-05-12
CPC分类号： H03F3/45475 , H03G3/30 , H03H11/1226 , H03H19/004 , H04B1/0032 , H04B1/0039 , H04B1/0042 , H04B1/0078 , H04B1/1615 , H04B1/18 , H03F2200/129 , H03F2200/165 , H03F2203/45526
摘要： An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and merging at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.
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公开(公告)号：US11844083B2
公开(公告)日：2023-12-12
申请号：US17897924
申请日：2022-08-29
发明人： Tao Luo
IPC分类号： H04W24/10 , H04W72/21 , H04L1/1607 , H04L1/1822 , H04L1/1812 , H04L1/1829 , H04L5/00
CPC分类号： H04W72/21 , H04L1/1685 , H04L1/1812 , H04L1/1822 , H04L1/1861 , H04L5/0055
摘要： Aspects of the present disclosure provide a mechanism for flexible control information reporting within a wireless communication network by mapping a plurality of hybrid automatic repeat request (HARQ) processes to respective locations in a payload format of an uplink control channel. In response to receiving a request to transmit acknowledgment information corresponding to one or more selected HARQ processes, the acknowledgment information corresponding to the one or more selected HARQ processes may be included in the respective locations of the payload of a current uplink control channel based on the mapping. A remaining portion of the payload of the current uplink control channel may be flexibly utilized for other control information.
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公开(公告)号：US11800465B2
公开(公告)日：2023-10-24
申请号：US17146332
申请日：2021-01-11
发明人： Shay Landis , Ran Berliner , Yehonatan Dallal
IPC分类号： H04W56/00 , H04B17/318 , H04B7/06 , H04W24/10
CPC分类号： H04W56/001 , H04B7/0695 , H04B17/318 , H04W24/10
摘要： Aspects of disclosure relate to dynamically modifying a synchronization signal block (SSB) beam configuration in a wireless communication system. In an aspect, a UE receives, from a base station, a first message triggering the UE to measure a signal strength of SSB beams transmitted from the base station. The UE then sends, to the base station, a second message including a report of the signal strength of the SSB beams and receives, from the base station, a third message indicating at least an SSB beam of the SSB beams or a quasi-colocation (QCL) type to use based on the report. The UE then establishes a connection with the base station using an indicated SSB beam or QCL type.
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