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公开(公告)号:US11817378B2
公开(公告)日:2023-11-14
申请号:US17364220
申请日:2021-06-30
Applicant: QUALCOMM INCORPORATED
Inventor: Nelly Chen , Gary Yao Zhang , Michael Randy May , Shrinivas Gopalan Uppili , Varin Sriboonlue
IPC: H05K1/02 , H01L23/498 , H01L23/66 , H05K3/34
CPC classification number: H01L23/49816 , H01L23/66 , H05K1/0228 , H05K3/3436 , H01L2223/6605 , H05K2201/09227 , H05K2201/10098 , H05K2201/10734
Abstract: A pin map covers a surface area of a layer of a printed circuit board (PCB). The pin map includes a plurality of electrical designations for each pin in the pin map and a plurality of empty spaces within the pin map. Each electrical designation may be assigned to a pin on the pin map. Each electrical designation includes a positive polarity (P+) pin, a negative polarity (P−) pin, or an electrical ground (G) pin. If a space in the pin map does not have an electrical designation, then it may include an empty space/plain portion of the printed circuit board (PCB). The pin map may include a plurality of rows and a first repeating pin polarity pattern. The first repeating pin polarity pattern may include a lane unit tile. The pin map may help couple two circuit elements together that are attached to one layer of a PCB.
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公开(公告)号:US12079055B2
公开(公告)日:2024-09-03
申请号:US17949968
申请日:2022-09-21
Applicant: QUALCOMM Incorporated
Inventor: James Lionel Panian , John Eaton , Lakshmi Baskaran , Shrinivas Gopalan Uppili
IPC: G06F1/28 , G06F13/42 , H03K19/0185
CPC classification number: G06F1/28 , G06F13/4221 , H03K19/018507 , G06F2213/0026
Abstract: Aspects relate to techniques for controlling signal voltage levels across a wired data link for data communication between apparatuses. A first device can advertise multiple supported signal voltage levels to a peer device connected by the wired data link. The devices can implement the same signal voltage level(s) or different signal voltage levels. The peer devices can compare and select a compatible signal voltage level for data communication. The first device can provide a signal voltage indication signal that is configurable to a plurality of voltage levels corresponding to a plurality of signal voltages. At least one of the plurality of voltage levels can indicate that the first device can operate the data link at a plurality of signal voltages. In some examples, the wired data link can be a peripheral component interconnect express (PCIe) link.
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