公开(公告)号：US09954708B2

公开(公告)日：2018-04-24

申请号：US14081586

申请日：2013-11-15

申请人： Intel Corporation

发明人： Bernard Arambepola ,  Parveen K. Shukla ,  Thushara Hewavithana ,  Sahan S. Gamage

IPC分类号： H04L27/00 ,  H04B7/02 ,  H04L27/26 ,  G06F12/00 ,  G06F7/76

CPC分类号： H04L27/2627 ,  G06F7/768 ,  G06F12/00 ,  H03M13/271 ,  H04L1/0071 ,  H04L27/2628 ,  H04L27/263 ,  H04L27/2634

摘要： The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.

公开(公告)号：US09953003B2

公开(公告)日：2018-04-24

申请号：US15216624

申请日：2016-07-21

申请人： BigStream Solutions, Inc.

发明人： Maysam Lavasani

IPC分类号： G06F13/12 ,  G06F13/38 ,  G06F13/42 ,  G06F13/36 ,  G06F3/06 ,  G06F13/10 ,  G06F9/50 ,  G06F9/54

CPC分类号： G06F13/4265 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0683 ,  G06F9/5066 ,  G06F9/54 ,  G06F13/102 ,  G06F13/36 ,  Y02D10/14 ,  Y02D10/151

摘要： A data processing system is disclosed that includes machines having an in-line accelerator and a general purpose instruction-based general purpose instruction-based processor. In one example, a machine comprises storage to store data and an Input/output (I/O) processing unit coupled to the storage. The I/O processing unit includes an in-line accelerator that is configured for in-line stream processing of distributed multi stage dataflow based computations. For a first stage of operations, the in-line accelerator is configured to read data from the storage, to perform computations on the data, and to shuffle a result of the computations to generate a first set of shuffled data. The in-line accelerator performs the first stage of operations with buffer less computations.

公开(公告)号：US09940138B2

公开(公告)日：2018-04-10

申请号：US12420762

申请日：2009-04-08

申请人： Pedro Lopez ,  Carlos Madriles ,  Alejandro Martinez ,  Raul Martinez ,  Josep M. Codina ,  Enric Gibert Codina ,  Fernando Latorre ,  Antonio Gonzalez

发明人： Pedro Lopez ,  Carlos Madriles ,  Alejandro Martinez ,  Raul Martinez ,  Josep M. Codina ,  Enric Gibert Codina ,  Fernando Latorre ,  Antonio Gonzalez

IPC分类号： G06F9/30 ,  G06F11/00 ,  G06F9/38 ,  G06F11/14

CPC分类号： G06F9/3863 ,  G06F9/30043 ,  G06F9/3842 ,  G06F9/3851 ,  G06F11/1402

摘要： Methods and apparatus are disclosed for using a register checkpointing mechanism to resolve multithreading mis-speculations. Valid architectural state is recovered and execution is rolled back. Some embodiments include memory to store checkpoint data. Multiple thread units concurrently execute threads. They execute a checkpoint mask instruction to initialize memory to store active checkpoint data including register contents and a checkpoint mask indicating the validity of stored register contents. As register contents change, threads execute checkpoint write instructions to store register contents and update the checkpoint mask. Threads also execute a recovery function instruction to store a pointer to a checkpoint recovery function, and in response to mis-speculation among the threads, branch to the checkpoint recovery function. Threads then execute one or more checkpoint read instructions to copy data from a valid checkpoint storage area into the registers necessary to recover a valid architectural state, from which execution may resume.

公开(公告)号：US09935653B2

公开(公告)日：2018-04-03

申请号：US14980201

申请日：2015-12-28

申请人： Intel Corporation

发明人： Sivakumar Radhakrishnan ,  Sin S. Tan ,  Kenneth C. Haren ,  Mark A. Schmisseur

IPC分类号： H03M13/07 ,  H03M13/09

CPC分类号： H03M13/091

摘要： Methods and apparatus related to enhanced Cyclical Redundancy Check (CRC) circuit based on Galois-Field arithmetic are described. In one embodiment, a plurality of exclusive OR logic include first exclusive OR logic and second exclusive OR logic. First Galois Field multiplier logic multiplies a first output from the first exclusive OR logic and a first portion of a plurality of portions of the input data. Second Galois Field multiplier logic multiplies a second output from the second exclusive OR logic and a second portion of the plurality of portions of the input data. Other embodiments are also disclosed and claimed.

公开(公告)号：US09923638B1

公开(公告)日：2018-03-20

申请号：US15388533

申请日：2016-12-22

申请人： Intel Corporation

发明人： Javier Perez-Ramirez ,  Richard D. Roberts

IPC分类号： H04B10/00 ,  H04B10/524 ,  H04B10/116 ,  H04B10/50 ,  H04N5/376 ,  H04N5/225 ,  H04N5/232 ,  H04J14/00

CPC分类号： H04B10/524 ,  H04B10/112 ,  H04B10/116

摘要： Optical signaling is implemented by modulating visible light with variable pulse position modulation (VPPM). VPPM is a composite waveform and its optical signal includes a Start Frame Delimiter (SFD) which indicates start of optical signaling. To identify modulated lights, the duty cycle is periodically changed in the waveform to induce an AM envelope at a frequency higher than the response of the human eye. The signal is then sampled via a camera producing an alias frequency that produces noticeable blinking. Because the communication is asynchronous, the desired camera frame rate (fc) in relationship to the modulation bit rate timing clock (or symbol rate, fs) is only approximate. Consequently, a frequency offset develops between the camera frame rate (fc) and the symbol rate (fs) in transmission of long packets. The disclosed embodiments provide a detection algorithm, system and apparatus to provide clock offset tracking and correction.

公开(公告)号：US09912799B2

公开(公告)日：2018-03-06

申请号：US15273440

申请日：2016-09-22

申请人： Apple Inc.

发明人： David C. Donley ,  Julien A. Poumailloux ,  Pierre J. De Filippis ,  Tyler D. Hawkins ,  Craig P. Dooley ,  Daniel B. Pollack ,  James C. Grandy ,  Gregory B. Novick ,  Todd A. Shortlidge ,  Aroon Pahwa ,  David T Wilson ,  Yan Yang ,  Nicholas Joseph Circosta

IPC分类号： H04B7/00 ,  H04M1/725 ,  H04W56/00 ,  H04W8/00 ,  G06F1/16 ,  G06F21/62 ,  G06F21/31

CPC分类号： H04M1/7253 ,  G06F1/163 ,  G06F21/31 ,  G06F21/35 ,  G06F21/445 ,  G06F21/6245 ,  G06F2221/2107 ,  H04L63/0428 ,  H04L63/08 ,  H04M1/67 ,  H04M2203/6018 ,  H04M2203/6054 ,  H04M2250/02 ,  H04W8/005 ,  H04W56/0025

摘要： Systems, methods and non-transitory computer readable media for allowing a user to switch between watches that have been paired with a device such as a smartphone are described. In one embodiment, the watches automatically detect a removal of a first watch from a user's wrist and an attachment of a second watch to the user's wrist. Messages from the watches are transmitted to the device to allow the device to switch the active watch from the first watch to the second watch. The switch can occur while the device is in a locked state, and the device can synchronize the second watch with data received from the first watch. Other embodiments are also described.

公开(公告)号：US09900828B2

公开(公告)日：2018-02-20

申请号：US15112116

申请日：2015-06-26

申请人： Intel IP Corporation

发明人： Robert Zaus ,  Chen-Ho Chin

IPC分类号： H04W4/00 ,  H04W48/14 ,  H04W48/18 ,  H04W36/08 ,  H04W36/14 ,  H04W48/20 ,  H04W60/00 ,  H04W84/04

CPC分类号： H04W48/14 ,  H04W36/08 ,  H04W36/14 ,  H04W48/18 ,  H04W48/20 ,  H04W60/005 ,  H04W84/042

摘要： Briefly, in accordance with one or more embodiments, a network node of a first Public Land Mobile Network (PLMN) receives a request from a user equipment (UE) for a service to be provided to the UE by the first PLMN, and sends a response to the UE indicating whether the request is accepted or rejected, wherein the response indicates to the UE whether the UE is allowed to repeat the request if the UE connects to a second PLMN that is an equivalent PLMN with the first PLMN.

公开(公告)号：US09894072B2

公开(公告)日：2018-02-13

申请号：US15225751

申请日：2016-08-01

申请人： salesforce.com, inc.

发明人： John Simone ,  Fiaz Hossain

IPC分类号： G06F21/41 ,  H04L29/06 ,  G06F9/44 ,  G06F17/30

CPC分类号： H04L63/10 ,  G06F8/20 ,  G06F17/30864 ,  G06F21/41 ,  H04L63/08 ,  H04L63/105 ,  H04L67/42

摘要： A system and apparatus for enhancing the functionality and utility of an authentication process for web applications is disclosed.

公开(公告)号：US09892481B2

公开(公告)日：2018-02-13

申请号：US15278316

申请日：2016-09-28

申请人： Intel Corporation

发明人： Boris Ginzburg ,  Esfirush Natanzon ,  Ilya Osadchiy ,  Yoav Zach

IPC分类号： G06T1/20 ,  G06T1/60

CPC分类号： G06T1/20 ,  G06T1/60

摘要： A thread on one processor may be used to enable another processor to lock or release a mutex. For example, a central processing unit thread may be used by a graphics processing unit to secure a mutex for a shared memory.

公开(公告)号：US09846220B2

公开(公告)日：2017-12-19

申请号：US14830671

申请日：2015-08-19

申请人： Dragonfly Technology Inc.

发明人： Lingkai Kong ,  Teymur Bakhishev ,  Tommi Ylamurto ,  Vivek Subramanian ,  Manu Seth

IPC分类号： G01S5/02 ,  H04W64/00 ,  H04W84/18

CPC分类号： G01S5/0226 ,  G01S5/0289 ,  H04W64/003 ,  H04W84/18

摘要： Systems and methods for determining locations of wireless sensor nodes in a network architecture having mesh-based features are disclosed herein. In one example, a computer-implemented method for localization of nodes in a wireless network includes causing, with processing logic of a hub, the wireless network having nodes to be configured as a first network architecture for a first time period for localization. The method further includes determining, with the processing logic of the hub, localization of at least two nodes using at least one of frequency channel overlapping communications, frequency channel stepping communications, multi-channel wide band communications, and ultra-wide band communications for at least one of time of flight and signal strength techniques. The method further includes causing the wireless network to be configured in a second network architecture having narrow-band communications upon completion of localization.