-
公开(公告)号：US3529290A
公开(公告)日：1970-09-15
申请号：US3529290D
申请日：1968-05-10
Applicant: BELL TELEPHONE LABOR INC
Inventor： SCHROEDER HENRY C , SHEEHAN JOHN R
CPC classification number: H04L27/2331 , H04L1/206
-
82.发明授权公开(公告)号：US07430170B2
公开(公告)日：2008-09-30
申请号：US10331162
申请日：2002-12-26
Applicant: Atul B. Mahamuni , Chi-Fai Ho
Inventor： Atul B. Mahamuni , Chi-Fai Ho
Abstract: A network gateway element is provided. The network gateway element appears as a single node to the external world, while it physically is maintained in at least two chassis. A routing node handles functions typically associated with routers, while another network element, such as a server, may handle functions typically associated with the server. The routing node may load-balance the traffic directed at the server. Additionally, the routing node may process packets for the server without the server having to become involved.
Abstract translation: 提供网关网元。 网络网关元素显示为外部世界的单个节点，而物理上保持在至少两个机箱中。 路由节点处理通常与路由器相关联的功能，而诸如服务器的另一网络元件可以处理通常与服务器相关联的功能。 路由节点可以负载均衡针对服务器的流量。 此外，路由节点可以处理服务器的分组，而服务器不必涉及。
-
83.发明授权公开(公告)号：US07072410B1
公开(公告)日：2006-07-04
申请号：US09980416
申请日：2000-05-11
Applicant: Peter Monsen
Inventor： Peter Monsen
CPC classification number: H04B7/0408 , H04L1/0071
Abstract: A multiple-access digital radio communication system and method with communication links between user terminal transmitters and central node with a receiver system including a multibeam antenna. User terminal transmitters assigned to one beam coverage region use mltiple access channels that are mutually orthogonal for transmitting digital message information. These multiple access channels are reused in adjacent and other beam coverage regions. Error-correction coding (20), interleaving (21), and a single-axis modulator (24) are used in the user transmitter to increase resistance to potential interference from user terminal transmitters in other coverage regions. At the receiver, an adaptive processor (28) such as an equalizer or sequence estimator is used to combine multiple antenna beam signals (27) to produce a combined signal associated with each user. Deinterleaving (30) and error-correction decoding (31) of the combined signal is used to complete the recovery of the digital message information.
Abstract translation: 一种具有包括多波束天线的接收机系统的用户终端发射机和中心节点之间的通信链路的多址数字无线电通信系统和方法。 分配给一个波束覆盖区域的用户终端发射机使用互相正交的毫微微接入信道来传输数字信息信息。 这些多路访问信道在相邻和其他波束覆盖区域中被重用。 在用户发射机中使用纠错编码（20），交织（21）和单轴调制器（24）来增加对来自其他覆盖区域中的用户终端发射机的潜在干扰的抵抗。 在接收机处，使用诸如均衡器或序列估计器的自适应处理器（28）来组合多个天线波束信号（27）以产生与每个用户相关联的组合信号。 使用组合信号的去交织（30）和纠错解码（31）来完成数字消息信息的恢复。
-
84.发明授权Selective retransmission for efficient and reliable streaming of multimedia packets in a computer network 失效选择性重传，用于在计算机网络中高效可靠地传送多媒体分组
公开(公告)号：US5918002A
公开(公告)日：1999-06-29
申请号：US818644
申请日：1997-03-14
Applicant: Anders Edgar Klemets , Anthony William Cannon , Srinivas Prasad Vellanki , Hemanth Srinivas Ravi
Inventor： Anders Edgar Klemets , Anthony William Cannon , Srinivas Prasad Vellanki , Hemanth Srinivas Ravi
CPC classification number: H04L65/80 , H04L1/1838 , H04L1/1877 , H04L29/06 , H04L67/2842 , H04L67/42 , H04L2012/6459 , H04L2012/6489 , H04L2012/6494 , H04L29/06027 , H04L69/28 , H04L69/329
Abstract: An efficient and reliable transmission protocol for transmitting multimedia streams from a server to a client computer over a diverse computer network including local area networks (LANs) and wide area networks (WANs) such as the internet. The client computer includes a playout buffer for temporary storage of incoming data packets. When the client computer detects that a data packet has not arrived at said client computer by an expected time of arrival (ETA), a round trip time for the data packet is computed. The round trip time is an estimate of a period beginning from the time a retransmission request is sent to from the client computer to the stream server till the time a copy of the missing data packet is received at the client computer from the stream server in response to the retransmission request. If the round trip time is less than the time remaining before the missing packet is no longer useful to the on-demand application, then a retransmission request packet is sent to the server. Conversely if the round trip time is greater than the time remaining, i.e., the missing packet is likely to arrive after the usefulness of the packet has expired, then sending a retransmission request is likely to result in the late arrival of the missing data packet. Accordingly, the missing packet is discarded. This selective retransmission protocol can also be practiced with dynamic bandwidth selection wherein the transmission rate is dynamically matched to the available bandwidth capacity of the network connection between the server and the client computer.
Abstract translation: 一种高效可靠的传输协议，用于通过包括诸如因特网的局域网（LAN）和广域网（WAN）在内的各种计算机网络从服务器向客户端计算机传输多媒体流。 客户端计算机包括用于临时存储输入数据分组的播出缓冲器。 当客户端计算机检测到数据分组未到达所述客户端计算机达预期到达时间（ETA）时，计算数据分组的往返时间。 往返时间是从重发请求发送到客户端计算机到流服务器的时间段的估计，直到响应于客户端计算机在客户端计算机上接收到丢失数据分组的副本 到重传请求。 如果往返时间小于丢失分组对于按需应用不再有用的时间，则向服务器发送重传请求分组。 相反，如果往返时间大于剩余时间，即丢失的分组可能在分组的有用性已经到期之后到达，则发送重传请求很可能导致丢失的数据分组的迟到。 因此，丢弃丢包。 这种选择性重传协议也可以用动态带宽选择来实现，其中传输速率与服务器和客户端计算机之间的网络连接的可用带宽容量动态匹配。
-
85.发明授权
公开(公告)号：US5734687A
公开(公告)日：1998-03-31
申请号：US448355
申请日：1995-02-05
Applicant: Jukka Kainulainen
Inventor： Jukka Kainulainen
CPC classification number: H04J3/0679
Abstract: A hierarchical synchronization method for a telecommunications system employing message-based synchronization and a telecommunications system employing message-based synchronization and including a plurality of nodes interconnected by transmission lines (A, B). In the method, the nodes interchange signals containing synchronization messages with information on the priority of the respective signal in the internal synchronization hierarchy of the system. In order to shorten the time periods of state transitions occurring in system failures without any risk of losing synchronization, a transmission line between two nodes is monitored to verify its bidirectionality, and as soon as the bidirectionality of the line cannot be verified, the use of the line for synchronization is prohibited.
Abstract translation: PCT No.PCT / FI93 / 00459 Sec。 371日期：1995年5月2日 102（e）日期1995年5月2日PCT提交1993年11月8日PCT公布。 公开号WO94 / 11966 日期1994年5月26日一种采用基于消息的同步的电信系统和采用基于消息的同步并包括由传输线（A，B）互连的多个节点的电信系统的分层同步方法。 在该方法中，节点将包含同步消息的信号与在系统的内部同步层级中的相应信号的优先级的信息进行交换。 为了缩短在系统故障中发生的状态转换的时间段，没有失去同步的风险，监视两个节点之间的传输线以验证其双向性，并且一旦不能验证线路的双向性，则使用 禁止同步线。
-
Patent Agency Ranking
公开(公告)号：US4065752A
公开(公告)日：1977-12-27
申请号：US621399
申请日：1975-10-10
Applicant: Leslie Louis Goldberg
Inventor： Leslie Louis Goldberg
Abstract: The specification discloses a check digit verification apparatus having the following novel concepts1. the use of a read-only store (16) to hold tables of remainder values whereby to obviate the need for multiplication computing ability;2. the use of remainder values appropriate to the respective digits of an identity number to be verified, and summation of those remainder values to provide an overall remainder value for the identity number;3. the use of a remainder value accumulating store (23) having a number of stages equal to the modulus of the system, so that the contents of the store is an accumulated remainder value, thus obviating the need for a `division` computing ability; and4. the use of a register (55) for temporarily storing the digits of an identity number which is to be verified, and for retaining a predetermined initial group of digits after all the digits of the identity number have been transferred into the verification means, whereby to reduce the number of digits that have to be keyed-in when the next identity number for verification includes the retained initial group of digits.
Abstract translation: 本说明书公开了一种具有以下新颖概念的校验数字验证装置：1.只读存储器（16）的使用，用于保持剩余值的表，以满足需要多种计算能力; 2.对待验证的身份证号码的相应数字的剩余值的使用，以及这些被拒绝的值的配置，以提供标识号的总体剩余值; 3.使用剩余价值累积商店（23）具有等同于系统模块的阶段数量，因此商店的内容是累积剩余价值，这样可以获得“部门”计算能力的需求 ; 和4.使用注册机构（55）为临时存储待验证的身份号码的数字，并将所有已被识别的数字的数字转移到验证方法后保留预定的初始组数组 当下一个用于验证的识别码包括保留的初始组数字时，可以减少必须键入的数字的数量。
-
87.发明授权Arithmetic unit for use in a digital data processor and having an improved system for parity check bit generation and error detection 失效用于数字数据处理器的算术单元，具有用于奇偶校验位产生和错误检测的改进系统
公开(公告)号：US3986015A
公开(公告)日：1976-10-12
申请号：US589298
申请日：1975-06-23
Applicant: David N. Gooding , Everett M. Shimp
Inventor： David N. Gooding , Everett M. Shimp
IPC: G06F7/00 , G06F7/38 , G06F7/492 , G06F7/494 , G06F7/508 , G06F11/10 , H03M13/00 , H03K13/34 , H04L1/10
Abstract: A digital arithmetic unit employing a binary adder for adding and subtracting multidigit binary coded decimal numbers in either zoned format or packed format and having an improved method of generating parity check bits for the resultant data bytes produced by the arithmetic unit. When using a binary adder for adding or subtracting binary coded decimal numbers, it is necessary to correct some of the data appearing at the output of the binary adder in order to obtain the correct results. The parity check bit generating circuitry of the present invention, however, works on the uncorrected data appearing at the output of the adder, but nevertheless produces the proper parity check bits for the corrected data which represents the final output for the arithmetic unit. This reduces the amount of time delay which would otherwise be caused by generating the parity check bits in a conventional manner.
Abstract translation: 一种采用二进制加法器的数字运算单元，用于以分区格式或打包格式对多位二进制编码十进制数进行加法和减法，并且具有为运算单元产生的结果数据字节产生奇偶校验位的改进方法。 当使用二进制加法器对二进制编码十进制数进行加法或减法时，需要校正出现在二进制加法器的输出端的一些数据，以获得正确的结果。 然而，本发明的奇偶校验位产生电路对于出现在加法器的输出端的未校正数据起作用，但是对于表示算术单元的最终输出的校正数据产生适当的奇偶校验位。 这减少了以常规方式生成奇偶校验位的另外时间延迟的量。
-
公开(公告)号：US3983536A
公开(公告)日：1976-09-28
申请号：US592995
申请日：1975-07-03
Applicant: Charles Richard Telfer
Inventor： Charles Richard Telfer
CPC classification number: H04L1/0057 , H04L1/0045 , H04L1/0061
Abstract: The invention relates to a method of correcting errors, particularly double adjacent errors, which occur in a transmission path of a data handling system. A family of error correcting codes can be used to provide a similar correcting power for such errors as conventional BCH codes have for single random errors. The invention is applicable to transmission systems in which data is present in the form of a sequence of fixed length blocks.
Abstract translation: 本发明涉及在数据处理系统的传输路径中发生的纠错错误，特别是双重相邻错误的方法。 可以使用一系列纠错码来为诸如常规BCH码对于单个随机误差的错误提供类似的校正功率。 本发明适用于数据以固定长度块序列的形式存在的传输系统。
-
公开(公告)号：US3911395A
公开(公告)日：1975-10-07
申请号：US45640974
申请日：1974-03-29
Applicant: NIPPON ELECTRIC CO
Inventor： KOIKE SHIN-ICHI
CPC classification number: H04L1/004
Abstract: In a multi-level digital transmission system, the transmitting station transmits two particular different-level code signals alternately in response to a particular one of N kinds of input information to be transmitted. Whenever the two particular code signals are received, the receiving station converts them into the one particular kind of input information. By determining whether the two particular code signals appear alternately at the receiving station, it is possible to monitor the presence of code errors introduced in a transmission channel.
Abstract translation: 在多级数字传输系统中，发射台响应于要传输的N种输入信息中的特定一个，交替地传输两个特定的不同级别的码信号。 无论何时接收到两个特定的代码信号，接收站将它们转换为一种特定类型的输入信息。 通过确定两个特定代码信号是否在接收站处交替出现，可以监视在传输信道中引入的代码错误的存在。
-
公开(公告)号：US3893071A
公开(公告)日：1975-07-01
申请号：US49851074
申请日：1974-08-19
Applicant: IBM
Inventor： BOSSEN DOUGLAS C , HSIAO MU-YUE , PATEL ARVIN M
CPC classification number: G06F11/1028
Abstract: This specification describes an error correction system for a high density memory made up of a number of monolithic wafers each containing a plurality of arrays that are addressed thru circuitry and wiring contained on that wafer. The storage bits on the wafers are functionally divided into a number of blocks each containing a plurality of words. The words of each block are on several wafers with each word made up of a plurality of arrays on a single array wafer. Each word in a block is protected by a similar error correction double multiple error detection code. The block is further protected by two additional check words made up using a b-adjacent code. Each byte in the check words protects one byte position of the words of the block. When a single error is detected in any word by the SEC-MED code the code corrects the error. If a multiple error is detected, the multiple error signal points to the word in error to be corrected by the b-adjacent code check words.
Abstract translation: 本说明书描述了用于由多个单片晶片组成的高密度存储器的纠错系统，每个单片晶片包含通过电路和包含在该晶片上的布线来寻址的多个阵列。 晶片上的存储位在功能上被划分为多个块，每个块包含多个单词。 每个块的单词在几个晶片上，每个单词由单个阵列晶片上的多个阵列组成。 块中的每个字都受到类似的纠错双重错误检测码的保护。 该块进一步受到使用b相邻代码组成的两个附加检查词的保护。 检查字中的每个字节保护块的字的一个字节位置。 当SEC-MED代码在任何单词中检测到单个错误时，代码将纠正错误。 如果检测到多重错误，则多个错误信号指向错误的单词，以便通过b相邻的代码检查字进行纠正。
-
-
-
-
-
-
-
-
-
Search Results
104
records
(took 0.018 seconds)
