公开(公告)号：US07221294B1

公开(公告)日：2007-05-22

申请号：US11592888

申请日：2006-11-03

Applicant: William Lo ,  Xiaopeng Chen

Inventor： William Lo ,  Xiaopeng Chen

IPC: H03M5/06

CPC classification number: H03M5/145 ,  H03M5/16 ,  H03M5/20

Abstract: A physical layer device for a network device comprises a converter module that selectively converts an n-bit input to an m-bit output based on first and second mapping functions. A scrambler module selectively scrambles the m-bit output. An encoding module receives the m-bit output from the scrambler module and selectively maps the m-bit output based on the first mapping function to X level output signals and the m-bit output based on the second mapping function to Y level output signals, where X and Y are integers greater than one and X is different than Y.

Abstract translation: 用于网络设备的物理层设备包括转换器模块，其基于第一和第二映射功能选择性地将n位输入转换为m位输出。 扰频器模块选择性地加扰m位输出。 编码模块从加扰器模块接收m位输出，并将基于第一映射功能的m位输出根据第二映射函数选择性地映射到X电平输出信号和m位输出到Y电平输出信号， 其中X和Y是大于1的整数，X不同于Y.

公开(公告)号：US07218254B2

公开(公告)日：2007-05-15

申请号：US10517976

申请日：2003-06-17

Applicant: Josephus Arnoldus Henricus Maria Kahlman

Inventor： Josephus Arnoldus Henricus Maria Kahlman

IPC: H03M1/34

CPC classification number: H04L25/4906 ,  G11B20/1426 ,  G11B2020/1453 ,  H03M5/145

Abstract: A coder is fed with precoded data such that the absolute value of the running digital sum (RDS) of the code words as produced by the coder is limited. This is achieved by ensuring that in a group of 2 code words, the RDS of the first code word is compensated by the RDS of the second code word. The RDS at the end of the second code word is then zero and the excursions of the RDS from the start of the first code word until the end of the second code word are limited because there are only a limited number of bits that can contribute to an increase of the absolute value of the RDS.

Abstract translation: 向编码器馈送预编码数据，使得由编码器产生的码字的运行数字和（RDS）的绝对值是有限的。 这是通过确保在一组2个码字中，第一码字的RDS由第二码字的RDS补偿的。 第二码字末尾的RDS为零，并且RDS从第一码字开始到第二码字结束之间的偏移是有限的，因为只有有限数量的位可以有助于 增加RDS的绝对值。

公开(公告)号：US07215261B2

公开(公告)日：2007-05-08

申请号：US11259253

申请日：2005-10-27

Applicant: Junko Ushiyama ,  Hiroyuki Minemura

Inventor： Junko Ushiyama ,  Hiroyuki Minemura

IPC: H03M7/00

CPC classification number: H03M5/145 ,  G11B20/1426

Abstract: A DVD recording method for recording data onto recording media by using a given coding rule, including: generating two data streams by using a plurality of code mapping variants prepared for coding input data, quasi-randomly selecting one of the plurality of code mapping variants, if absolute DSVs of the two data streams are substantially equal, and converting into recording code sequences, where polarities of said two data streams are inverted with respect to each other; and recording data onto said recording media, based on said recording code sequences.

Abstract translation: 一种DVD记录方法，用于通过使用给定的编码规则将数据记录到记录介质上，包括：通过使用准备用于编码输入数据的多个代码映射变体来生成两个数据流，准随机选择多个代码映射变体之一， 如果两个数据流的绝对DSV基本上相等，并且将所述两个数据流的极性相对于彼此反转的转换成记录码序列; 以及基于所述记录码序列将数据记录到所述记录介质上。

公开(公告)号：US20070096951A1

公开(公告)日：2007-05-03

申请号：US11264396

申请日：2005-11-01

Applicant: Michael Hertz

Inventor： Michael Hertz

IPC: H03M7/00

CPC classification number: G01R13/34 ,  H03M5/145 ,  H04L7/033

Abstract: A method, apparatus and computer program for decoding a data stream. The method comprises the steps of acquiring an analog data signal, determining an initial polarity of the analog data signal, determining a threshold transition level, determining a plurality of transition edges where the analog data signal crosses the threshold transition level, and determining the number of unit intervals between each pair of transition edges. A binary value is assigned to each of the unit intervals, and the binary values are displayed to a user.

公开(公告)号：US07212590B2

公开(公告)日：2007-05-01

申请号：US10181186

申请日：2001-11-21

Applicant: Jacques Meyer

Inventor： Jacques Meyer

IPC: H03D1/00 ,  H04L27/06

CPC classification number: H04L1/0041 ,  H03M5/145 ,  H03M13/2957 ,  H03M13/6362 ,  H03M13/6516 ,  H04L1/005 ,  H04L1/0066 ,  H04L1/0069

Abstract: The invention concerns a data transmission device comprising a turbo coder (22) comprising an interleaver operating on two interleaving blocks and means (26) for producing symbols from said codes (D, Y1, Y2) supplied by the turbo coder The device comprises means (28) for inserting a synchronising sequence into said symbols at a site having a predetermined relationship position relative to the symbols produced with the codes associated with a common interleaving block.

Abstract translation: 本发明涉及一种包括turbo编码器（22）的数据传输设备，其包括在两个交织块上操作的交织器和用于从由turbo编码器提供的所述代码（D，Y 1，Y 2）产生符号的装置（26）。该装置包括 用于在具有与用公共交织块相关联的代码产生的符号的预定关系位置的位置处将同步序列插入到所述符号中的装置（28）。

公开(公告)号：US07206351B2

公开(公告)日：2007-04-17

申请号：US10154898

申请日：2002-05-24

Applicant: Tetsuya Okumura ,  Jun Akiyama ,  Tomiyuki Numata ,  Shigemi Maeda ,  Masanori Ushioda

Inventor： Tetsuya Okumura ,  Jun Akiyama ,  Tomiyuki Numata ,  Shigemi Maeda ,  Masanori Ushioda

IPC: H04L5/12

CPC classification number: G11B11/10595 ,  G11B7/094 ,  G11B7/0956 ,  G11B7/1267 ,  G11B11/10504 ,  G11B11/10515 ,  G11B20/10009 ,  G11B20/10055 ,  G11B20/10101 ,  G11B20/10481 ,  G11B20/1426 ,  H03M5/145 ,  H03M7/46 ,  H03M13/15 ,  H03M13/3738 ,  H03M13/39 ,  H03M13/41 ,  H03M13/6312 ,  H03M13/6343

Abstract: A signal evaluation device for evaluating a decoded signal of maximum likelihood decoding includes: a differential metric circuit for finding differential metrics; comparators for judging whether a difference of differential metrics exceeds a predetermined threshold; counters for counting respective output pulses of the comparators; and a controller for finding the probability of the differential metrics falling at or below the predetermined threshold, based on the number of measured samples and the number of samples counted by the counters, and processing the probability by arithmetic operations so as to obtain an index of signal evaluation. With this arrangement, signal evaluation devices for evaluating a recording medium or a recording medium driving device can have a simpler structure and can perform evaluations in a plurality of PR modes.

Abstract translation: 用于评估最大似然解码的解码信号的信号评估装置包括：用于找到差分度量的差分度量电路; 比较器，用于判断差分度量的差异是否超过预定阈值; 用于计数比较器的各个输出脉冲的计数器; 以及控制器，用于基于所述测量样本的数量和由所述计数器计数的采样数量，找出所述差分量度落在或低于所述预定阈值的概率，并且通过算术运算来处理所述概率，从而获得 信号评估。 通过这种布置，用于评估记录介质或记录介质驱动装置的信号评估装置可以具有更简单的结构，并且可以在多个PR模式中执行评估。

公开(公告)号：US07190726B2

公开(公告)日：2007-03-13

申请号：US11088712

申请日：2005-03-24

Applicant: Toshiyuki Nakagawa ,  Yoshihide Shimpuku ,  Tatsuya Narahara

Inventor： Toshiyuki Nakagawa ,  Yoshihide Shimpuku ,  Tatsuya Narahara

IPC: H04B14/04

CPC classification number: G11B20/1426 ,  G11B20/1403 ,  G11B2020/1287 ,  G11B2020/1453 ,  G11B2020/1457 ,  H03M5/145 ,  H04L7/0083 ,  H04L7/041 ,  H04L7/044

Abstract: An apparatus and method for modulating and demodulating data to transmit or record the data on a recoding medium. Data is modulated and demodulated into a variable-length code. The modulated data comprises a sync signal adding means for adding a sync signal to a train of codes after adding a minimum run. The demodulated data comprises a sync signal detecting means for detecting, from a train of codes, a sync signal having a pattern that breaks a maximum run, after detecting a minimum run. A SYNC bit inserting section adds a sync signal to a train of codes, after adding a minimum run, where the sync signal has a pattern that breaks a maximum run.

Abstract translation: 一种用于调制和解调数据以在记录介质上传送或记录数据的装置和方法。 数据被调制并解调成可变长度码。 调制数据包括一个同步信号添加装置，用于在添加最小运行之后将一个同步信号添加到一列代码。 解调数据包括同步信号检测装置，用于在检测到最小运行之后，从代码串中检测具有断开最大运行的模式的同步信号。 在添加最小运行之后，SYNC位插入部分将同步信号添加到一串代码，其中同步信号具有破坏最大运行的模式。

公开(公告)号：US20070030183A1

公开(公告)日：2007-02-08

申请号：US11543860

申请日：2006-10-06

Applicant: Shinya Kadono ,  Satoshi Kondo ,  Makoto Hagai ,  Kiyofumi Abe

Inventor： Shinya Kadono ,  Satoshi Kondo ,  Makoto Hagai ,  Kiyofumi Abe

IPC: H03M7/40

CPC classification number: G06T9/005 ,  G11B20/1426 ,  H03M5/145 ,  H03M7/40 ,  H03M7/46 ,  H04N19/13 ,  H04N19/134 ,  H04N19/136 ,  H04N19/162 ,  H04N19/176 ,  H04N19/18 ,  H04N19/60 ,  H04N19/61 ,  H04N19/69 ,  H04N19/89 ,  H04N19/93

Abstract: An image coding apparatus provides a run-length encoding unit RLE1 that subjects quantized coefficients which are obtained by quantizing frequency components of an image signal to a variable length coding process by using a run value Run that indicates the number of successive zero coefficients and a level value Lev that indicates a value of a non-zero coefficient following the zero coefficients. The run-length encoding unit RLE1 includes a reordering unit Lreodr for reordering level values Lev; a variable length coder LVLC for coding reordered level values ROLev by using a code table that is selected according to the value of a quantization parameter QP; a reordering unit Rreodr for reordering run values Run from high frequency component of the quantized coefficients to low frequency component; and a variable length coder RVLC for coding reordered run values RORun by using a code table that is selected according to the number of already-processed run values

Abstract translation: 图像编码装置提供游程长度编码单元RLE1，该游程长度编码单元RLE1对通过使用指示连续零系数的数量的运行值Run和可变长度编码处理的等级来计算通过将图像信号的频率分量量化为可变长度编码处理而获得的量化系数 值Lev，其表示零系数之后的非零系数的值。 游程长度编码单元RLE1包括用于重新排列水平值Lev的重排序单元Lreodr; 可变长度编码器LVLC，用于通过使用根据量化参数QP的值选择的码表来对重新排序的电平值ROLev进行编码; 用于重新排序运行值的重新排序单元Rreodr从量化系数的高频分量运行到低频分量; 以及可变长度编码器RVLC，用于通过使用根据已经处理的运行值的数量选择的代码表来对重新排序的运行值RORun进行编码

公开(公告)号：US20070018870A1

公开(公告)日：2007-01-25

申请号：US11529207

申请日：2006-09-29

Applicant: Atsushi Hayami

Inventor： Atsushi Hayami

IPC: H03M3/00

CPC classification number: H03M5/145 ,  G11B20/1426 ,  G11B2020/143 ,  H03M7/46

Abstract: A 6-bit output code word is generated in response to every 4-bit input code word by referring to a set of encoding tables. The encoding tables contain output code words assigned to input code words, and contain encoding-table designation information accompanying each output code word. The encoding-table designation information designates an encoding table among the encoding tables which is used next to generate an output code word immediately following the output code word accompanied with the encoding-table designation information. The generated output code words are sequentially connected into a sequence of the generated output code words which follows predetermined run length limiting rules (1, k)RLL, where “k” denotes a predetermined natural number between 7 and 12.

公开(公告)号：US07137056B2

公开(公告)日：2006-11-14

申请号：US10253903

申请日：2002-09-25

Applicant: Jonathan Ashley ,  William G. Bliss ,  Razmik Karabed ,  Kaichi Zhang

Inventor： Jonathan Ashley ,  William G. Bliss ,  Razmik Karabed ,  Kaichi Zhang

IPC: H03M13/00

CPC classification number: H04L1/006 ,  H03M5/145 ,  H03M13/41 ,  H04L1/0041 ,  H04L1/0054

Abstract: The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y′ having squared-distance≦(1 to 1.5)×dmfb2 in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector 108 outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1⊕D^2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.

Abstract translation: 本发明涉及以下特性的各种组合为特征的编码系统：1）预编码器d的输出端的偶校验; 2）编码率32/34; 3）每个码字至少有9个; 4）编码数据流中不超过13个连续的零（G = 13）; 5）代码字流（I = 13）中每个其他位的任何运行中不超过13个连续的零; 6）对于检测器中y或y'具有平方距离<=（1到1.5）xD mfb 2> / 2>的闭合误差事件，解码器产生最多4个相应的 错误的数据字节; 7）当接收到其位的19个时，可以开始对34位码字的解码; 8）如果维特比检测器108输出非归零（NRZ）符号，则在解码之前将其输出滤波为（1⊕D^ 2），但是如果维特比检测器输出NRZ变换器（NRZI）符号，则其 输出直接解码; 和9）偶数奇偶校验位在NRZ符号上。