公开(公告)号：US20160293144A1

公开(公告)日：2016-10-06

申请号：US14675346

申请日：2015-03-31

申请人： Tektronix, Inc.

发明人： Peter J. Letts

IPC分类号： G09G5/393 ,  G09G5/10 ,  G01R13/34 ,  G06T11/20

CPC分类号： G09G5/393 ,  G01R13/0227 ,  G01R13/0236 ,  G01R13/34 ,  G01R13/345 ,  G06T11/206 ,  G09G5/10

摘要： A method can include generating raster images from digitized signals, each raster image including multiple pixels that each have a count of the number of signals that pass through it, and generating sets of ranges of counts from the totality of counts in a rasterizer image and selected limits on that totality. The method can also include generating mapped images from the raster images and sets of ranges of counts, each mapped image including multiple pixels that each have an output intensity determined by the specific range of counts that contains the corresponding rasterizer image pixel count.

摘要翻译： 一种方法可以包括从数字化信号产生光栅图像，每个光栅图像包括多个像素，每个像素具有通过它们的信号数量的计数，以及从光栅化器图像中的计数的总数生成一组计数范围，并且选择 限制这个整体。 该方法还可以包括从光栅图像和计数范围的集合生成映射图像，每个映射图像包括多个像素，每个像素具有由包含对应的光栅化器图像像素数的特定计数范围确定的输出强度。

公开(公告)号：US20160018443A1

公开(公告)日：2016-01-21

申请号：US14699306

申请日：2015-04-29

申请人： Tektronix, Inc.

发明人： Mark L. Guenther

IPC分类号： G01R13/34

CPC分类号： G01R13/34 ,  G01R13/0272 ,  G01R31/31709

摘要： A method for determining a correlated waveform, including acquiring a generalized waveform record with a repeating pattern, determining a possibly corrected recovered clock signal for the generalized waveform record, selecting a new sample rate that is higher than the clock rate by N time, where N is an integer greater than 1, resampling the generalized waveform so that the new samples fall precisely on two clocks instants of the recovered clock signal that define each unit interval, and on N−1 additional instants equally spaced between the two clock instants of each unit interval to create a resampled waveform, and forming the correlated waveform by taking the mean values of all samples from the resampled waveform having the same offset into a pattern repeat in unit intervals or fractions thereof.

摘要翻译： 一种用于确定相关波形的方法，包括获取具有重复图案的广义波形记录，确定用于广义波形记录的可能校正的恢复时钟信号，选择比时钟速率高N倍的新采样率，其中N 是大于1的整数，对广义波形进行重新采样，使得新采样精确地落在限定每个单位间隔的恢复时钟信号的两个时钟上，以及在每个单元的两个时钟之间等间隔的N-1个附加时刻 间隔以产生重采样波形，并且通过将来自具有相同偏移的重采样波形的所有样本的平均值取为单位间隔或其分数的模式重复来形成相关波形。

公开(公告)号：US5914592A

公开(公告)日：1999-06-22

申请号：US597407

申请日：1996-02-08

申请人： Masanori Saito

发明人： Masanori Saito

IPC分类号： G01R13/20 ,  G01R13/34 ,  H03L7/06 ,  H03M1/12

CPC分类号： G01R13/34

摘要： A signal from an original oscillation circuit is inputted into a phase-locked loop circuit capable of continuously varying a frequency of this signal derived from the original oscillation circuit. The phase-locked loop circuit changes the frequency of the signal derived from the original oscillation circuit into another frequency corresponding to sweep rate variable information derived from a sampling control unit, and then outputs the signal having the changed frequency. This signal outputted from the phase-locked loop circuit is supplied to a variable frequency dividing circuit. This variable frequency dividing circuit frequency-divides the frequency of the signal outputted from the phase-locked loop circuit at an arbitrary frequency dividing ratio corresponding to the sweep rate range information given from the sampling control unit, and thereafter outputs the signal with the frequency-divided frequency as a sampling signal.

摘要翻译： 来自原始振荡电路的信号被输入到能够连续地改变从原始振荡电路得到的该信号的频率的锁相环电路。 锁相环电路将从原始振荡电路得到的信号的频率改变成与从采样控制单元导出的扫描速率可变信息相对应的另一个频率，然后输出具有改变频率的信号。 从锁相环电路输出的信号被提供给可变分频电路。 该可变分频电路以对应于从采样控制单元提供的扫描速率范围信息的任意分频比对从锁相环电路输出的信号的频率进行频率分频，然后输出具有频率 - 分频作为采样信号。

公开(公告)号：US5225776A

公开(公告)日：1993-07-06

申请号：US773057

申请日：1991-10-07

申请人： Laszlo J. Dobos ,  Arthur J. Metz

发明人： Laszlo J. Dobos ,  Arthur J. Metz

IPC分类号： G01R1/067 ,  G01R13/34

CPC分类号： G01R13/34 ,  G11C27/02 ,  G11C27/024

摘要： A signal acquisition and sampling system mounted in an oscilloscope probe includes an input buffer amplifier (30) featuring shunt feedback, offset capability, input bias current compensation, and very low input capacitance. Signal sampling is accomplished by a cascaded pair of differential sampling bridges including a fast track-and-hold stage (40) followed by a slow track-and-hold stage (50). The differential configuration of the bridges features common mode rejection of strobe signal coupling into the signal path and reduces aberrations and voltage droop. The fast track-and-hold stage features Schottky diode switching bridges (42A) and (42B), low value storage capacitors (44A) and (44B), thereby resulting in a fast tracking time. The slow track-and-hold stage features low-leakage diode-connected transistor switching bridges (52A) and (52B) and a FET buffer stage, thereby resulting in fast acquisition of the fast stage output and long hold time for quantization of the sample. A strobe signal is coupled through a cable (72) to a timing generator (80) on integrated circuit (20). The strobe signal causes the fast track-and-hold stage to briefly hold samples of the input signal while simultaneously causing the timing generator to drive the slow track-and-hold stage to quickly acquire the output of the fast stage and hold the acquired value for extended time intervals. The bandwidth of the fast stage is thereby combined with the stability of the slow stage.

摘要翻译： 安装在示波器探头中的信号采集和采样系统包括具有分流反馈，偏移能力，输入偏置电流补偿和非常低的输入电容的输入缓冲放大器（30）。 信号采样通过级联的差分采样桥实现，包括快速跟踪和保持阶段（40），随后是缓慢的跟踪和保持阶段（50）。 桥的差分配置具有共模抑制选通信号耦合到信号路径中并减少像差和电压下降。 快速跟踪保持级具有肖特基二极管开关桥（42A）和（42B），低值存储电容（44A）和（44B），从而导致快速的跟踪时间。 慢速跟踪保持级采用低漏二极管连接的晶体管开关桥（52A）和（52B）和FET缓冲级，从而快速获取快速级输出和长时间保持时间，用于量化量程 。 选通信号通过电缆（72）耦合到集成电路（20）上的定时发生器（80）。 选通信号使得快速跟踪和保持级暂时保持输入信号的采样，同时使定时发生器驱动慢速跟踪保持阶段以快速获取快速级的输出并保持所获取的值 延长时间间隔。 因此，快速阶段的带宽与慢速阶段的稳定性相结合。

公开(公告)号：US4965755A

公开(公告)日：1990-10-23

申请号：US303595

申请日：1989-01-27

申请人： Paul B. Patton ,  Kenneth B. Kidder

发明人： Paul B. Patton ,  Kenneth B. Kidder

IPC分类号： G01R13/34

CPC分类号： G01R13/34

摘要： The present invention is a method and apparatus for monitoring a plurality of AC input signals to a control system. An AC interrupt signal is generated, based on an AC system signal which is substantially phase-synchronous with the AC input signals, for an interrupt time period corresponding to a time period when the AC system signal exceeds a predetermined threshold voltage. The AC interrupt signal is verified and a timer is set for a pseudo-random time value. The AC input signals are sampled when the timer has reached the pseudo-random time value to determine the presence or absence of valid AC input signals.

摘要翻译： 本发明是用于监视到控制系统的多个AC输入信号的方法和装置。 基于与AC输入信号基本相同步的AC系统信号产生AC中断信号，该中断时间对应于AC系统信号超过预定阈值电压的时间段。 对AC中断信号进行验证，并为伪随机时间值设置定时器。 当定时器达到伪随机时间值时，对交流输入信号进行采样，以确定是否存在有效的交流输入信号。

公开(公告)号：US4818931A

公开(公告)日：1989-04-04

申请号：US16308

申请日：1987-02-19

申请人： Andrew H. Naegeli ,  Juan Grau ,  Richard A. Nyquist

发明人： Andrew H. Naegeli ,  Juan Grau ,  Richard A. Nyquist

IPC分类号： G01R13/22 ,  G01R13/20 ,  G01R13/30 ,  G01R13/34 ,  G01R23/16

CPC分类号： G01R13/34 ,  G01R13/206 ,  G01R13/208 ,  G01R13/30

摘要： A vector analyzer incorporates a set of five types of markers for the display, which facilitate the visual analysis of the magnitude, phase and time relationships of the I and Q components of the modulation states displayed. The five markers are: an I marker, a Q marker, a magnitude marker, a phase marker and a time marker. The I and Q markers indicate amplitude in the I and Q coordinates displayed on the X-Y displays. The magnitude marker indicates amplitude on the radial coordinate of the X-Y displays. The phase marker indicates relative phase on the angular coordinate of the X-Y displays. The time marker indicates the time coordinate on the displays, and controls the time instant displayed. The analyzer also incorporates a circuit for performing linear transforms on the I, Q, and time data which allows real time adjustment of the sampled signals and enables the signals to be displayed in a three dimensional projection mode. The linear transform can be used to correct the display for three common sources of error in vector modulated signals: amplitude imbalance, phase errors, and quadrature errors. After the display has been corrected, the correction factors are a measure of the errors in the input signal, or in the device demodulating the input signal.

摘要翻译： 矢量分析仪包含一组五种类型的显示标记，便于对显示的调制状态的I和Q分量的幅度，相位和时间关系进行可视化分析。 五个标记是：I标记，Q标记，幅度标记，相位标记和时间标记。 I和Q标记表示显示在X-Y显示屏上的I和Q坐标的幅度。 幅度标记表示X-Y显示器的径向坐标上的振幅。 相位标记表示X-Y显示器的角坐标上的相对相位。 时间标记表示显示屏上的时间坐标，并控制显示的时刻。 该分析器还包括用于对I，Q和时间数据执行线性变换的电路，其允许对采样信号进行实时调整，并使信号以三维投影模式显示。 线性变换可用于校正矢量调制信号中三个常见误差源的显示：振幅不平衡，相位误差和正交误差。 在显示器被校正之后，校正因子是对输入信号中的误差的量度，或在解调输入信号的装置中。

公开(公告)号：US4791404A

公开(公告)日：1988-12-13

申请号：US119289

申请日：1987-11-06

申请人： Allen L. Hollister

发明人： Allen L. Hollister

IPC分类号： G01R13/34 ,  H03M1/36

CPC分类号： G01R13/34

摘要： A predictive time base control circuit for a waveform sampling system of the type which converts a sequence of analog waveform samples into a sequence of digital quantities for storage in an addressable acquisition memory. The time base circuit generates a sampling control signal which initiates sampling at the end of a time interval of programmable duration following detection of a triggering event in the waveform, and which maintains sampling thereafter at regular intervals. The time base circuit permits the sampling system to operate in an equivalent time mode in which repetitive waveform sections are sampled at progressively skewed sampling intervals with respect to a repetitive triggering event. The sampling control signal is also frequency divided, delayed, and then applied as a write control signal to the sampling system acquisition memory. The time base control circuit includes a memory addressing circuit responsive to the write control signal for incrementing the address of the acquisition memory by an adjustable step size each time data is stored in the memory, thereby facilitating proper ordering of sample data in the memory.

摘要翻译： 一种用于波形采样系统的预测时基控制电路，该系统将一系列模拟波形样本转换成数字量序列，以存储在可寻址采集存储器中。 时基电路产生采样控制信号，其在检测到波形中的触发事件之后的可编程持续时间的时间间隔结束时启动采样，并且以其间隔定期地维持采样。 时基电路允许采样系统在等效时间模式下操作，其中重复波形段相对于重复触发事件以逐渐偏斜的采样间隔进行采样。 采样控制信号也被分频，延迟，然后作为写入控制信号施加到采样系统采集存储器。 时基控制电路包括响应写控制信号的存储器寻址电路，用于每当数据存储在存储器中时将采集存储器的地址递增可调步长，从而便于存储器中样本数据的正确排序。

公开(公告)号：US4594675A

公开(公告)日：1986-06-10

申请号：US526865

申请日：1983-08-26

申请人： Yasuo Yoshizawa

发明人： Yasuo Yoshizawa

IPC分类号： G01D1/00 ,  G01M15/06 ,  G01M15/08 ,  G01R13/34 ,  G06F17/40 ,  G06F15/20

CPC分类号： G01D1/00 ,  G01M15/06 ,  G01M15/08 ,  G01R13/34

摘要： Sampling pulses are obtained by a plurality of sampling through holes which are formed at equal angular intervals in a disc encoder which is fixed to a crankshaft of a piston engine to be measured. An analog output from a pressure sensor for sensing the pressure inside a cylinder is sampled, held by the obtained sampling pulses and converted into a digital signal to provide digital measurement data. The digital measurement data is written into a RAM during a positive period of an internal clock pulse under the control of a direct memory access control circuit and the RAM is accessed by a CPU during a negative period of the internal clock pulse. The digital data read out of the RAM is undergone for the data arithmetic operation by the CPU in the realtime manner.

摘要翻译： 通过在盘式编码器中以相等的角度间隔形成的多个采样通孔获得采样脉冲，该编码器固定在要测量的活塞发动机的曲轴上。 来自用于感测气缸内的压力的压力传感器的模拟输出由所获取的采样脉冲采样，并被转换为数字信号以提供数字测量数据。 在直接存储器访问控制电路的控制下，在内部时钟脉冲的正周期期间将数字测量数据写入RAM中，并且在内部时钟脉冲的负周期期间由CPU访问RAM。 从RAM中读出的数字数据被实时地进行CPU的数据运算操作。

公开(公告)号：US4574278A

公开(公告)日：1986-03-04

申请号：US496192

申请日：1983-05-19

申请人： Steven P. Apelman

发明人： Steven P. Apelman

IPC分类号： G01R13/28 ,  G01R13/34 ,  G09G1/00

CPC分类号： G01R13/28 ,  G01R13/34

摘要： A video synthesizer is adapted for connection to the input circuitry of an oscilloscope, and includes sampling and multiplexing circuitry for presentation of a multiplicity of input signals to a single channel of the oscilloscope. The signals are sampled sequentially, and the samples of respective ones of the signals are multiplexed with corresponding reference voltage levels of a voltage divider so as to vertically displace the signals on the face of the oscilloscope. For periodic input signals, the sequential sampling is repeated at a rate which is not harmonically related to the periodicity of the input signals to fully regenerate the signal waveforms on the oscilloscope. A memory is provided for storing intervals of the input signals in the case of nonperiodic signals, the stored signals then being outputted to the sampling and multiplexing circuitry. By presetting an address counter of the memory, and by selecting a data sampling rate of the memory, the displayed waveforms can be displaced along the x axis of the oscilloscope and expanded to facilitate visual inspection. To provide a maximum rate of sampling, the multiplexing is accomplished with an interlacing of the reference voltages to minimize voltage jumps and reduce the bandwidth of the sample sequence.

摘要翻译： 视频合成器适于连接到示波器的输入电路，并且包括用于将多个输入信号呈现给示波器的单个通道的采样和复用电路。 信号被顺序采样，并且各个信号的样本与分压器的相应参考电压电平多路复用，以垂直位移示波器表面上的信号。 对于周期性输入信号，以与输入信号的周期性不相关的速率重复顺序采样，以完全再生示波器上的信号波形。 提供存储器用于在非周期性信号的情况下存储输入信号的间隔，然后存储的信号被输出到采样和复用电路。 通过预置存储器的地址计数器，并通过选择存储器的数据采样率，显示的波形可以沿着示波器的x轴移位，并扩展以便于目视检查。 为了提供最大采样率，通过对参考电压进行隔行扫描来实现多路复用，以使电压跳变最小化并降低采样序列的带宽。

公开(公告)号：US4523289A

公开(公告)日：1985-06-11

申请号：US458469

申请日：1983-01-17

申请人： Masafumi Soma ,  Yoshihiko Kohno

发明人： Masafumi Soma ,  Yoshihiko Kohno

IPC分类号： G04F10/04 ,  G01R13/34 ,  G01R23/02 ,  G04F10/00

CPC分类号： G01R13/34 ,  G01R23/02 ,  G04F10/00

摘要： A time interval measuring system, which is proposed for measuring in a digital memory, etc. a time interval between two time points meeting with measurement conditions indicative of two kinds of optionally presettable threshold levels, polarities and the numbers of slopes in a digital value train converted from an analog signal.

摘要翻译： 提出用于在数字存储器中测量的时间间隔测量系统等，其中两个时间点之间的时间间隔满足指示两种可选择的可预设的阈值水平，极性和数字值列中的斜率数量的测量条件 从模拟信号转换。