公开(公告)号：US11699668B2

公开(公告)日：2023-07-11

申请号：US17318139

申请日：2021-05-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shu-Shen Yeh ,  Che-Chia Yang ,  Chia-Kuei Hsu ,  Ming-Chih Yew ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/053 ,  H01L23/13

CPC classification number: H01L23/562 ,  H01L21/4878 ,  H01L23/053 ,  H01L23/13

Abstract: A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, an electronic component, a ring structure, and an adhesive layer. The electronic component is located over a first surface of the substrate. The ring structure is located over the first surface of the substrate and surrounding the electronic component. The ring structure has a bottom surface facing the first surface of the substrate and a top surface opposite the bottom surface. The ring structure includes a plurality of side parts and a plurality of corner parts recessed from the top surface and thinner than the side parts. Any two of the corner parts are separated from one another by one of the side parts. The adhesive layer is interposed between the bottom surface of the ring structure and the first surface of the substrate.

公开(公告)号：US11676826B2

公开(公告)日：2023-06-13

申请号：US17462505

申请日：2021-08-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Shu-Shen Yeh ,  Chin-Hua Wang ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/58 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L21/563 ,  H01L21/565 ,  H01L23/3142 ,  H01L23/49838 ,  H01L23/585 ,  H01L24/05 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105

Abstract: A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate, an interposer substrate over the package substrate, two semiconductor dies over the interposer substrate, and an underfill element formed over the interposer substrate and surrounding the semiconductor dies. A ring structure is disposed over the package substrate and surrounds the semiconductor dies. Recessed parts are recessed from the bottom surface of the ring structure. The recessed parts include multiple first recessed parts arranged in each corner area of the ring structure and two second recessed parts arranged in opposite side areas of the ring structure and aligned with a portion of the underfill element between the semiconductor dies. An adhesive layer is interposed between the bottom surface of the ring structure and the package substrate.

公开(公告)号：US20230178465A1

公开(公告)日：2023-06-08

申请号：US18165928

申请日：2023-02-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Kuei Hsu ,  Ming-Chih Yew ,  Shu-Shen Yeh ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/3157 ,  H01L21/4857 ,  H01L21/563 ,  H01L24/16 ,  H01L2224/16227

Abstract: A manufacturing method of a semiconductor package includes the following steps. A redistribution structure is formed. An encapsulated semiconductor device is provided on a first side of the redistribution structure, wherein the encapsulated semiconductor device comprising a semiconductor device encapsulated by an encapsulating material. A substrate is bonded to a second side of the redistribution structure opposite to the first side. The redistribution structure includes a plurality of vias connected to one another through a plurality of conductive lines and a redistribution line connected to the plurality of vias, and, from a top view, an angle greater than zero is included between adjacent two of the plurality of conductive lines.

公开(公告)号：US11600575B2

公开(公告)日：2023-03-07

申请号：US17373016

申请日：2021-07-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shin-Puu Jeng ,  Techi Wong ,  Po-Yao Lin ,  Ming-Chih Yew ,  Po-Hao Tsai ,  Po-Yao Chuang

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00 ,  H01L21/683 ,  H01L25/10 ,  H01L23/31 ,  H01L21/768

Abstract: A method for forming a chip package structure is provided. The method includes forming a conductive pad over a carrier substrate. The method includes forming a substrate layer over the carrier substrate, wherein the conductive pad is embedded in the substrate layer, and the substrate layer includes fibers. The method includes forming a through hole in the substrate layer and exposing the conductive pad. The method includes forming a conductive pillar in the through hole. The method includes forming a recess in the substrate layer. The method includes disposing a chip in the recess. The method includes forming a molding layer in the recess. The method includes forming a redistribution structure over the substrate layer, the conductive pillar, the molding layer, and the chip. The method includes removing the carrier substrate.

公开(公告)号：US20230061968A1

公开(公告)日：2023-03-02

申请号：US17460356

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Chin-Hua Wang ,  Shu-Shen Yeh ,  Chien-Hung Chen ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/31 ,  H01L23/498 ,  H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L21/78

Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface. The second semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface connected with each other, the third sub-surface is connected with the second bottom surface, and a second obtuse angle is between the third sub-surface and the fourth sub-surface. The underfill layer is between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure. The encapsulant encapsulates the first semiconductor device, the second semiconductor device and the underfill layer.

公开(公告)号：US11527457B2

公开(公告)日：2022-12-13

申请号：US17185986

申请日：2021-02-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shu-Shen Yeh ,  Yu-Sheng Lin ,  Ming-Chih Yew ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L21/66 ,  H01L23/367 ,  H01L25/00 ,  H01L23/24 ,  H01L25/18

Abstract: Provided is a package structure including a substrate, a stiffener ring, an eccentric die, a lid layer, and a buffer layer. The stiffener ring is disposed on the substrate. The stiffener ring has an inner perimeter to enclose an accommodation area. The eccentric die is disposed within the accommodation area on the substrate. The eccentric die is offset from a center of the accommodation area to close to a first side of the stiffener ring. The lid layer is disposed on the stiffener ring and overlays the eccentric die. The buffer layer is embedded in the lid layer between the first side of the stiffener ring and the eccentric die. The buffer layer has a thickness less than a thickness of the lid layer.

公开(公告)号：US20220302081A1

公开(公告)日：2022-09-22

申请号：US17206098

申请日：2021-03-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Kuei Hsu ,  Feng-Cheng Hsu ,  Ming-Chih Yew ,  Po-Yao Lin ,  Shuo-Mao Chen ,  Shin-Puu Jeng

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/50 ,  H01L21/768

Abstract: A semiconductor package includes a semiconductor die, a redistribution circuit structure, a supporting structure and a protective layer. The redistribution circuit structure is located on and electrically coupled to the semiconductor die. The supporting structure is located on an outer surface of the redistribution circuit structure, wherein the supporting structure is overlapped with at least a part of the semiconductor die or has a sidewall substantially aligned with a sidewall of the semiconductor die in a vertical projection on the redistribution circuit structure along a stacking direction of the redistribution circuit structure and the supporting structure. The protective layer is located on the supporting structure, wherein the supporting structure is sandwiched between the protective layer and the redistribution circuit structure.

公开(公告)号：US11450622B2

公开(公告)日：2022-09-20

申请号：US17152797

申请日：2021-01-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chin-Hua Wang ,  Shu-Shen Yeh ,  Yu-Sheng Lin ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/12 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

Abstract: A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.

公开(公告)号：US20220230990A1

公开(公告)日：2022-07-21

申请号：US17153739

申请日：2021-01-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ming-Chih Yew ,  Po-Chen Lai ,  Shu-Shen Yeh ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A semiconductor package includes a redistribution structure, a first die, a second die and a buffer layer. The second die is disposed between the first die and the redistribution structure, and the second die is electrically connected to the first die and bonded to the redistribution structure. The buffer layer is disposed on a first sidewall of the second die, wherein a second sidewall of the buffer layer is substantially flush with a third sidewall of the first die.

公开(公告)号：US20220208707A1

公开(公告)日：2022-06-30

申请号：US17699196

申请日：2022-03-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Kuei Hsu ,  Ming-Chih Yew ,  Po-Hao Tsai ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768

Abstract: A redistribution structure includes a first dielectric layer, a pad pattern, and a second dielectric layer. The pad pattern is disposed on the first dielectric layer and includes a pad portion and a peripheral portion. The pad portion is embedded in the first dielectric layer, wherein a lower surface of the pad portion is substantially coplanar with a lower surface of the first dielectric layer. The peripheral portion surrounds the pad portion. The second dielectric layer is disposed on the pad pattern and includes a plurality of extending portions extending through the peripheral portion.