Invention Application
- Patent Title: SEMICONDUCTOR PACKAGES
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Application No.: US17153739Application Date: 2021-01-20
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Publication No.: US20220230990A1Publication Date: 2022-07-21
- Inventor: Ming-Chih Yew , Po-Chen Lai , Shu-Shen Yeh , Po-Yao Lin , Shin-Puu Jeng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L23/31 ; H01L23/538 ; H01L21/683 ; H01L21/48 ; H01L21/56 ; H01L25/00

Abstract:
A semiconductor package includes a redistribution structure, a first die, a second die and a buffer layer. The second die is disposed between the first die and the redistribution structure, and the second die is electrically connected to the first die and bonded to the redistribution structure. The buffer layer is disposed on a first sidewall of the second die, wherein a second sidewall of the buffer layer is substantially flush with a third sidewall of the first die.
Public/Granted literature
- US11742322B2 Integrated fan-out package having stress release structure Public/Granted day:2023-08-29
Information query
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