Image sensor with photosensitive thin film transistors

    公开(公告)号:US07023503B2

    公开(公告)日:2006-04-04

    申请号:US10347149

    申请日:2003-01-17

    申请人: Willem den Boer

    发明人: Willem den Boer

    CPC分类号: H01L27/14609 H01L27/14643

    摘要: An image sensor array includes image sensors having photo TFTs to generate photocurrent in response to received images. The photo TFTs each have their respective gate electrodes shorted to source electrodes to increase generated photocurrent. Storage capacitors are coupled to each photo TFT and discharged upon generation of a photocurrent. Each storage capacitor is coupled to a readout TFT that passes a current from the storage capacitor to a data line. Data lines indicate location of the received image on the image sensor array.

    Method of making an LCD or X-ray imaging device with first and second insulating layers
    85.
    发明授权
    Method of making an LCD or X-ray imaging device with first and second insulating layers 失效
    制造具有第一和第二绝缘层的LCD或X射线成像装置的方法

    公开(公告)号:US06359672B2

    公开(公告)日:2002-03-19

    申请号:US08954725

    申请日:1997-10-20

    IPC分类号: G02F11343

    摘要: This invention is related to an active matrix liquid crystal display (AMLCD) or an X-ray imaging device having a high aperture ratio, and method of making same. The imager or display has an increased aperture ratio because electrodes are formed over dual insulating layers so as to overlap portions of the array address lines and/or TFTs. Both the manufacturability and capacitive crosstalk of the device are improved due to the use of a photo-imageable organic insulating layer between the pixel electrodes and the address lines. An intermediate inorganic insulating layer is provided between the photo-imageable organic insulating layer and the overlapped TFTs in order to prevent the organic insulating layer from directly contacting semiconductor material in the TFTs thereby reducing potential voltage swings.

    摘要翻译: 本发明涉及一种有源矩阵液晶显示器(AMLCD)或具有高开口率的X射线成像装置及其制造方法。 成像器或显示器具有增加的孔径比,因为电极形成在双重绝缘层上,以便与阵列地址线和/或TFT的部分重叠。 由于在像素电极和地址线之间使用可光致成像的有机绝缘层,因此改善了器件的可制造性和电容串扰。 为了防止有机绝缘层与TFT中的半导体材料直接接触,可以在可光致成像的有机绝缘层和重叠的TFT之间设置中间无机绝缘层,从而降低电压摆幅。

    TFT with reduced channel length and parasitic capacitance
    87.
    发明授权
    TFT with reduced channel length and parasitic capacitance 失效
    具有减小沟道长度和寄生电容的TFT

    公开(公告)号:US5872370A

    公开(公告)日:1999-02-16

    申请号:US887899

    申请日:1997-07-03

    摘要: A thin film transistor (TFT) for a liquid crystal display (LCD) and method of making same is disclosed, the TFT having a source and drain electrode where at least one of the source and drain includes first and second conductive layers offset from one another by a distance .DELTA.L so that the resulting TFT channel length L.sub.T is equal to L.sub.T =L.sub.1,2 -.DELTA.L where L.sub.1,2 is either a channel length defined in the first conductive layer or a channel length defined in the second conductive layer. The TFT manufacturing process includes the steps of: a) providing a conductive gate layer and patterning same to form a gate electrode; b) depositing a substantially transparent conductive layer (e.g. ITO) and patterning same to form a pixel electrode; c) depositing and patterning a semiconductor layer (e.g. a-Si); a doped semiconductor contact layer; and a first source-drain conductive layer so as to form a TFT island or area; d) using a single photoresist to etch a channel in the first source-drain layer and a via in a gate insulating layer so as to expose the pixel electrode; and e) depositing and patterning a second source-drain layer over the via and the etched first source-drain layer so as to form a TFT with reduced channel length L.sub.T wherein the second source-drain layer contacts the pixel electrode through the via. At least one of, and preferably both, the source and drain electrodes include a portion of the first and second source-drain layers contacting but offset laterally from one another.

    摘要翻译: 公开了一种用于液晶显示器(LCD)的薄膜晶体管(TFT)及其制造方法,所述TFT具有源极和漏极,其中源极和漏极中的至少一个包括彼此偏移的第一和第二导电层 距离DELTA L,使得所得到的TFT沟道长度LT等于LT = L1,2 DELTA L,其中L1,2是在第一导电层中限定的沟道长度或在第二导电层中限定的沟道长度。 TFT制造方法包括以下步骤:a)提供导电栅极层并将其图案化以形成栅电极; b)沉积基本上透明的导电层(例如ITO)并将其图案化以形成像素电极; c)沉积和图案化半导体层(例如a-Si); 掺杂半导体接触层; 以及第一源极 - 漏极导电层,以便形成TFT岛或区域; d)使用单个光致抗蚀剂蚀刻第一源极 - 漏极层中的沟道和栅极绝缘层中的通孔,以暴露像素电极; 以及e)在所述通孔和所述蚀刻的第一源极 - 漏极层之上沉积和图案化第二源极 - 漏极层,以便形成具有减小的沟道长度LT的TFT,其中所述第二源极 - 漏极层通过所述通孔接触所述像素电极。 源电极和漏电极中的至少一个,优选地两者包括第一和第二源 - 漏层的一部分接触但彼此横向偏移。

    Method of making a TFT with reduced channel length for LCDs
    88.
    发明授权
    Method of making a TFT with reduced channel length for LCDs 失效
    制造LCD的通道长度减小的TFT的方法

    公开(公告)号:US5661050A

    公开(公告)日:1997-08-26

    申请号:US610053

    申请日:1996-02-29

    CPC分类号: H01L29/66765 H01L29/78696

    摘要: A liquid crystal display including an array of thin film transistors. Each thin film device in the array includes gate, source and drain electrodes. At least one of the source and drain electrodes include first and second metal layers offset with respect to one another so as to reduce the channel length of the transistors. Because of the reduced TFT channel length, the TFT channel width can also be reduced while maintaining the same ON current. Thus, the gate-source capacitance is reduced which in turn reduces pixel flickering and image retention and improves gray level uniformity. The first and second source-drain metal layers are of different materials so that the etchant for the second metal does not etch the first metal layer deposited. The TFT may be either a linear TFT or a ring-shaped TFT according to different embodiments of this invention.

    摘要翻译: 一种包括薄膜晶体管阵列的液晶显示器。 阵列中的每个薄膜器件包括栅极,源极和漏极。 源极和漏极中的至少一个包括相对于彼此偏移的第一和第二金属层,以便减小晶体管的沟道长度。 由于TFT沟道长度减小,TFT沟道宽度也可以保持相同的导通电流。 因此,栅极 - 源极电容减小,这反过来又降低了像素闪烁和图像保持并改善了灰度均匀性。 第一和第二源极 - 漏极金属层具有不同的材料,使得用于第二金属的蚀刻剂不会蚀刻沉积的第一金属层。 根据本发明的不同实施例,TFT可以是线性TFT或环形TFT。

    Method of making an array of TFTs having reduced parasitic capacitance
    89.
    发明授权
    Method of making an array of TFTs having reduced parasitic capacitance 失效
    制造具有降低的寄生电容的TFT阵列的方法

    公开(公告)号:US5614427A

    公开(公告)日:1997-03-25

    申请号:US375658

    申请日:1995-01-20

    摘要: A thin film transistor (TFT) array in an active matrix liquid crystal display (AMLCD) including a centrally located round source electrode completely surrounded by a substantially annular or circular shaped drain electrode. The geometric design of the TFT of this invention provides for a thin film transistor having a reduced parasitic capacitance and decreased photosensitivity. The TFTs of this invention are located at the intersections of gate and drain lines of an active matrix LCD array thereby increasing the size of the pixel display openings of the matrix array.

    摘要翻译: 有源矩阵液晶显示器(AMLCD)中的薄膜晶体管(TFT)阵列,其包括由基本上环形或圆形的漏极电极完全包围的居中定位的圆形源电极。 本发明的TFT的几何设计提供了具有降低的寄生电容和降低的光敏性的薄膜晶体管。 本发明的TFT位于有源矩阵LCD阵列的栅极和漏极线的交点处,从而增加矩阵阵列的像素显示开口的尺寸。

    Method of fabricating a TFT with reduced channel length
    90.
    发明授权
    Method of fabricating a TFT with reduced channel length 失效
    制造通道长度减小的TFT的方法

    公开(公告)号:US5532180A

    公开(公告)日:1996-07-02

    申请号:US460248

    申请日:1995-06-02

    CPC分类号: H01L29/66765

    摘要: A thin film transistor (TFT) having a reduced channel length and method of making same are disclosed for liquid crystal display (LCD) applications. The method of making the TFT includes the following process steps: (i) depositing and patterning the gate on a substrate; (ii) depositing and patterning an intrinsic a-Si layer, a n+ a-Si layer, and a source metal layer (e.g. Cr) over the gate; (iii) depositing and patterning an ITO layer to form a pixel electrode portion and a TFT source portion; (iv) etching the source metal layer so that it remains only under the ITO source portion so as to form the TFT source electrode; (v) depositing and patterning a metal (e.g. Mo) to form the drain of the TFT; and (vi) etching the n+ a-Si layer in the TFT channel area so that only the intrinsic semiconductor layer remains between the source and drain. The resulting TFT has a reduced channel length (e.g. less than about 4 .mu.m) less than the feature size of the lithography used so as to maximize I.sub.ON /C.sub.gs(ON) of the TFT. Maximizing I.sub.ON /C.sub.gs(ON) reduces pixel flickering, gray scale non-uniformity, and image retention in LCD applications.

    摘要翻译: 公开了一种具有减小的沟道长度的薄膜晶体管(TFT)及其制造方法,用于液晶显示(LCD)应用。 制造TFT的方法包括以下工艺步骤:(i)在衬底上沉积和图案化栅极; (ii)在栅极上沉积和图案化本征a-Si层,n + a-Si层和源极金属层(例如Cr); (iii)沉积和图案化ITO层以形成像素电极部分和TFT源极部分; (iv)蚀刻源极金属层,使其仅保留在ITO源极部下方,以形成TFT源电极; (v)沉积和图案化金属(例如Mo)以形成TFT的漏极; 和(vi)蚀刻TFT沟道区域中的n + a-Si层,使得只有本征半导体层保持在源极和漏极之间。 所得TFT具有比所使用的光刻特征尺寸小的通道长度(例如小于约4μm),以使TFT的ION / Cgs(ON)最大化。 最大化ION / Cgs(ON)可以降低LCD应用中的像素闪烁,灰度不均匀和图像保留。