公开(公告)号：US06933244B2

公开(公告)日：2005-08-23

申请号：US10340481

申请日：2003-01-10

申请人： William D. Goodhue

发明人： William D. Goodhue

IPC分类号： H01L21/316 ,  H01L21/31

CPC分类号： H01L21/02241 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02269 ,  H01L21/02362 ,  H01L21/31604 ,  H01L21/31666 ,  H01L2924/0002 ,  Y10S438/952 ,  H01L2924/00

摘要： A method passivates a surface of a semiconductor structure. The method provides III-V semiconductor material having a surface to be passivated. Upon the surface of the III-V semiconductor material to be passivated an oxide layer is formed. Thereafter, the surface of the III-V semiconductor material having the oxide layer is passivated, without desorption of the oxide layer and in a vacuum of 2×10−6 Torr, with a material having the ability to intermix with the oxide layer so as to exchange oxygen, passivation layer material, and III-V semiconductor material therebetween to form graded layers of oxidized III-V and passivation material.

摘要翻译： 一种方法钝化半导体结构的表面。 该方法提供具有待钝化表面的III-V半导体材料。 在要钝化的III-V半导体材料的表面上形成氧化物层。 此后，具有氧化物层的III-V族半导体材料的表面被钝化，而不会氧化层的解吸，并且在2×10 -6乇的真空中，具有与 氧化层，以便在其间交换氧，钝化层材料和III-V半导体材料，以形成氧化III-V和钝化材料的分级层。

公开(公告)号：US06818925B2

公开(公告)日：2004-11-16

申请号：US10423149

申请日：2003-04-25

申请人： John Stephen Massa ,  Adrian John Taylor ,  Rodney Hollands Moss

发明人： John Stephen Massa ,  Adrian John Taylor ,  Rodney Hollands Moss

IPC分类号： H01L3300

CPC分类号： H01L21/02241 ,  B82Y20/00 ,  H01L21/02312 ,  H01L21/31662 ,  H01L33/0062 ,  H01S5/0206 ,  H01S5/2275 ,  H01S5/3414 ,  H01S2301/173

摘要： An oxide layer on an indium phosphide semiconductor substrate is doped with silicon. This enables epitaxial layers to be deposited upon the substrate in a conventional manner, including mesa etching and overgrowth, to form a semiconductor structure. The doped oxide layer is thought to reduce diffusion of phosphorus out of the substrate and thus to reduce the zinc levels in the active region of the structure. Additionally, or as an alternative, after mesa etching oxide can be formed on the mesa sides and then doped with silicon. Conventional blocking layers can then be formed over the doped oxide, reducing the diffusion of zinc from the blocking layers into the rest of the structure.

摘要翻译： 磷化铟半导体衬底上的氧化物层掺杂有硅。 这使得能够以常规方式将外延层沉积在衬底上，包括台面蚀刻和过度生长，以形成半导体结构。 认为掺杂的氧化物层可以减少磷从衬底的扩散，从而降低结构有源区的锌含量。 另外，或作为替代方案，在台面蚀刻之后可以在台面上形成氧化物，然后用硅掺杂。 然后可以在掺杂的氧化物上形成常规的阻挡层，减少锌从阻挡层扩散到结构的其余部分。

公开(公告)号：US20040124427A1

公开(公告)日：2004-07-01

申请号：US10735191

申请日：2003-12-12

发明人： Julia Wan-Ping Hsu ,  Michael James Manfra ,  Nils Guenter Weimann

IPC分类号： H01L027/15

CPC分类号： C30B29/40 ,  H01L21/02178 ,  H01L21/02241 ,  H01L21/02258 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02631 ,  H01L21/31679 ,  H01L29/2003 ,  H01L29/7371 ,  H01L29/7786 ,  H01L29/78

摘要： An apparatus includes a crystalline substrate having a top surface, a crystalline semiconductor layer located on the top surface, and a plurality of dielectric regions. The crystalline semiconductor layer includes group III-nitride and has first and second surfaces. The first surface is in contact with the top surface. The second surface is separated from the top surface by semiconductor of the crystalline semiconductor layer. The dielectric regions are located on the second surface. Each dielectric region is distant from the other dielectric regions and covers an end of an associated lattice defect. Each lattice defect threads the crystalline semiconductor layer.

摘要翻译： 一种装置包括具有顶表面的晶体衬底，位于顶表面上的晶体半导体层，以及多个电介质区域。 晶体半导体层包括III族氮化物并具有第一和第二表面。 第一表面与顶表面接触。 第二表面通过晶体半导体层的半导体与顶表面分离。 电介质区域位于第二表面上。 每个电介质区域远离其它电介质区域并覆盖相关晶格缺陷的一端。 每个晶格缺陷都会导致晶体半导体层。

公开(公告)号：US5798555A

公开(公告)日：1998-08-25

申请号：US756415

申请日：1996-11-27

申请人： Umesh Kumar Mishra ,  Steven P. DenBaars

发明人： Umesh Kumar Mishra ,  Steven P. DenBaars

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8256 ,  H01L27/06 ,  H01L29/51 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L29/517 ,  H01L21/02178 ,  H01L21/02241 ,  H01L21/28255 ,  H01L21/31666 ,  H01L21/8256 ,  H01L27/0605 ,  H01L29/66477

摘要： The present invention discloses a method of forming an oxide layer on a layer of germanium including the steps of depositing a layer of aluminum arsenide on the layer of germanium, of exposing the layer of aluminum arsenide to an oxidizing gas mixture so that the aluminum arsenide is oxidized to aluminum oxide, and of controlling excess arsenic released in the aluminum oxide by the exposing step, so as to ensure enhanced electrical properties in the aluminum oxide. The method is used to provide an insulating gate layer for a Ge field effect transistor by forming an oxide layer on Ge and controlling excess arsenic so as to maintain high resistivity in the oxide layer and to avoid the formation of interface surface states which degrade transistor performance. The method is also used to provide complementary metal-insulator-semiconductor logic devices based on the germanium field effect transistor.

摘要翻译： 本发明公开了一种在锗层上形成氧化物层的方法，包括以下步骤：在锗层上沉积砷化铝层，将砷化铝层暴露于氧化气体混合物，使得砷化铝为 氧化成氧化铝，并通过曝光步骤控制在氧化铝中释放的过量的砷，以确保氧化铝中的电性能增强。 该方法用于通过在Ge上形成氧化层并控制多余的砷以提供用于Ge场效应晶体管的绝缘栅极层，以便在氧化物层中保持高电阻率并避免形成降低晶体管性能的界面表面状态 。 该方法还用于提供基于锗场效应晶体管的互补金属 - 绝缘体 - 半导体逻辑器件。

公开(公告)号：US5686350A

公开(公告)日：1997-11-11

申请号：US350022

申请日：1994-11-29

申请人： Bun Lee ,  Mee-Young Yoon ,  Jong-Hyeob Baek

发明人： Bun Lee ,  Mee-Young Yoon ,  Jong-Hyeob Baek

IPC分类号： C30B29/42 ,  H01L21/20 ,  H01L21/205 ,  H01L21/316 ,  H01L27/12

CPC分类号： H01L21/02178 ,  H01L21/02241 ,  H01L21/02255 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02546 ,  H01L21/02573 ,  H01L21/02664 ,  H01L21/31666 ,  Y10S438/902 ,  Y10S438/907 ,  Y10S438/967

摘要： A method for fabricating a defect-free compound semiconductor thin film on a dielectric thin film which oxidizes multi-semiconductor layers consisting of a hetero compound semiconductor thin film made of one of GaAs, InGaAs or InAs over a thin film containing a carbon impurity of a high concentration and made of AlGaAs series by an annealing at a vapor ambient, thereby rapidly growing a hetero-semiconductor thin film over a dielectric thin film made of Al.sub.2 O.sub.3 with no defect.

摘要翻译： 一种用于在电介质薄膜上制造无缺陷的化合物半导体薄膜的方法，该方法在由包含由GaAs，InGaAs或InAs中的一种构成的杂化化合物半导体薄膜上氧化多个半导体层，该半导体薄膜含有 高浓度并且由AlGaAs系列制成，通过在蒸汽环境下进行退火，从而在由Al 2 O 3制成的无电介质薄膜上快速生长异质半导体薄膜。

公开(公告)号：US5327448A

公开(公告)日：1994-07-05

申请号：US860454

申请日：1992-03-30

申请人： Nick Holonyak, Jr. ,  Fred A. Kish ,  Stephen J. Caracci

发明人： Nick Holonyak, Jr. ,  Fred A. Kish ,  Stephen J. Caracci

IPC分类号： H01L21/316 ,  H01S5/026 ,  H01S5/10 ,  H01S5/40 ,  H01S3/19

CPC分类号： H01L21/02178 ,  H01L21/02241 ,  H01L21/02255 ,  H01L21/31666 ,  H01S5/10 ,  H01S5/1021 ,  H01S5/026 ,  H01S5/1028 ,  H01S5/1071 ,  H01S5/4031 ,  H01S5/4056 ,  H01S5/4068

摘要： The disclosure is directed to improved techniques and devices employing an aluminum-bearing III-V semiconductor material and a native oxide of aluminum that is formed in the semiconductor material. Effective optical confinement, tailored to obtain desired operating conditions, can be achieved with a thick native oxide of aluminum that extends through at least one-third of the thickness of the aluminum-bearing layer in which the native oxide is formed. The resultant lateral index step can be made quite large and employed for devices such as ring lasers.

摘要翻译： 本公开涉及采用铝 - III型半导体材料和形成在半导体材料中的铝的天然氧化物的改进的技术和装置。 用于获得所需操作条件而定制的有效光学限制可以通过延伸穿过其中形成天然氧化物的含铝层的厚度的至少三分之一的厚的铝的自然氧化物来实现。 所得到的横向折射率步骤可以做得相当大，并且用于诸如环形激光器的器件。

公开(公告)号：US4684541A

公开(公告)日：1987-08-04

申请号：US872889

申请日：1986-06-11

申请人： Alfonso Franciosi

发明人： Alfonso Franciosi

IPC分类号： H01L21/316 ,  B05D5/12

CPC分类号： H01L21/02299 ,  H01L21/02238 ,  H01L21/02241 ,  H01L21/02255 ,  H01L21/31662 ,  H01L21/31666

摘要： A method is provided for the oxidation of a silicon or gallium arsenide surface by depositing thereon a samarium overlayer comprising trivalent samarium prior to exposure of the surface to an oxidizing atmosphere.

摘要翻译： 提供了一种通过在将表面暴露于氧化气氛之前通过在其上沉积包含三价钐的钐覆盖层来氧化硅或砷化镓表面的方法。

公开(公告)号：US4154663A

公开(公告)日：1979-05-15

申请号：US879020

申请日：1978-02-17

申请人： Robert L. Adams

发明人： Robert L. Adams

IPC分类号： C25F3/12 ,  H01L21/3063 ,  H01L21/316 ,  B23P1/00

CPC分类号： H01L21/02241 ,  C25F3/12 ,  H01L21/02258 ,  H01L21/30635 ,  H01L21/31679

摘要： Method of providing a thinned layer of epitaxial semiconductor material having a substantially uniform reverse breakdown voltage characteristic (RVBV) on a substrate, wherein stringent control is necessary in the determination of the thickness of the epitaxial layer. This method has particular application to the fabrication of high performance Read-IMPATT diodes of gallium arsenide where it is desirable to achieve a device structure in which substantially equal reverse breakdown voltage values exist across the entire substrate. A particular GaAs Read-IMPATT diode has two epitaxial layers including a relatively lightly doped first epitaxial layer disposed on the substrate and a second top epitaxial layer whose thickness must be controlled as to uniformity and as to magnitude to enable proper microwave operation of the device. The method herein disclosed accomplishes a thickness reduction in the top epitaxial layer of a GaAs Read-IMPATT diode by anodically growing an oxide on the top epitaxial layer under voltage limited conditions and then removing the oxide by cathodic reduction to achieve leveling of the top epitaxial layer to a thinned substantially uniform thickness.

摘要翻译： 提供在衬底上具有基本均匀的反向击穿电压特性（RVBV）的外延半导体材料的薄化层的方法，其中在确定外延层的厚度时需要严格的控制。 该方法特别适用于制造砷化镓的高性能读IMPATT二极管，其中希望实现在整个衬底上存在基本上相等的反向击穿电压值的器件结构。 特定的GaAs Read-IMPATT二极管具有两个外延层，其包括设置在衬底上的相对轻掺杂的第一外延层和第二顶部外延层，其厚度必须被控制为均匀性并且大小以使得器件能够进行适当的微波操作。 本文公开的方法通过在电压限制条件下在顶部外延层上阳极生长氧化物，然后通过阴极还原去除氧化物，实现GaAs读取 - 强制二极管的顶部外延层的厚度减小，以实现顶部外延层 变薄到基本均匀的厚度。

公开(公告)号：US3890215A

公开(公告)日：1975-06-17

申请号：US44066474

申请日：1974-02-08

申请人： BELL TELEPHONE LABOR INC

发明人： DILORENZO JAMES VINCENT ,  NIEHAUS WILLIAM CHARLES ,  RODE DANIEL LEON ,  SCHWARTZ BERTRAM

IPC分类号： H01L21/3063 ,  H01L21/316 ,  H01L29/00 ,  B23P1/00 ,  H01L7/00

CPC分类号： H01L21/31679 ,  H01L21/02241 ,  H01L21/02258 ,  H01L21/3063 ,  H01L21/30635 ,  H01L29/00 ,  Y10S438/977

摘要： A method for precisely tailoring the thickness of a layer of semiconductor material in a structure comprising regions of varying doping concentrations in order to achieve desired uniform electrical properties. The method involves, generally, electrolytically thinning the layer to remove the semiconductor material until a desired field distribution in the structure is reached. In one embodiment, an FET with an epitaxial layer on a semi-insulating substrate is manufactured by successively oxidizing the epitaxial layer and dissolving the oxide until the depletion region resulting from the applied potential extends into the semi-insulating substrate and oxide growth stops. This results in a uniform pinch-off condition along the layer regardless of the original non-uniformity in the epitaxial layer. In a further embodiment, the epitaxial layer in an IMPATT structure is thinned by successive oxidation and dissolution until the voltage dropped across the semiconductor is equal to the applied potential and again oxide growth stops. This procedure results in a desired uniform breakdown voltage for the wafer.

摘要翻译： 一种用于在包括改变掺杂浓度的区域的结构中精确地定制半导体材料层的厚度的方法，以便实现期望的均匀电性能。 通常，该方法通常电解稀薄该层以去除半导体材料，直到达到结构中的期望的场分布。 在一个实施例中，在半绝缘衬底上具有外延层的FET通过连续地氧化外延层并溶解氧化物来制造，直到由所施加的电势产生的耗尽区延伸到半绝缘衬底中并且氧化物生长停止。 这导致沿着该层的均匀夹断条件，而不管外延层中的原始不均匀性如何。 在另一个实施方案中，通过连续的氧化和溶解使IMPATT结构中的外延层变薄，直到跨过半导体的电压下降等于所施加的电势，并且再次氧化物生长停止。 该过程导致晶片所需的均匀击穿电压。

公开(公告)号：US3844904A

公开(公告)日：1974-10-29

申请号：US44039574

申请日：1974-02-07

申请人： BELL TELEPHONE LABOR INC

发明人： YAHALOM J

IPC分类号： C01B25/08 ,  C25D11/32 ,  H01L21/316 ,  C23B11/02

CPC分类号： H01L21/02241 ,  C25D11/32 ,  H01L21/02258 ,  H01L21/31679

摘要： A process is described for producing passivating and insulating layers on GaP and related compounds. The process involves anodic oxidation under conditions which permit the use of high current densities without detrimental effects on layer properties.

摘要翻译： 描述了在GaP和相关化合物上制备钝化和绝缘层的方法。 该方法涉及在允许使用高电流密度而对层性能没有不利影响的条件下的阳极氧化。