公开(公告)号：US20170141301A1

公开(公告)日：2017-05-18

申请号：US15223399

申请日：2016-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yang Chang ,  Wen-Ting Chu ,  Kuo-Chi Tu ,  Yu-Wen Liao ,  Hsia-Wei Chen ,  Chin-Chieh Yang ,  Sheng-Hung Shih ,  Wen-Chun You

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/124 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/06 ,  H01L45/065 ,  H01L45/08 ,  H01L45/085 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1206 ,  H01L45/1213 ,  H01L45/122 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/126 ,  H01L45/1266 ,  H01L45/1273 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/14 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/149 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1633 ,  H01L45/1641 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1666 ,  H01L45/1675 ,  H01L45/1683 ,  H01L45/1691

Abstract: The present disclosure relates to a resistive random access memory (RRAM) device. The RRAM device has a bottom electrode arranged over a bottom electrode via. A variable resistive dielectric layer is arranged over the bottom electrode. The variable resistive dielectric layer extends to within a recess in an upper surface of the bottom electrode. A top electrode is disposed over the variable resistive dielectric layer. A top electrode via extends outward from an upper surface of the top electrode at a position centered along a first axis that is laterally offset from a second axis centered upon the recess within the upper surface of the bottom electrode. The top electrode via has a smaller total width than the top electrode

公开(公告)号：US09444045B2

公开(公告)日：2016-09-13

申请号：US14880358

申请日：2015-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsia-Wei Chen ,  Wen-Ting Chu ,  Kuo-Chi Tu ,  Chih-Yang Chang ,  Chin-Chieh Yang ,  Yu-Wen Liao ,  Wen-Chun You ,  Sheng-Hung Shih

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1233 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/122 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1666 ,  H01L45/1683

Abstract: Some embodiments relate to an integrated circuit device. The integrated circuit device includes a resistive random access memory (RRAM) cell, which includes a top electrode and a bottom electrode that are separated by a RRAM dielectric layer. The top electrode of the RRAM cell has a recess in its upper surface. A via is disposed over the RRAM cell and contacts the top electrode within the recess.

Abstract translation: 一些实施例涉及集成电路设备。 集成电路装置包括电阻随机存取存储器（RRAM）单元，其包括由RRAM介电层分离的顶电极和底电极。 RRAM单元的顶部电极在其上表面具有凹部。 通孔设置在RRAM单元上方并与凹部内的顶部电极接触。

公开(公告)号：US20160035975A1

公开(公告)日：2016-02-04

申请号：US14880358

申请日：2015-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsia-Wei Chen ,  Wen-Ting Chu ,  Kuo-Chi Tu ,  Chih-Yang Chang ,  Chin-Chieh Yang ,  Yu-Wen Liao ,  Wen-Chun You ,  Sheng-Hung Shih

IPC: H01L45/00

CPC classification number: H01L45/1233 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/122 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1666 ,  H01L45/1683

Abstract: Some embodiments relate to an integrated circuit device. The integrated circuit device includes a resistive random access memory (RRAM) cell, which includes a top electrode and a bottom electrode that are separated by a RRAM dielectric layer. The top electrode of the RRAM cell has a recess in its upper surface. A via is disposed over the RRAM cell and contacts the top electrode within the recess.

公开(公告)号：US20150090949A1

公开(公告)日：2015-04-02

申请号：US14041514

申请日：2013-09-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yang Chang ,  Wen-Ting Chu ,  Kuo-Chi Tu ,  Yu-Wen Liao ,  Hsai-Wei Chen ,  Chin-Chieh Yang ,  Sheng-Hung Shih ,  Wen-Chun You

IPC: H01L45/00

CPC classification number: H01L45/124 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/06 ,  H01L45/065 ,  H01L45/08 ,  H01L45/085 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1206 ,  H01L45/1213 ,  H01L45/122 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/126 ,  H01L45/1266 ,  H01L45/1273 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/14 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/149 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1633 ,  H01L45/1641 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1666 ,  H01L45/1675 ,  H01L45/1683 ,  H01L45/1691

Abstract: The present disclosure relates to a resistive random access memory (RRAM) cell architecture, with off-axis or laterally offset top electrode via (TEVA) and bottom electrode via (BEVA). Traditional RRAM cells having a TEVA and BEVA that are on-axis can cause high contact resistance variations. The off-axis TEVA and BEVA in the current disclosure pushes the TEVA away from the insulating layer over the RRAM cell, which can improve the contact resistance variations. The present disclosure also relates to a memory device having a rectangular shaped RRAM cell having a larger area that can lower the forming voltage and improve data retention.

Abstract translation: 本发明涉及一种电阻随机存取存储器（RRAM）单元体系结构，具有通过（TEVA）的离轴或横向偏移的顶部电极和通过（BEVA）的底部电极。 具有在轴上的TEVA和BEVA的传统RRAM电池可能导致高接触电阻变化。 本公开中的离轴TEVA和BEVA通过RRAM单元推动TEVA远离绝缘层，这可以改善接触电阻的变化。 本公开还涉及一种具有矩形形状的RRAM单元的存储器件，其具有可以降低形成电压并改善数据保持的较大面积。