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61.
公开(公告)号:US20240047528A1
公开(公告)日:2024-02-08
申请号:US18156049
申请日:2023-01-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minsu SEOL , Keunwook Shin , Alum Jung , Junyoung Kwon , Kyung-Eun Byun , Minseok Yoo
IPC: H01L29/786 , H01L29/16 , H01L29/24 , H01L29/66
CPC classification number: H01L29/78696 , H01L29/1606 , H01L29/24 , H01L29/66969
Abstract: A semiconductor device may include a two-dimensional (2D) material layer, a source electrode and a drain electrode spaced apart from each other on the 2D material layer, a gate insulating layer and a gate electrode on the 2D material layer between the source electrode and the drain electrode, and graphene layers on both sides of the gate insulating layer. The 2D material layer may include a 2D semiconductor material having a polycrystalline structure. The 2D material layer may include a sheet member and a protrusion. The sheet member may extend along one plane. The protrusion may extend in one direction perpendicular to the one plane. The graphene layer may cover a part of the sheet member and the protrusion.
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62.
公开(公告)号:US20240030294A1
公开(公告)日:2024-01-25
申请号:US18321275
申请日:2023-05-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minsu SEOL , Junyoung KWON , Jitak NAM , Minseok Yoo
IPC: H01L29/18 , H01L29/16 , H01L29/417 , H01L21/02
CPC classification number: H01L29/18 , H01L29/1606 , H01L29/41725 , H01L21/02568 , H01L21/02485
Abstract: A semiconductor device may include at least one first two-dimensional material layer; a source electrode and a drain electrode that are respectively on both sides of the at least one first two-dimensional material layer; second two-dimensional material layers respectively on a side of the source electrode and a side of the drain electrode and connected to the at least one first two-dimensional material layer; a gate insulating layer surrounding the at least one first two-dimensional material layer; and a gate electrode on the gate insulating layer.
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公开(公告)号:US20240014287A1
公开(公告)日:2024-01-11
申请号:US18338869
申请日:2023-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eunkyu LEE , Minsu SEOL , Keunwook SHIN
CPC classification number: H01L29/513 , H01L29/7827 , H01L29/4236 , H01L29/4958 , H01L29/517 , H10B12/34 , H01L29/401
Abstract: A semiconductor device may include a substrate including a source area and a drain area separated by a trench; a gate insulating layer in the trench; and a gate electrode. The gate electrode may include a lower buried portion and an upper buried portion in the trench. The lower buried portion may include a first conductive layer, and the upper buried portion may include a two-dimensional (2D) material layer and a second conductive layer. The second conductive layer may include a transition metal. The first conductive layer may include a transition metal identical to the transition metal included in the second conductive layer. The 2D material layer may include a chalcogen compound of a transition metal which is identical to the transition metal in the second conductive layer.
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64.
公开(公告)号:US20230275128A1
公开(公告)日:2023-08-31
申请号:US18154978
申请日:2023-01-16
Inventor: Junyoung KWON , Sangwoo KIM , Kyung-Eun BYUN , Minsu SEOL , Minseok SHIN , Pin ZHAO , Taehyeong KIM , Jaehwan JUNG
CPC classification number: H01L29/18 , H01L29/66969
Abstract: A semiconductor device including a two-dimensional material and a method of manufacturing the same are provided. The semiconductor device may include a first two-dimensional material layer including a first two-dimensional semiconductor material; a plurality of second two-dimensional material layers connected to the first two-dimensional material layer, each having a thickness greater than that of the first two-dimensional material layer, and including a doped two-dimensional semiconductor material; and a plurality of electrodes on the plurality of second two-dimensional material layers.
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65.
公开(公告)号:US20230197837A1
公开(公告)日:2023-06-22
申请号:US18066659
申请日:2022-12-15
Applicant: Samsung Electronics Co., Ltd. , UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
Inventor: Minsu SEOL , Hyeonsuk SHIN , Kyung-Eun BYUN , Hyuntae HWANG , Changseok LEE , Hyeongjoon KIM
CPC classification number: H01L29/7606 , H01L21/02521 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/0262 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/267
Abstract: Provided are a complex of heterogeneous two-dimensional materials and a method of manufacturing the same. The complex of heterogeneous two-dimensional materials may include a substrate; a first two-dimensional material layer on the substrate and having a two-dimensional crystal structure; and a second two-dimensional material layer between the substrate and the first two-dimensional material layer. The second two-dimensional material layer have a two-dimensional crystal structure in which a plurality of phosphorus atoms are covalently bonded to each other.
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66.
公开(公告)号:US20230197811A1
公开(公告)日:2023-06-22
申请号:US18171502
申请日:2023-02-20
Inventor: Minhyun LEE , Minsu SEOL , Ho Won JANG , Yeonchoo CHO , Hyeonjin SHIN
IPC: H01L29/423 , H01L29/04 , H01L29/06 , H01L29/16 , H01L29/66
CPC classification number: H01L29/42364 , H01L29/045 , H01L29/0665 , H01L29/1606 , H01L29/66439
Abstract: Provided is a field effect transistor including a gate insulating layer having a two-dimensional material. The field effect transistor may include a first channel layer; a second channel layer disposed on the first channel layer; a gate insulating layer disposed on the second channel layer; a gate electrode disposed on the gate insulating layer; a first electrode electrically connected to the first channel layer; and a second electrode electrically connected to the second channel layer. Here, the gate insulating layer may include an insulative, high-k, two-dimensional material.
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67.
公开(公告)号:US20230155017A1
公开(公告)日:2023-05-18
申请号:US18157478
申请日:2023-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun LEE , Minsu SEOL , Yeonchoo CHO , Hyeonjin SHIN
IPC: H01L29/778 , H01L27/092 , H01L29/24 , H01L29/78 , H01L29/786 , H01L29/417
CPC classification number: H01L29/7788 , H01L27/092 , H01L29/24 , H01L29/7831 , H01L29/78642 , H01L29/41741
Abstract: A vertical type transistor includes: a substrate; a first source/drain electrode layer provided on the substrate; a second source/drain electrode layer provided above the first source/drain electrode layer; a first gate electrode layer provided between the first and second source/drain electrode layers; a first gate insulating film passing through the first gate electrode layer; a hole passing through the second source/drain electrode layer, the first gate insulating film, and the first source/drain electrode layer; and a first channel layer provided on a lateral side of the hole, wherein the first channel layer may include a 2D semiconductor.
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公开(公告)号:US20230031861A1
公开(公告)日:2023-02-02
申请号:US17967200
申请日:2022-10-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun LEE , Minsu SEOL , Hyeonjin SHIN
IPC: H01L29/10 , H01L29/423 , H01L29/36
Abstract: A transistor including at least one two-dimensional (2D) channel is disclosed. A transistor according to some example embodiments includes first to third electrodes separated from each other, and a channel layer that is in contact with the first and second electrodes, parallel to the third electrode, and includes at least one 2D channel. The at least one 2D channel includes at least two regions having different doping concentrations. A transistor according to some example embodiments includes: first to third electrodes separated from each other; a 2D channel layer that is in contact with the first and second electrodes and parallel to the third electrode; a first doping layer disposed under the 2D channel layer corresponding to the first electrode; and a second doping layer disposed under the 2D channel layer corresponding to the second electrode, wherein the first and second doping layers contact the 2D channel layer.
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69.
公开(公告)号:US20210234015A1
公开(公告)日:2021-07-29
申请号:US17060696
申请日:2020-10-01
Inventor: Minhyun LEE , Minsu SEOL , Ho Won JANG , Yeonchoo CHO , Hyeonjin SHIN
IPC: H01L29/423 , H01L29/16 , H01L29/06 , H01L29/04 , H01L29/66
Abstract: Provided is a field effect transistor including a gate insulating layer having a two-dimensional material. The field effect transistor may include a first channel layer; a second channel layer disposed on the first channel layer; a gate insulating layer disposed on the second channel layer; a gate electrode disposed on the gate insulating layer; a first electrode electrically connected to the first channel layer; and a second electrode electrically connected to the second channel layer. Here, the gate insulating layer may include an insulative, high-k, two-dimensional material.
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70.
公开(公告)号:US20180061734A1
公开(公告)日:2018-03-01
申请号:US15497683
申请日:2017-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwook LEE , Sangwon KIM , Minsu SEOL , Seongjun JEONG , Seunggeol NAM , Seongjun PARK , Hyeonjin SHIN
IPC: H01L23/373 , H01L21/48 , H01L23/31
CPC classification number: H01L23/3733 , B82Y30/00 , C08K3/042 , H01L21/4871 , H01L23/3171 , H01L23/373 , H01L23/3737 , H01L23/3738 , H01L23/42
Abstract: Disclosed are heat dissipation structures using nano-sized graphene fragments such as graphene quantum dots (GQDs) and/or methods of manufacturing the heat dissipation structures. A heat dissipation structure includes a heating element, and a heat dissipation film on the heating element to dissipate heat generated from the heating element, to outside. The heat dissipation film may include GQDs.
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