Method for validating an authentication chip
    51.
    发明申请
    Method for validating an authentication chip 失效
    验证芯片验证方法

    公开(公告)号:US20050010778A1

    公开(公告)日:2005-01-13

    申请号:US10902889

    申请日:2004-08-02

    申请人: Simon Walmsley

    发明人: Simon Walmsley

    摘要: A method for validating untrusted authentication chip, the method includes the steps of: generating a secret random number and calculating a signature for the random number using a signature function, in a trusted authentication chip; encrypting the random number and the signature using a symmetric encryption function using a first secret key, in the trusted authentication chip; passing the encrypted random number and signature from the trusted authentication chip to an untrusted authentication chip; decrypting the encrypted random number and signature with a symmetric decryption function using the first secret key, in the untrusted authentication chip; calculating a signature for the decrypted random number using the signature function in the untrusted authentication chip; comparing the signature calculated in the untrusted authentication chip with the signature decrypted; in the event that the two signatures match, encrypting the decrypted random number together with a data message read from the untrusted chip by the symmetric encryption function using a second secret key and returning it together with the data message to the trusted authentication chip; encrypting the random number together with the data message by the symmetric encryption function using the second secret key, in the trusted authentication chip; comparing the two versions of the random number encrypted together with the data message using the second key, in the trusted authentication chip; in the event that the two versions match, considering the untrusted authentication chip and the data message to be valid; otherwise, considering the untrusted authentication chip and the data message to be invalid.

    摘要翻译: 一种用于验证不可信认证芯片的方法,该方法包括以下步骤:在可信认证芯片中产生秘密随机数并使用签名功能计算随机数的签名; 在可信认证芯片中使用第一秘密密钥使用对称加密功能加密随机数和签名; 将加密的随机数和签名从可信认证芯片传递到不可信认证芯片; 在所述非信任认证芯片中使用所述第一秘密密钥对所述加密随机数和签名进行解密; 使用所述非信任认证芯片中的所述签名功能计算所述解密的随机数的签名; 将不可信认证芯片中计算的签名与已解密的签名进行比较; 在两个签名匹配的情况下,使用第二秘密密钥将解密的随机数与通过对称加密功能从不可信芯片读取的数据消息一起加密,并将其与数据消息一起返回到可信认证芯片; 在可信认证芯片中使用第二秘密密钥通过对称加密功能与数据消息一起加密随机数; 在受信任的认证芯片中,使用第二密钥将加密的随机数的两个版本与数据消息进行比较; 在两种版本匹配的情况下,考虑到不可信认证芯片和数据消息有效; 否则,考虑到不可信认证芯片和数据消息无效。

    Method Of Controlling Quality For A Print Controller
    52.
    发明申请
    Method Of Controlling Quality For A Print Controller 失效
    控制打印控制器质量的方法

    公开(公告)号:US20080086655A1

    公开(公告)日:2008-04-10

    申请号:US11951213

    申请日:2007-12-05

    IPC分类号: G06F1/08 G06F12/02

    摘要: A method performed by a quality assurance integrated circuit for a print controller, the quality assurance integrated circuit comprising a memory; a system clock for generating a clock signal; clock trim circuitry for trimming the frequency of the clock signal; and a processor. the method includes, in the processor, in response to receiving an external signal, determining the number of cycles of the clock signal during a predetermined number of cycles of the external signal or the number of cycles of the external signal during a predetermined number of cycles of the clock signal and to output the determined number of cycles to an external circuit; and in response to receiving a trim value based on the determined number of cycles from the external circuit, storing the trim value in the memory and controlling the clock trim circuitry to trim the frequency of the clock signal using the trim value.

    摘要翻译: 一种由打印控制器的质量保证集成电路执行的方法,所述质量保证集成电路包括存储器; 用于产生时钟信号的系统时钟; 时钟调整电路,用于调整时钟信号的频率; 和处理器。 该方法在处理器中包括响应于接收到外部信号,在预定数量的周期期间在外部信号的预定数量周期内确定时钟信号的周期数或外部信号的周期数 并将确定的周期数输出到外部电路; 并且响应于基于来自外部电路的确定的周期数接收修整值,将修整值存储在存储器中,并且使用修整值来控制时钟修整电路以修整时钟信号的频率。

    PRINT ASSEMBLY FOR A MOBILE TELECOMMUNICATIONS DEVICE
    53.
    发明申请
    PRINT ASSEMBLY FOR A MOBILE TELECOMMUNICATIONS DEVICE 失效
    打印组件用于移动电信设备

    公开(公告)号:US20080068406A1

    公开(公告)日:2008-03-20

    申请号:US11944450

    申请日:2007-11-22

    IPC分类号: B41J3/00 B41J29/38

    摘要: A print assembly for a mobile telecommunications device is provided. The print assembly includes a media-width printhead for printing on a printing medium having a positional indicator thereon, and a media feed assembly for feeding the medium past the printhead. Also included is a capper assembly movable between a capped position covering the printhead and an uncapped position exposing the printhead, with the capper assembly being adapted for engagement with the medium to displace said capper assembly from the capped position to the uncapped position. The Print assembly further includes a print controller having a reader configured to operatively read the positional indicator to provide the print controller with a signal indicative of a position of the medium relative to the printhead, said controller being configured to derive a feed speed of the medium from the signal, and to correlate printing of the printhead with such feed speed.

    摘要翻译: 提供了一种用于移动电信设备的打印组件。 打印组件包括用于在其上具有位置指示器的打印介质上打印的介质宽度打印头,以及用于将介质馈送通过打印头的介质进给组件。 还包括一个可在覆盖打印头的封盖位置和暴露打印头的未盖住位置之间移动的封盖组件,其中,封盖组件适于与介质接合,以将所述封盖组件从封盖位置移动到未封盖位置。 打印组件还包括具有读取器的打印控制器,该读取器被配置为可操作地读取位置指示器以向打印控制器提供指示介质相对于打印头的位置的信号,所述控制器被配置为导出介质的进给速度 并且以这样的进给速度关联打印头的打印。

    Infra-Red Data Structure Printed On A Photograph
    56.
    发明申请
    Infra-Red Data Structure Printed On A Photograph 有权
    红外数据结构打印在照片上

    公开(公告)号:US20080002215A1

    公开(公告)日:2008-01-03

    申请号:US11854435

    申请日:2007-09-12

    IPC分类号: G06K1/00

    摘要: A data structure is printed on a photograph using infra-red ink. The data structure includes a two dimensional array of data blocks. Each adjacent pair of data blocks is separated by a gap and each of the data blocks has a data region holding encoded data. Each data region is confined by clock-marks and borders to facilitate location of the data region and recovery of data from within the data region.

    摘要翻译: 数据结构使用红外线墨水打印在照片上。 数据结构包括数据块的二维数组。 每个相邻的数据块对由间隙分隔,并且每个数据块具有保持编码数据的数据区域。 每个数据区域被时钟标记和边界限制,以便于数据区域的定位和数据区域内的数据恢复。

    Validating Apparatus For Use With A Pair Of Integrated Circuits
    60.
    发明申请
    Validating Apparatus For Use With A Pair Of Integrated Circuits 有权
    用于一对集成电路的验证装置

    公开(公告)号:US20070226498A1

    公开(公告)日:2007-09-27

    申请号:US11757385

    申请日:2007-06-03

    IPC分类号: H04L9/00

    摘要: An apparatus is provided for validating a device. The apparatus includes a first integrated circuit which is configured to generate a random number, reference information using the random number and a secret key. A control system is configured to: receive the random number and the reference information from the first integrated circuit, receive validation information from a second integrated circuit positioned on the device whereby the validation information is generated by the second integrated circuit using the random number and the secret key, and compare the reference and validation information received from the integrated circuits to validate the device.

    摘要翻译: 提供了用于验证设备的设备。 该装置包括第一集成电路,其被配置为使用随机数和秘密密钥生成随机数,参考信息。 控制系统被配置为:从第一集成电路接收随机数和参考信息,从位于设备上的第二集成电路接收验证信息,由此由第二集成电路使用随机数生成验证信息,并且 秘密密钥,并比较从集成电路接收到的参考和验证信息来验证设备。