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公开(公告)号:US20250089300A1
公开(公告)日:2025-03-13
申请号:US18767665
申请日:2024-07-09
Inventor: Yong Hae KIM , Chi-Sun HWANG , Jong-Heon YANG , Seong-Mok CHO , Jae-Eun PI
IPC: H01L29/786 , H01L23/14 , H01L29/24 , H01L29/417 , H01L29/45
Abstract: Provided is an oxide thin film transistor. The transistor includes a gate electrode on a center of a substrate, an active layer provided on the gate electrode and the substrate and including a metal oxide, and a source electrode and a drain electrode provided on the active layer, which is on both sides of the gate electrode. The source electrode and the drain electrode may each include a first metal layer and a second metal layer on the first metal layer.
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公开(公告)号:US20250013034A1
公开(公告)日:2025-01-09
申请号:US18596005
申请日:2024-03-05
Inventor: Chi-Sun HWANG , Yong Hae KIM , Joo Yeon KIM , Jaehyun MOON , Jong-Heon YANG , Kyunghee CHOI , Ji Hun CHOI
IPC: G02B26/08 , B82Y20/00 , G02F1/1343 , G02F1/137
Abstract: Disclosed is an active meta device. The device includes a metal reflective plate, an insulating layer on the metal reflective plate, a first modulation line block provided on one side of the insulating layer, and a second modulation line block provided on another side of the insulating layer facing the first modulation line block.
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公开(公告)号:US20240006516A1
公开(公告)日:2024-01-04
申请号:US18321433
申请日:2023-05-22
Inventor: Yong Hae KIM , Chi-Sun HWANG , Jong-Heon YANG
IPC: H01L29/66 , H01L29/786
CPC classification number: H01L29/66969 , H01L29/78642 , H01L29/78696 , H01L29/7869
Abstract: An embodiment of the inventive concept provides a thin film transistor and a manufacturing method of the same. The manufacturing method includes forming a data electrode on one side of a substrate, forming a spacer layer on a portion of the data electrode and the other side of the substrate, forming a drain electrode on a top surface of the spacer layer, forming an active layer on a sidewall of the spacer layer, the drain electrode, and the data electrode, forming a gate insulation film that covers the active layer on the sidewall of the spacer layer, and forming a doped layer on the gate insulation film and the active layer outside the gate insulation film to form impurity regions at both sides, respectively, of the active layer.
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公开(公告)号:US20230280620A1
公开(公告)日:2023-09-07
申请号:US18084203
申请日:2022-12-19
Inventor: Yong Hae KIM , Chi-Sun HWANG
IPC: G02F1/1343 , G02F1/1333 , G02F1/1335
CPC classification number: G02F1/134345 , G02F1/133357 , G02F1/133514 , G02F1/13439
Abstract: Provided is a liquid crystal display device and a method for operating the liquid crystal display device. In the liquid crystal display device including a plurality of pixels, one pixel of the plurality of pixels includes a first sub pixel and a second sub pixel, which are adjacent to each other. The one pixel includes a first substrate, a first electrode provided on the first substrate, metamaterial layers provided on the first electrode, wherein the metamaterial layers include a first metamaterial layer within the first sub pixel and a second metamaterial layer within the second sub pixel, a liquid crystal layer provided on the first and second metamaterial layers, a second electrode provided on the liquid crystal layer, and a second substrate provided on the second electrode. The first and second metamaterial layers include metamaterials having properties different from each other, respectively.
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公开(公告)号:US20230091070A1
公开(公告)日:2023-03-23
申请号:US17889204
申请日:2022-08-16
Inventor: Ji Hun CHOI , Chan Woo PARK , Ji-Young OH , Seung Youl KANG , Yong Hae KIM , Hee-ok KIM , Jeho NA , Jaehyun MOON , Jong-Heon YANG , Himchan OH , Seong-Mok CHO , Sung Haeng CHO , Jae-Eun PI , Chi-Sun HWANG
IPC: H01B7/06 , H01B3/30 , H01B13/008 , H05K7/06
Abstract: Provided are stretchable electronics and a method for manufacturing the same. The stretchable electronics may include a substrate, a plurality of electronic elements disposed to be spaced apart from each other on the substrate, and a wire structure disposed on the substrate to connect the plurality of electronic elements to each other. The wire structure may include an insulator extending from one of the electronic elements to the other of the adjacent electronic elements and a metal wire configured to cover a top surface and side surfaces of the insulator. The insulator may include at least one bent part in a plan view.
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公开(公告)号:US20220137556A1
公开(公告)日:2022-05-05
申请号:US17491246
申请日:2021-09-30
Inventor: Yong Hae KIM , Gi Heon KIM , Joo Yeon KIM , Jong-Heon YANG , Sang Hoon CHEON , Seong-Mok CHO , Kyunghee CHOI , Ji Hun CHOI , Jae-Eun PI , Chi-Sun HWANG
IPC: G03H1/22
Abstract: Provided is an operation method for a digital hologram implementation device including a backlight and a spatial light modulator, the operation method including setting an initial phase value of an optical signal to a remedy phase, computing a reduced phase based on the remedy phase, correcting the remedy phase based on a difference between the reduced phase and a preset optimized phase, determining whether the corrected remedy phase is a stabilized phase, performing forward propagation on the stabilized phase and an amplitude of the optical signal, correcting the amplitude of the optical signal, performing backward propagation on the corrected amplitude and the stabilized phase, and determining whether a phase derived by the backward propagation is an optimized phase.
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公开(公告)号:US20210096434A1
公开(公告)日:2021-04-01
申请号:US16987982
申请日:2020-08-07
Inventor: Ji Hun CHOI , Yong Hae KIM , Seong-Mok CHO , Chi-Sun HWANG
IPC: G02F1/1362 , G02F1/1335
Abstract: Provided is a display device. The display device includes first to second gate lines provided on a substrate having first and second pixel areas and extending in a first direction, first to third data lines extending in a second direction perpendicular to the first direction and intersecting the first to second gate lines, and a first reflective electrode provided inside the first pixel area and a second reflective electrode provided inside the second pixel area, from a planar viewpoint, wherein the first to second gate lines and the first to third data lines define the first pixel area and the second pixel area, wherein the first to second gate lines are spaced apart from each other in the second direction, wherein the first to third data lines are spaced apart from each other in the first direction.
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公开(公告)号:US20200379313A1
公开(公告)日:2020-12-03
申请号:US16996989
申请日:2020-08-19
Inventor: Gi Heon KIM , Yong Hae KIM , Chi-Sun HWANG
IPC: G02F1/29 , G02F1/1335 , G02F1/1343 , G02F1/1347
Abstract: Provided is an optoelectronic element including a first substrate, a first electrode on the first substrate, a first lens pattern disposed on the first electrode and including a liquid crystal and a black dye molecule, a second lens pattern disposed on the first lens pattern, and a second electrode on the second lens pattern, wherein the black dye molecule includes about 1 to 4 azo groups and about 2 to 5 aromatic cyclic compounds.
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公开(公告)号:US20200321403A1
公开(公告)日:2020-10-08
申请号:US16842396
申请日:2020-04-07
Inventor: Ji-Young OH , Seung Youl KANG , Seongdeok AHN , Jeong Ik LEE , Chi-Sun HWANG , Byoung-Hwa KWON , Tae-Youb KIM , Jeho NA , Sooji NAM , Jaehyun MOON , Young Sam PARK , Chan Woo PARK , Doo-Hee CHO , Chul Woong JOO , Jae-Eun PI
Abstract: Provided is a pressure sensitive display device including a sensing substrate, a reaction substrate provided on the sensing substrate, and spacers provided between the sensing substrate and the reaction substrate to space the sensing substrate apart from the reaction substrate. Here, the sensing substrate includes a flexible substrate and a touch electrode provided on one surface of the flexible substrate, which faces the reaction substrate. The reaction substrate includes a transparent substrate, a transparent electrode provided on one surface of the transparent substrate, which faces the sensing substrate, and a light emitting layer disposed on the transparent electrode.
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公开(公告)号:US20200072665A1
公开(公告)日:2020-03-05
申请号:US16552550
申请日:2019-08-27
Inventor: CHUNWON BYUN , Young-deuk JEON , Chi-Sun HWANG , Chan-mo KANG , Yun-Jeong KIM , Hye Jin KIM , Seongdeok AHN , JEONG IK LEE , Seong Hyun KIM , Bock Soon NA
Abstract: Provided is a pixel circuit. The pixel circuit includes a conversion element configured to form a voltage of an input level corresponding to a magnitude of a received energy at a first node, a first transistor configured to adjust the voltage of the first node to a first level in response to a first signal received at a first time interval, a first capacitive element configured to form a voltage at a second node based on the voltage of the first node, a second transistor configured to adjust a level of the voltage of the second node to a second level in response to the first signal, a third transistor configured to form a voltage at a third node, the voltage having a level corresponding to the level of the voltage of the second node, a fourth transistor configured to output a current corresponding to the voltage of the third node in response to a second signal received in a second time interval after the first time interval, and a fifth transistor configured to adjust the voltage of the third node to a third level in response to a third signal received in a third time interval after the second time interval.
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