公开(公告)号：US5235647A

公开(公告)日：1993-08-10

申请号：US667339

申请日：1991-03-08

申请人： Leon M. Van de Kerkhof

发明人： Leon M. Van de Kerkhof

IPC分类号： G11B20/10 ,  H03H15/00 ,  H03H17/00 ,  H03H17/02 ,  H03H21/00 ,  H03M7/30 ,  H04B1/66 ,  H04B3/04 ,  H04B14/00 ,  H04B14/04

CPC分类号： H03H17/0266 ,  H04B1/667

摘要： A digital transmission system has a transmitter (3,6,9) and a receiver (13,16,19). The transmitter includes a coder for subband coding of the digital signal, by dividing the digital signal band into successive subbands having approximately equal bandwidths. The receiver recontructs a replica of the digital signal by merging the subbands to the digital signal band. The transmitter includes analysis filter means (6) and receiver includes synthesis filter means (16). The filter coefficients in the analysis filter means are unequal to the filter coefficients in the synthesis filter means.

公开(公告)号：US5231477A

公开(公告)日：1993-07-27

申请号：US700855

申请日：1991-05-16

申请人： Naoji Okumura ,  Hirohiko Sakashita

发明人： Naoji Okumura ,  Hirohiko Sakashita

IPC分类号： H03H15/00 ,  H04N9/78

CPC分类号： H04N9/78

摘要： A comb filter serves to process an input digital video signal which is derived from an analog video signal by a analog-to-digital conversion including a sampling process responsive to a system clock signal. The comb filter includes a separating device for separating the input video signal into a plurality of video signals which are offset with each other in timing and which have a clock rate equal to 1/N times a clock rate of the system clock signal where N denotes a predetermined natural number greater than 1. A first delaying device serves to delay a first output signal of the separating device. A chroma signal processor separates a first chroma signal in response to the first output signal of the separating device and an output signal of the first delaying device. A first subtracter serves to subtract the first chroma signal from the output signal of the first delaying device. A second delaying device serves to delay a second output signal of the separating device. An interpolating device serves to interpolate the first chroma signal into a second chroma signal to compensate for a difference in timing between the output signal of the second delaying device and the first chroma signal. A second subtracter serves to subtract the second chroma signal from the output signal of the second delaying device. A combining device serves to combine an output signal of the first subtracter and an output signal of the second subtracter into a luminance signal.

公开(公告)号：US5194832A

公开(公告)日：1993-03-16

申请号：US745712

申请日：1991-08-16

申请人： Hiroyuki Iga

发明人： Hiroyuki Iga

IPC分类号： H03H15/00 ,  H03H17/00 ,  H03H17/06 ,  H03H21/00 ,  H04B3/06 ,  H04L25/03 ,  H04N5/21

CPC分类号： H04L25/03057 ,  H03H17/06 ,  H04N5/211 ,  H03H2017/0692 ,  H04L2025/03662

摘要： A transversal equalizer having a specified number of rear taps. The transversal equalizer includes a first transversal equalizer unit which receives input signals through a first input terminal, equalizes their waveforms, and outputs the equalized signals as cascaded signals and a second transversal equalizer unit which receives the cascade output signals and also receives input signals and outputs an equalized signal derived from the input signals.

公开(公告)号：US5193070A

公开(公告)日：1993-03-09

申请号：US700725

申请日：1991-05-15

申请人： Shigeshi Abiko ,  Shoji Saiki

发明人： Shigeshi Abiko ,  Shoji Saiki

IPC分类号： H03H15/00 ,  G06F7/52 ,  G06F7/523 ,  G06F7/53 ,  G06F7/533 ,  H03H17/02 ,  H03H17/06 ,  H04B3/06

CPC分类号： H03H17/06

摘要： A transversal filter circuit including a plurality of tap circuits, each having a serial multiplication circuit having a simplified construction and not requiring a shift of decimal (binary) points of data during a partial product calculation and addition operation. The serial multiplier includes a bidirectional shift register for shifting a tap coefficient by a predetermined number of bits in one of two directions, a data input circuit, a partial product calculation circuit, an adding and holding circuit, and a control circuit. The control circuit alternatively changes the shift direction of the bidirectional shift register for shifting a tap coefficient and a data output direction of the data input circuit at each successive cycle. The partial product calculation circuit calculates a partial product of a tap coefficient from the shift register and the input data for a plurality of times defined by a bit number of the input data. The adding and holding circuit adds a newly calculated partial product to a sum of the partial products.

摘要翻译： 一种横向滤波器电路，包括多个抽头电路，每个具有串行乘法电路，其具有简化的结构，并且在部分乘积计算和相加操作期间不需要数据的十进制（二进制）点的移位。 串行乘法器包括双向移位寄存器，用于在两个方向中的一个方向上将抽头系数移位预定位数，数据输入电路，部分积计算电路，加法和保持电路以及控制电路。 控制电路交替地改变双向移位寄存器的移位方向，用于在每个连续周期移位数据输入电路的抽头系数和数据输出方向。 部分乘积计算电路计算来自移位寄存器的抽头系数和由输入数据的位数定义的多次的输入数据的部分乘积。 添加和保持电路将新计算的部分乘积添加到部分乘积的和中。

公开(公告)号：US5173925A

公开(公告)日：1992-12-22

申请号：US665130

申请日：1991-03-06

申请人： Shoichi Mizoguchi

发明人： Shoichi Mizoguchi

IPC分类号： H03H15/00 ,  H04B3/04 ,  H04B3/06 ,  H04L1/00 ,  H04L1/20 ,  H04L25/03 ,  H04L27/00 ,  H04L27/01 ,  H04L27/38

CPC分类号： H04L1/206 ,  H04L25/03038 ,  H04L27/38

摘要： In a demodulating system for demodulating a modulated signal into decoded signals (S11'-12', S21'-22'), an error signal correcting circuit (55) is used in correcting discrimination error signals (Ep, Eq) supplied from a demodulator (52) in compliance with error location signals (Sp1-2, Sq1-2) supplied from an error-correcting decoder (54) and in producing corrected discrimination error signals (Ep', Eq') for supply to an adaptive equalizer (51) which is additionally supplied with polarity signals (Dp, Dq) from a delay circuit (53). The modulated signal is equalized in accordance with the corrected discrimination error signals and the polarity signals, demodulated into demodulated signals and the discrimination error signals, and error corrected and decoded into the decoded signals. The delay circuit delays P-channel and Q-channel polarity bits of the demodulated signal into the polarity signals. The error-correcting decoder produces the error location signals by using P-channel and Q-channel error correcting code bits of the demodulated signals. The modulated signal may be supplied first to the demodulator and then to the equalizer.

公开(公告)号：US5142551A

公开(公告)日：1992-08-25

申请号：US662049

申请日：1991-02-28

申请人： David E. Borth ,  Phillip D. Rasky ,  Fuyun Ling ,  M. Vedat Eyuboglu

发明人： David E. Borth ,  Phillip D. Rasky ,  Fuyun Ling ,  M. Vedat Eyuboglu

IPC分类号： H03H15/00 ,  H03H17/00 ,  H03H21/00 ,  H03M13/00 ,  H03M13/23 ,  H04B1/10 ,  H04B1/12 ,  H04B3/14 ,  H04B7/005

CPC分类号： H03M13/00 ,  H04B7/005

摘要： A signal weighting system for associating a confidence level with portions of a communication signal transmitted upon a multipath channel and received by a receiver. A signal received by the receiver is equalized by an equalizer circuit, such as a maximum likelihood sequence estimator, and the equalized signal generated thereby is supplied to an adaptive filter which is synthesizes portions of the multipath channel. The signal received by the receiver is altered responsive to values of a filtered, equalized signal generated by the adaptive filter.

摘要翻译： 一种信号加权系统，用于将置信水平与在多路径信道上发送并由接收机接收的通信信号的部分相关联。 由接收机接收到的信号由诸如最大似然序列估计器的均衡器电路均衡，并且由此生成的均衡信号被提供给合成多径信道的部分的自适应滤波器。 响应于由自适应滤波器产生的经滤波的均衡信号的值，接收机接收到的信号被改变。

公开(公告)号：US5134467A

公开(公告)日：1992-07-28

申请号：US625828

申请日：1990-12-11

申请人： Kee H. Kim

发明人： Kee H. Kim

IPC分类号： H03H15/00 ,  H04N9/78

CPC分类号： H04N9/78

摘要： A luminance/chromaticity signal separation circuit for a composite video signal, consisting of one-line delayers, inverters, adders, multipliers, low-pass filters, subtractors, comparators, band-pass filters, and line comb filters, capable of exactly separating a luminance signal and a chromaticity signal by selectively using output signals which are adapted to vertical luminance variations.

摘要翻译： 用于复合视频信号的亮度/色度信号分离电路，由单线延迟器，反相器，加法器，乘法器，低通滤波器，减法器，比较器，带通滤波器和线梳滤波器组成，能够精确地分离 亮度信号和色度信号，通过选择性地使用适于垂直亮度变化的输出信号。

公开(公告)号：US5087809A

公开(公告)日：1992-02-11

申请号：US617731

申请日：1990-11-26

申请人： Todd A. Jackson

发明人： Todd A. Jackson

IPC分类号： H03H15/00 ,  G02B5/20 ,  H01L27/14 ,  H01L27/148 ,  H01L31/0216 ,  H03K5/00 ,  H03K5/13 ,  H04B3/04 ,  H04L25/04 ,  H04N5/372 ,  H04N9/04 ,  H04N9/07

CPC分类号： H04N3/1587 ,  H01L31/02164 ,  H03K5/13 ,  H03K5/133 ,  H04N9/045 ,  H03K2005/00045 ,  H03K2005/00097

摘要： An improved method of operating a color scanning system of the type that incorporates a monochrome image sensor having at least one photosensitive area that is sequentially exposed to individual colors of a scene and to a dithering of the scene with respect to the image sensor photosensitive area is described along with an improved color filter mask for the at least one photosensitive area. The blue filter mask is formed over a portion the photosensitive area, for example, an L-shaped portion, that covers approximately 75% of the photosensitive area. The method of operation is to first image and dither a red filtered version of the scene onto the photosensitive area to generatr a red image signal. Next a green filtered version of the scene is imaged and dithered onto the photosensitive area to generate a green image signal, and lastly a blue filtered version of the scene is imaged onto the photosensitive area without dithering to generate a blue image signal. The photosensitive area generates an electrical signal from it's full area in this mode, because the blue masking material is transparent to the blue image.

摘要翻译： 一种操作彩色扫描系统的改进方法，其包括具有依次暴露于场景的各种颜色的至少一个感光区域和相对于图像传感器感光区域的场景抖动的单色图像传感器， 描述了用于至少一个感光区域的改进的滤色器掩模。 蓝色滤光器掩模形成在覆盖感光区域的大约75％的感光区域的一部分上，例如L形部分。 操作的方法是首先将红外滤波版本的场景图像和抖动到感光区域上以产生红色图像信号。 接下来，将场景的绿色滤波版本成像并抖动到感光区域上以产生绿色图像信号，并且最后将场景的蓝色滤波版本成像到感光区域上而不进行抖动以产生蓝色图像信号。 由于蓝色掩模材料对蓝色图像是透明的，因此在该模式下，感光区域会从其全部区域产生电信号。

公开(公告)号：US5083203A

公开(公告)日：1992-01-21

申请号：US531057

申请日：1990-05-31

申请人： Jung-Wan Ko ,  Hermann J. Weckenbrock

发明人： Jung-Wan Ko ,  Hermann J. Weckenbrock

IPC分类号： H04N7/12 ,  H03H15/00 ,  H03H17/02 ,  H04N5/14 ,  H04N9/78

CPC分类号： H04N9/78 ,  H04N5/14

摘要： Apparatus for spreading a control signal comprised of widening circuits for extending the control signal horizontally and vertically, a line signal spreading circuit for generating a ramp of increasing values during a given interval at the beginning of each extended control signal, maintaining the maximum value of the ramp for the remainder of the extended control signals and generating a ramp of decreasing values at the end of each extended control signal and also including a circuit for combining the signal values at corresponding points along a plurality of lines as the lines are scanned.

摘要翻译： 用于扩展包括扩展电路的控制信号的装置，用于水平和垂直地扩展控制信号;线信号扩展电路，用于在每个扩展控制信号的开始处产生给定间隔期间的增加值的斜坡，保持最大值 扩展控制信号的其余部分产生斜坡，并在每个扩展控制信号结束时产生减小值的斜坡，并且还包括用于组合沿线扫描的沿着多条线的对应点处的信号值的电路。

公开(公告)号：US5023713A

公开(公告)日：1991-06-11

申请号：US511773

申请日：1990-04-20

申请人： Yoshihisa Nishigori

发明人： Yoshihisa Nishigori

IPC分类号： H04N9/78 ,  H03H15/00 ,  H03H17/02 ,  H04N5/14

CPC分类号： H04N5/144

摘要： A motion detection circuit includes series connected delay circuits for obtaining, with respect to a perceived pixel based on a NTSC input signal, a pixel 262 lines preceding the perceived pixel, a pixel 263 lines preceding the perceived pixel, and a pixel one frame preceding the perceived pixel. A first threshold circuit is provided for comparing the amplitude of a first sum, which is the sum of the perceived pixel and the pixel one frame before, with a first threshold. A second threshold circuit is provided for comparing the amplitude of a second sum, which is the sum of the perceived pixel and the pixel 263 lines before, with a second threshold. A third threshold circuit is provided for comparing the amplitude of a third sum, which is the sum of the pixel 262 lines before the perceived pixel and the pixel one frame before the perceived pixel, with a third threshold. A logic circuit is provided for detecting a motion when the first sum is less than the first threshold and, at the same time, when at least one of two conditions is satisfied, the first condition being that the second sum is greater than the second threshold and the second condition being that the third sum is greater then the third threshold.

摘要翻译： 运动检测电路包括串联连接的延迟电路，用于相对于基于NTSC输入信号的感知像素，获得感知像素之前的像素262行，感知像素之前的像素263行和 感知像素。 提供第一阈值电路，用于将作为感测像素和之前一帧的像素的和的第一和的幅度与第一阈值进行比较。 提供第二阈值电路，用于将第二和（即感知像素和之前的像素之间的像素之和）的振幅与第二阈值进行比较。 提供第三阈值电路，用于将第三和的振幅与第三阈值进行比较，第三和的幅度是感知像素之前的像素262行与感知像素之前一帧的像素之和。 提供逻辑电路，用于当第一和小于第一阈值时检测运动，并且同时当两个条件中的至少一个满足时，第一个条件是第二个和大于第二个阈值 第二个条件是第三个和大于第三个阈值。