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公开(公告)号：US20180067849A1
公开(公告)日：2018-03-08
申请号：US15438687
申请日：2017-02-21
发明人： Shinichi KANNO
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/0292 , G06F2212/1024 , G06F2212/214 , G06F2212/7201 , G06F2212/7202 , G06F2212/7207
摘要： A storage device includes a nonvolatile memory, a cache memory, and a processor. The processor is configured to load, from the nonvolatile memory into the cache memory, a fragment of each of a plurality of layers of an address mapping corresponding to a target logical address to be accessed, and access the nonvolatile memory at a physical address mapped from the target logical address, by referring to the fragments of the layers of the address mapping loaded into the cache memory. The layers are arranged in a hierarchy and each layer of the address mapping except for the lowermost layer indicates correspondence between each of segmented logical address ranges mapped in the layer and a physical location of an immediately-lower layer in which said each segmented logical address range is further mapped in a narrower range. The lowermost layer indicates correspondence between each logical address mapped therein and a physical location of the nonvolatile memory associated therewith.
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公开(公告)号：US20180011760A1
公开(公告)日：2018-01-11
申请号：US15694471
申请日：2017-09-01
发明人： Shinichi KANNO
CPC分类号： G06F11/1008 , G06F11/1012 , G06F11/1044 , G06F11/1068 , G06F11/108 , G11C16/349 , H03M13/05 , H03M13/611
摘要： According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller manages a plurality of namespaces for storing a plurality of kinds of data having different update frequencies. The controller encodes write data by using first coding for reducing wear of a memory cell to generate first encoded data, and generates second encoded data to be written to the nonvolatile memory by adding an error correction code to the first encoded data. The controller changes the ratio between the first encoded data and the error correction code based on the namespace to which the write data is to be written.
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公开(公告)号：US20210382648A1
公开(公告)日：2021-12-09
申请号：US17406619
申请日：2021-08-19
发明人： Shinichi KANNO , Hideki YOSHIDA , Naoki ESAKA , Hiroshi NISHIMURA
IPC分类号： G06F3/06 , G06F12/1009
摘要： According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
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公开(公告)号：US20210266014A1
公开(公告)日：2021-08-26
申请号：US17317280
申请日：2021-05-11
发明人： Shinichi KANNO , Hironori UCHIKAWA
摘要： A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.
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公开(公告)号：US20200379901A1
公开(公告)日：2020-12-03
申请号：US16995029
申请日：2020-08-17
摘要： According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.
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公开(公告)号：US20200341681A1
公开(公告)日：2020-10-29
申请号：US16928422
申请日：2020-07-14
发明人： Shinichi KANNO , Hideki Yoshida , Naoki Esaka , Hiroshi Nishimura
IPC分类号： G06F3/06 , G06F12/1009
摘要： According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
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公开(公告)号：US20200241798A1
公开(公告)日：2020-07-30
申请号：US16564396
申请日：2019-09-09
发明人： Shinichi KANNO
IPC分类号： G06F3/06
摘要： According to one embodiment, a memory system receives from a host read commands each designating both of a block address of a read target block and a read target storage location in the read target block, and executes a data read operation in accordance with each of the received read commands. In response to receiving from the host a first command to transition a first block to which data is already written to a reusable state of being reusable as a new write destination block, the memory system determine whether an incomplete read command designating a block address of the first block exists or not. In a case where the incomplete read command exists, the memory system executes the first command after execution of the incomplete read command is completed.
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公开(公告)号：US20200241797A1
公开(公告)日：2020-07-30
申请号：US16564376
申请日：2019-09-09
发明人： Shinichi KANNO
IPC分类号： G06F3/06
摘要： According to one embodiment, a memory system retrieves write data from a write buffer of a host, and executes a write operation of writing the write data to a write destination location of a write destination block selected from a plurality of blocks. In a case where a first read command to designate the write data as read target data is received from the host before the write operation is finished such that the write data becomes readable, the memory system executes a read operation including an operation of reading the read target data from the write buffer of the host and an operation of returning the read target data to the host. The memory system prohibits releasing a region in the write buffer where the write data is stored until execution of the first read command is completed.
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49.发明申请公开(公告)号：US20190138212A1
公开(公告)日：2019-05-09
申请号：US16222948
申请日：2018-12-17
发明人： Daisuke HASHIMOTO , Shinichi KANNO
摘要： A storage device includes a nonvolatile semiconductor memory device including a plurality of physical blocks and a memory controller. The memory controller is configured to associate one or more physical blocks to each of a plurality of stream IDs, execute a first command containing a first stream ID received from a host, by storing write data included in the write IO in the one or more physical blocks associated with the first stream ID, and execute a second command containing a second stream ID received from the host, by selecting a first physical block that includes valid data and invalid data, transfer the valid data stored in the first physical block to a second physical block, and associate the first physical block from which the valid data has been transferred, with the second stream ID.
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50.发明申请公开(公告)号：US20180373461A1
公开(公告)日：2018-12-27
申请号：US16121161
申请日：2018-09-04
发明人： Shinichi KANNO
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0608 , G06F3/0616 , G06F3/0631 , G06F3/0652 , G06F3/0679 , G06F3/0688 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/3495
摘要： According to one embodiment, a storage system performs a first allocation operation of allocating, for a first namespace, a plurality of first blocks included in the blocks of a nonvolatile memory. The storage system performs a read operation, a write operation or an erase operation on one of the first blocks in response to a command received from a host to read, write or erase the one first block, counts the total number of erase operations performed on the first blocks, and notifies the host of the counted number of erase operations in response to a command received from the host to obtain an erase count associated with the first namespace.
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