公开(公告)号：USD829708S1

公开(公告)日：2018-10-02

申请号：US29610068

申请日：2017-07-10

申请人： Tung-Ying Wu ,  Ming-Chung Liu ,  Yi-Chun Lin

设计人： Tung-Ying Wu ,  Ming-Chung Liu ,  Yi-Chun Lin

公开(公告)号：US08657982B2

公开(公告)日：2014-02-25

申请号：US13551041

申请日：2012-07-17

申请人： Yuan-Chen Liang ,  Chia-Hui Wu ,  Hung-Ta Lee ,  Yi-Chun Lin ,  Li-Chuan Chien ,  Kuo-Hsiang Hsu

发明人： Yuan-Chen Liang ,  Chia-Hui Wu ,  Hung-Ta Lee ,  Yi-Chun Lin ,  Li-Chuan Chien ,  Kuo-Hsiang Hsu

IPC分类号： B44C1/17

CPC分类号： H03K17/955 ,  H03K2017/9602 ,  H03K2217/960755 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T156/10 ,  Y10T156/1039 ,  Y10T156/1052 ,  Y10T156/1064 ,  Y10T156/108

摘要： The steps of a method for fabricating a proximity sensing module that is adapted to be attached to a mobile device, include: (a) patterning an upper conductive film to form a patterned conductive film which includes an upper connective pad that is adapted to be electrically connected to a respective contact on a circuit board of the mobile device, and an induced circuit pattern that is electrically connected to the upper connective pad; (b) adhering an adhesive sheet to the patterned conductive film; and (c) forming a through hole in the adhesive sheet such that the upper connective pad is exposed from the through hole.

摘要翻译： 用于制造适于附接到移动设备的接近感测模块的方法的步骤包括：（a）图案化上导电膜以形成图案化的导电膜，其包括适于电气的上连接焊盘 连接到移动设备的电路板上的相应触点，以​​及电连接到上连接焊盘的感应电路图案; （b）将粘合片粘附到图案化的导电膜上; 和（c）在粘合片中形成通孔，使得上连接垫从通孔露出。

公开(公告)号：US20130207930A1

公开(公告)日：2013-08-15

申请号：US13761154

申请日：2013-02-07

申请人： Yi-Chun Lin ,  Chia-Chi Chen ,  Ming-Kung Wu

发明人： Yi-Chun Lin ,  Chia-Chi Chen ,  Ming-Kung Wu

IPC分类号： G06F3/044

CPC分类号： G06F3/044 ,  G06F2203/04111

摘要： A touch display panel including a display panel and a touch panel is provided. The display panel includes a plurality of pixels. The touch panel is located on the display panel. The touch panel includes a plurality of first touch sensing series, a plurality of second touch sensing series, and an insulating layer. An overlapped region is formed at an intersection of each of the first touch sensing series and each of the second touch sensing series. An area of the insulating layer orthogonally projected on the display panel covers each overlapped region. The surface of the insulating layer has bumps corresponding to each overlapped region of each first touch sensing series and each second touch sensing series. By this way, a problem that users easily see bright spots located at the intersection of each first touch sensing series and each second touch sensing series can be avoided.

摘要翻译： 提供了包括显示面板和触摸面板的触摸显示面板。 显示面板包括多个像素。 触摸面板位于显示面板上。 触摸面板包括多个第一触摸感测系列，多个第二触摸感测系列和绝缘层。 在第一触摸感测系列和第二触摸感测系列中的每一个的交点处形成重叠区域。 正交投影在显示面板上的绝缘层的面积覆盖每个重叠区域。 绝缘层的表面具有对应于每个第一触摸感测系列和每个第二触摸感测系列的每个重叠区域的凸起。 通过这种方式，可以避免用户容易地看到位于每个第一触摸感测系列和每个第二触摸感测系列的交点处的亮点的问题。

公开(公告)号：US20120061737A1

公开(公告)日：2012-03-15

申请号：US13301657

申请日：2011-11-21

申请人： Yi-Chun Lin ,  Kuo-Ming Wu ,  Ruey-Hsin Liu

发明人： Yi-Chun Lin ,  Kuo-Ming Wu ,  Ruey-Hsin Liu

IPC分类号： H01L29/78 ,  B32B3/00 ,  H01L21/336 ,  B82Y99/00

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66681 ,  Y10T428/24802

摘要： A semiconductor device. The device comprises an active region isolated by an isolation structure on a substrate. The device further comprises a gate electrode extending across the active area and overlying the substrate, a pair of source region and drain region, disposed on either side of the gate electrode on the substrate in the active area, and a gate dielectric layer disposed between the substrate and the gate electrode. The gate dielectric layer comprises a relatively-thicker high voltage (HV) dielectric portion and a relatively-thinner low voltage (LV) dielectric portion, wherein the HV dielectric portion occupies a first intersection among the drain region, the isolation structure, and the gate electrode, and a second intersection among the source region, the isolation structure, and the gate electrode.

摘要翻译： 半导体器件。 该器件包括由衬底上的隔离结构隔离的有源区。 该器件还包括延伸跨过有源区并覆盖衬底的栅电极，一对源极区和漏极区，设置在有源区中的衬底上的栅电极的任一侧上，栅电介质层位于 基板和栅电极。 栅介质层包括相对较厚的高电压（HV）电介质部分和相对较薄的低电压（LV）电介质部分，其中HV电介质部分占据漏区，隔离结构和栅极之间的第一交点 电极，以及源区域，隔离结构和栅电极之间的第二交叉点。

公开(公告)号：US07626652B2

公开(公告)日：2009-12-01

申请号：US11314858

申请日：2005-12-20

申请人： Kuo-Chih Lee ,  Yi-Chun Lin ,  Sheng-Jie Chen ,  Huang-De Lin

发明人： Kuo-Chih Lee ,  Yi-Chun Lin ,  Sheng-Jie Chen ,  Huang-De Lin

IPC分类号： G02F1/1335 ,  G02F1/1333 ,  F21V7/04

CPC分类号： H01M2/1077 ,  H01M10/0525 ,  H01M10/0565 ,  H01M10/613 ,  H01M10/625 ,  H01M10/647 ,  H01M10/6563 ,  H01M10/6566

摘要： A backlight module and a liquid crystal display (LCD) device incorporating the same are provided. The backlight module includes a frame and at least a light source. The frame has at least a through aperture. The light source having at least a t high voltage electrode terminal is disposed above the frame. The high voltage electrode terminal is positioned above the through aperture.

摘要翻译： 提供了一种背光模块和包括其的液晶显示器（LCD）装置。 背光模块包括框架和至少一个光源。 该框架至少具有通孔。 具有至少t个高压电极端子的光源设置在框架上方。 高压电极端子位于通孔的上方。

公开(公告)号：US20090129674A1

公开(公告)日：2009-05-21

申请号：US12003976

申请日：2008-01-04

申请人： Yi-Chun Lin ,  Chih-Wei Chen ,  Chiou-Shann Fuh ,  Ming-Huang Shih

发明人： Yi-Chun Lin ,  Chih-Wei Chen ,  Chiou-Shann Fuh ,  Ming-Huang Shih

IPC分类号： G06K9/40 ,  G06K9/34

CPC分类号： G06T5/50 ,  G06T7/13

摘要： A device and a method for obtaining a clear image, the method is executed by a digital signal processor (DSP) chip or a microprocessor. Through merging clear parts of two images with different focal lengths, a single clear image is obtained. The image is divided into a plurality of blocks, and then edge detection is processed to obtain an edge image. Blocks having more complete edge information are selected as clear blocks. Then, the clear blocks are further merged into a single clear image. Once the images are processed with the method, a depth of field of the image can be adjusted, without adding hardware elements of a digital camera such as a variable diaphragm.

摘要翻译： 一种用于获得清晰图像的装置和方法，该方法由数字信号处理器（DSP）芯片或微处理器执行。 通过合并具有不同焦距的两个图像的清晰部分，获得单个清晰图像。 图像被分成多个块，然后处理边缘检测以获得边缘图像。 具有更完整边缘信息的块被选择为清除块。 然后，清除块进一步合并为单个清晰图像。 一旦利用该方法处理了图像，就可以调整图像的景深，而不需要增加诸如可变隔膜的数码相机的硬件元件。

公开(公告)号：US07525150B2

公开(公告)日：2009-04-28

申请号：US10819527

申请日：2004-04-07

申请人： Fu-Hsin Chen ,  Yi-Chun Lin ,  Ruey-Hsin Liu

发明人： Fu-Hsin Chen ,  Yi-Chun Lin ,  Ruey-Hsin Liu

IPC分类号： H01L29/78

CPC分类号： H01L29/66659 ,  H01L21/823418 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/7835

摘要： A method of fabricating a high voltage MOS transistor with a medium operation voltage on a semiconductor wafer. The transistor has a double diffused drain (DDD) and a medium operation voltage such as 6 to 10 volts, which is advantageous for applications having both low and higher operation transistor devices. The second diffusion region of the DDD is self-aligned to the spacer on the sidewalls of the gate and gate dielectric, so that the transistor size may be decreased.

摘要翻译： 一种在半导体晶片上制造具有中等工作电压的高压MOS晶体管的方法。 晶体管具有双扩散漏极（DDD）和诸如6至10伏特的中等操作电压，这对于具有低和高操作晶体管器件的应用是有利的。 DDD的第二扩散区域与栅极和栅极电介质的侧壁上的间隔物自对准，使得晶体管尺寸可能降低。

公开(公告)号：US20090020826A1

公开(公告)日：2009-01-22

申请号：US11778525

申请日：2007-07-16

申请人： Wan-Hua Huang ,  Kuo-Ming Wu ,  Yi-Chun Lin ,  Ming Xiang Li

发明人： Wan-Hua Huang ,  Kuo-Ming Wu ,  Yi-Chun Lin ,  Ming Xiang Li

IPC分类号： H01L29/78

CPC分类号： H01L29/782 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/402

摘要： A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Schottky barrier; and a first heavily doped region of the first conductivity type in the first well region, wherein the first heavily doped region is horizontally spaced apart from the metal-containing layer.

摘要翻译： 半导体结构包括半导体衬底; 半导体衬底中的第一导电类型的第一阱区; 所述第一阱区域上的含金属层，其中所述含金属层和所述第一阱区形成肖特基势垒; 以及第一阱区中的第一导电类型的第一重掺杂区，其中第一重掺杂区与水分离金属层。

公开(公告)号：US20080259538A1

公开(公告)日：2008-10-23

申请号：US11907788

申请日：2007-10-17

申请人： Jung-Wen Chang ,  Yi-Chun Lin

发明人： Jung-Wen Chang ,  Yi-Chun Lin

IPC分类号： G06F1/16

CPC分类号： G06F3/0221 ,  G06F3/021 ,  H01H13/86 ,  H01H2223/05

摘要： The invention discloses a foldable input apparatus including a base, a holding plate and an input module. The base has a first surface, and a first key set is disposed on the first surface. The first holding plate has a second surface and a third surface. The first holding plate is pivotally connected with the base so that the first holding plate can rotate with respect to the base. The second key set is disposed on the second surface. A recess is formed on the third surface and a circuit board is disposed in the recess. The first input module is detachably disposed in the recess, so as to electrically connect with the first circuit board. When the foldable input apparatus is unfolded, the first and the second key sets can be operated for inputting data. When the foldable input apparatus is folded, the first input module can be operated.

摘要翻译： 本发明公开了一种可折叠输入装置，包括基座，保持板和输入模块。 基座具有第一表面，第一键组设置在第一表面上。 第一保持板具有第二表面和第三表面。 第一保持板与基座枢转连接，使得第一保持板可相对于基座旋转。 第二键组设置在第二表面上。 凹槽形成在第三表面上，并且电路板设置在凹槽中。 第一输入模块可拆卸地设置在凹部中，以便与第一电路板电连接。 当可折叠输入装置展开时，可以操作第一和第二键组以输入数据。 当可折叠输入装置折叠时，可以操作第一输入模块。

公开(公告)号：US07420252B2

公开(公告)日：2008-09-02

申请号：US11337147

申请日：2006-01-20

申请人： Kuo-Ming Wu ,  Jian-Hsing Lee ,  Yi-Chun Lin ,  Chi-Chih Chen

发明人： Kuo-Ming Wu ,  Jian-Hsing Lee ,  Yi-Chun Lin ,  Chi-Chih Chen

IPC分类号： H01L23/62

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/4238

摘要： A semiconductor device includes a first doped region disposed on a first well in a semiconductor substrate; a second doped region disposed on a second well adjacent to the first well in the semiconductor substrate, the second doped region having a dopant density higher than that of the second well; and a gate structure overlying parts of the first and second wells for controlling a current flowing between the first and second doped regions. A first spacing distance from an interface between the second doped region and the second well to its closest edge of the gate structure is greater than 200 percent of a second spacing distance from a center point of second doped region to the edge of the gate structure, thereby increasing impedance against an electrostatic discharge (ESD) current flowing between the first and second doped regions during an ESD event.

摘要翻译： 半导体器件包括设置在半导体衬底中的第一阱上的第一掺杂区; 第二掺杂区域，其设置在与所述半导体衬底中的所述第一阱相邻的第二阱上，所述第二掺杂区域的掺杂剂密度高于所述第二阱的掺杂剂密度; 以及覆盖第一和第二阱的部分的栅极结构，用于控制在第一和第二掺杂区域之间流动的电流。 从第二掺杂区域和第二阱之间的界面到其栅极结构的最近边缘的第一间隔距离大于从第二掺杂区域的中心点到栅极结构边缘的第二间隔距离的200％ 从而增加针对在ESD事件期间在第一和第二掺杂区域之间流动的静电放电（ESD）电流的阻抗。