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公开(公告)号:US11304194B2
公开(公告)日:2022-04-12
申请号:US16695332
申请日:2019-11-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihwan Kim , Junsuk Kim , Taeseop Lee , Jiyoung Cha , Hyejeong Kim , Sangho Lee , Sunmin Hwang
Abstract: According to certain embodiments, an electronic device comprises at least one processor; and a memory operatively connected with the at least one processor and storing a plurality of identifiers related to attributes of a communication bearer. The memory stores instructions that, when executed by the at least one processor, cause the electronic device to: receive information related to multi radio access technology (RAT) dual connectivity (MR-DC) from a first base station (BS) connected with a first core network, using a first frequency band; transmit a first packet data network (PDN) connectivity request comprising a first identifier among the plurality of identifiers and a second PDN connectivity request comprising a second identifier among the plurality of identifiers to the first BS, using the first frequency band; establish a first PDN session with the first BS and the first core network, in which the first PDN session provides a communication bearer having a first attribute related to the first identifier; establish a second PDN session with the first BS and the first core network, in which the second PDN session provides a communication bearer having a second attribute related to the second identifier; receive from the first BS, a message indicating that the first BS is connected with a second BS; and communicate using signals with the second BS and the first core network through the second PDN session based on at least a part of the message, using the second frequency band.
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公开(公告)号:US20200370982A1
公开(公告)日:2020-11-26
申请号:US16711550
申请日:2019-12-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Inho Won , Minseok Moon , Byoungkon Park , Sangho Lee , Jaewon Jeong
Abstract: A pressure measuring apparatus for measuring a jetting pressure of a liquid jetted from a nozzle includes a plate including: a first surface facing the nozzle; and a second surface opposite to the first surface; a pressure sensor configured to detect a discharge position and the discharge pressure at the discharge position of the liquid and generate a signal based on the discharge pressure; and electrical components including a controller configured to receive the signal and collect data regarding the discharge pressure. The pressure sensor is provided on the first surface of the plate and the electrical components are provided on the second surface of the plate.
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公开(公告)号:US12058850B2
公开(公告)日:2024-08-06
申请号:US17667652
申请日:2022-02-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Taejin Park , Hui-Jung Kim , Sangho Lee
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/0335 , H10B12/053 , H10B12/34 , H10B12/482
Abstract: A semiconductor memory device includes active regions including first impurity regions and second impurity regions, word lines on the active regions and extended in a first direction, bit lines on the word lines and extended in a second direction crossing the first direction, the bit lines being connected to the first impurity regions, first contact plugs between the bit lines, the first contact plugs being connected to the second impurity regions, landing pads on the first contact plugs, respectively, and gap-fill structures filling spaces between the landing pads, top surfaces of the gap-fill structures being higher than top surfaces of the landing pads.
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公开(公告)号:US20240172428A1
公开(公告)日:2024-05-23
申请号:US18518293
申请日:2023-11-22
Applicant: SAMSUNG ELECTRONICS CO.,LTD.
Inventor: KYUNGHWAN KIM , Hyungeun Choi , Keunnam Kim , Seokhan Park , Seokho Shin , Joongchan Shin , Kiseok Lee , Sangho Lee , Moonyoung Jeong
IPC: H10B12/00
CPC classification number: H10B12/50 , H10B12/09 , H10B12/315
Abstract: A semiconductor device is provided. The semiconductor device includes: a lower structure including a bit line; a cell semiconductor body vertically overlapping the bit line, on the lower structure; a peripheral semiconductor body including a portion disposed on a same level as at least a portion of the cell semiconductor body, on the lower structure; and a peripheral gate on the peripheral semiconductor body, wherein the peripheral semiconductor body includes a lower region having a first width and an upper region having a second width, greater than the first width on the lower region.
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公开(公告)号:US11910418B2
公开(公告)日:2024-02-20
申请号:US17285528
申请日:2019-11-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junsuk Kim , Sangho Lee , Soomin Lee , Wonsuk Chung , Suyoung Park
Abstract: An electronic device, according to various embodiments of the present invention, may comprise: a first communication circuit configured to provide first wireless communication using a first frequency band; a second communication circuit configured to provide second wireless communication using a second frequency band; a processor operatively connected with the first communication circuit and the second communication circuit; and a memory operatively connected with the processor, and configured to store information about the first frequency band and the second frequency band, wherein the memory can store instructions configured to, when executed, enable the processor to communicate with a first base station using the first communication circuit, to receive a first signal from the first base station, and to receive a second signal from a second base station using the second communication circuit on the basis of information on the frequency band while communicating with the first base station, and to select one of a single uplink operation or a dual uplink operation on the basis of information obtained or measured in response to receiving the first signal or the second signal.
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公开(公告)号:US20240023311A1
公开(公告)日:2024-01-18
申请号:US18178401
申请日:2023-03-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangho Lee , Moonyoung Jeong , Hyungjun Noh
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/482 , H10B12/05
Abstract: A semiconductor device includes a vertical pattern including a first source/drain region, a second source/drain region having a height higher than a height of the first source/drain region, and a vertical channel region between the first and second source/drain regions, a gate structure facing a first side surface of the vertical pattern, and a back gate structure facing a second side surface, opposite to the first side surface of the vertical pattern. The gate structure includes a gate electrode on the first side surface of the vertical pattern, and a gate dielectric layer including a portion disposed between the vertical pattern and the gate electrode. The back gate structure includes a back gate electrode on the second side surface of the vertical pattern, and a dielectric structure including a portion disposed between the vertical pattern and the back gate electrode. The dielectric structure includes an air gap.
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公开(公告)号:US11843670B2
公开(公告)日:2023-12-12
申请号:US16534619
申请日:2019-08-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soomin Lee , Jangbok Lee , Hansung Leem , Hyejeong Kim , Sangho Lee , Mooyoung Kim
IPC: H04L67/141 , H04L67/143 , H04L43/08
CPC classification number: H04L67/141 , H04L43/08 , H04L67/143
Abstract: An electronic device and a method of an electronic device are provided. The electronic device includes a memory, a communication module, and a processor configured to identify application information stored in the memory, monitor network status using the communication module, and control a packet data unit (PDU) session based on the application information or the network status. The method includes identifying application information stored in a memory of the electronic device; monitoring network status using a communication module of the electronic device; and controlling a PDU session based on the application information or the network status.
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公开(公告)号:US20230320077A1
公开(公告)日:2023-10-05
申请号:US18187229
申请日:2023-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Moonyoung Jeong , Kiseok Lee , Sangho Lee , Hyungjun Noh
IPC: H10B12/00 , H01L23/528
CPC classification number: H10B12/36 , H10B12/482 , H10B12/488 , H01L23/5283 , H10B12/485
Abstract: A semiconductor device includes a substrate, a first gate structure and a second gate structure on the substrate, a single back gate structure between the first gate structure and the second gate structure, a first structure including a first vertical channel region extending in a vertical direction, at least a portion of the first vertical channel region between the first gate structure and the single back gate structure, and a second structure including a second vertical channel region extending in the vertical direction. The second structure is spaced apart from the first structure, and at least a portion of the second vertical channel region is between the second gate structure and the single back gate structure.
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公开(公告)号:US11710788B2
公开(公告)日:2023-07-25
申请号:US17542969
申请日:2021-12-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyujin Kim , Hui-Jung Kim , Junsoo Kim , Sangho Lee , Jae-Hwan Cho , Yoosang Hwang
IPC: H01L29/423 , H01L21/762 , H01L29/66 , H01L21/311 , H01L29/78 , H01L21/8234 , H10B12/00
CPC classification number: H01L29/4236 , H01L21/311 , H01L21/7621 , H01L21/76224 , H01L21/823437 , H01L21/823462 , H01L21/823481 , H01L29/4232 , H01L29/42376 , H01L29/66621 , H01L29/7827 , H10B12/053
Abstract: A semiconductor device may include active patterns extended in a first direction and spaced apart from each other in the first direction, a device isolation layer defining the active patterns, an insulating structure provided between the active patterns and between the device isolation layer, and a gate structure disposed on the insulating structure and extended in a second direction crossing the first direction. The gate structure may include an upper portion and a lower portion. The lower portion of the gate structure may be enclosed by the insulating structure.
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公开(公告)号:US11647627B2
公开(公告)日:2023-05-09
申请号:US17168952
申请日:2021-02-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jiseok Hong , Sangho Lee , Seoryong Park , Jiyoung Ahn , Kiseok Lee , Kiseok Lee , Yoonyoung Choi , Seunguk Han
IPC: H01L27/108
CPC classification number: H01L27/10888 , H01L27/10814 , H01L27/10855 , H01L27/10885
Abstract: An integrated circuit device includes: a substrate including a plurality of active regions; a bit line extending on the substrate in a horizontal direction; a direct contact connected between a first active region selected among the plurality of active regions and the bit line; an inner oxide layer contacting a sidewall of the direct contact; and a carbon-containing oxide layer nonlinearly extending on a sidewall of the bit line in a vertical direction, the carbon-containing oxide layer contacting the sidewall of the bit line.
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