公开(公告)号：US11935847B2

公开(公告)日：2024-03-19

申请号：US17737472

申请日：2022-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Changbae Lee ,  Bongju Cho ,  Younggwan Ko ,  Yongkoon Lee ,  Moonil Kim ,  Youngchan Ko

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L23/66 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/13 ,  H01L2223/6677 ,  H01L2224/0401

Abstract: A semiconductor package includes: a connection structure having a first surface and a second, and including a redistribution layer; a passive component disposed on the first surface of the connection structure, and electrically connected to the redistribution layer; a semiconductor chip disposed on the first surface of the connection structure, and electrically connected to the redistribution layer; a first encapsulant disposed on the first surface of the connection structure and covering at least a portion of the semiconductor chip; a second encapsulant disposed on the first surface of the connection structure and covering at least a portion of the passive component; an antenna substrate disposed on the first encapsulant and including a wiring layer, at least a portion of the wiring layer including an antenna pattern; and a through via penetrating at least a portion of each of the connection structure, the first encapsulant, and the antenna substrate.

公开(公告)号：US11676927B2

公开(公告)日：2023-06-13

申请号：US17317309

申请日：2021-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Don Mun ,  Myungsam Kang

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L24/20 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: Provided is a semiconductor package device including a lower redistribution substrate including a first redistribution pattern, the first redistribution pattern including a first interconnection portion and a first via portion provided on the first interconnection portion, a semiconductor chip disposed on the lower redistribution substrate, the semiconductor chip including a chip pad facing the lower redistribution substrate, an upper redistribution substrate vertically spaced apart from the lower redistribution substrate, the upper redistribution substrate including a second redistribution pattern, a vertical conductive structure disposed between the lower redistribution substrate and the upper redistribution substrate and disposed at a side of the semiconductor chip, a third redistribution pattern disposed between the lower redistribution substrate and the vertical conductive structure, and an encapsulant disposed on the semiconductor chip, the vertical conductive structure, and the third redistribution pattern, wherein the first via portion is in contact with the third redistribution pattern, and wherein a level of a bottom surface of the vertical conductive structure is higher than a level of a bottom surface of the chip pad.

公开(公告)号：US20230131240A1

公开(公告)日：2023-04-27

申请号：US17723689

申请日：2022-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngchan KO ,  Myungsam Kang ,  Jeongseok Kim ,  Bongju Cho

IPC: H01L23/538 ,  H01L25/10 ,  H01L23/498

Abstract: A semiconductor package includes a lower redistribution structure including a wiring layer, and a via connected to the wiring layer; a semiconductor chip on the lower redistribution structure; wiring patterns disposed on the lower redistribution structure and extending in a horizontal direction, the wiring patterns including a first wiring pattern; metal patterns on the wiring patterns, the metal patterns including a first connection pillar and a first dummy pillar disposed on the first wiring pattern; an encapsulant on the lower redistribution structure, the semiconductor chip, the wiring patterns, and the metal patterns; and an upper redistribution structure on the encapsulant. The first connection pillar is directly connected to the upper redistribution structure.

公开(公告)号：US11626367B2

公开(公告)日：2023-04-11

申请号：US16988831

申请日：2020-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Kyungdon Mun

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/00 ,  H01L23/36

Abstract: A semiconductor package includes a redistribution substrate including a first redistribution layer; a semiconductor chip having a connection pad connected to the first redistribution layer; a vertical connection conductor electrically connected to the connection pad by the first redistribution layer; a core member having a first through-hole accommodating the semiconductor chip and a second through-hole accommodating the vertical connection conductor; an encapsulant filling the first and second through-holes; and a redistribution member including a second redistribution layer. The vertical connection conductor and the core member include a same material. A width of a lower surface of the vertical connection conductor is wider than that of an upper surface thereof, a width of a lower end of the first through-hole is narrower than that of an upper end thereof, and a width of a lower end of the second through-hole is narrower than that of an upper end thereof.

公开(公告)号：US11527495B2

公开(公告)日：2022-12-13

申请号：US17154041

申请日：2021-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Sangkyu Lee ,  Yongkoon Lee

IPC: H01L23/66 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/52 ,  H01L23/31 ,  H01Q21/06

Abstract: A semiconductor package includes a front redistribution structure having a first surface and a second surface, opposite to the first surface, a dielectric layer, an antenna substrate including a plurality of antenna members in the dielectric layer, a semiconductor chip having a connection pad connected to the plurality of antenna members, a conductive core structure having a first through-hole accommodating the antenna substrate and a second through-hole accommodating the semiconductor chip, and a rear redistribution structure including a conductive cover layer exposing an upper portion of the antenna substrate and covering an upper portion of the semiconductor chip, and a conductive via connecting the conductive cover layer to the conductive core structure.

公开(公告)号：US11387225B2

公开(公告)日：2022-07-12

申请号：US16989239

申请日：2020-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Yongjin Park

IPC: H01L25/18 ,  H01L25/065

Abstract: A fan-out type semiconductor package may include a frame, an upper chip stack, a first redistribution pattern, a lower chip stack, a second redistribution pattern and a redistribution post. The frame may have a cavity. The upper chip stack may be arranged in the cavity. The first redistribution pattern may be arranged under the frame. The first redistribution pattern may be electrically connected with the upper chip stack. The lower chip stack may be arranged under the first redistribution pattern. The second redistribution pattern may be arranged under the lower chip stack. The second redistribution pattern may be electrically connected with the lower chip stack. The redistribution post may be electrically connected between the first redistribution pattern and the second redistribution pattern. Thus, the fan-out type semiconductor package may have an improved heat dissipation characteristic with a thin thickness.

公开(公告)号：US20220013465A1

公开(公告)日：2022-01-13

申请号：US17195823

申请日：2021-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myungsam Kang ,  Youngchan Ko ,  Jeongseok Kim ,  Bongju Cho

IPC: H01L23/538 ,  H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a first redistribution structure having a first surface in which a first pad and a second pad are embedded and including a first redistribution layer thereon, and a vertical connection structure including a land layer and a pillar layer. The land layer is embedded in the first surface of the first redistribution structure, and a width of an upper surface of the land layer is narrower than a width of a lower surface of the pillar layer.