公开(公告)号：US20060077367A1

公开(公告)日：2006-04-13

申请号：US11284187

申请日：2005-11-22

申请人： Naoyuki Kobayashi ,  Akikazu Tanimoto ,  Yasushi Mizuno ,  Kenichi Shiraishi ,  Katsushi Nakano ,  Soichi Owa

发明人： Naoyuki Kobayashi ,  Akikazu Tanimoto ,  Yasushi Mizuno ,  Kenichi Shiraishi ,  Katsushi Nakano ,  Soichi Owa

IPC分类号： G03B27/42

CPC分类号： G03F7/7085 ,  G03B27/52 ,  G03F7/00 ,  G03F7/2041 ,  G03F7/70316 ,  G03F7/70341 ,  G03F7/70775 ,  G03F7/70916 ,  G03F7/70925 ,  G03F7/70958 ,  G03F9/7015 ,  G03F9/7088 ,  G03F9/7096

摘要： There is provided an exposure apparatus capable of forming a desirable device pattern by removing unnecessary liquid when performing exposure by projecting a pattern onto the substrate via a projection optical system and the liquid. The exposure device projects an image of the pattern onto the substrate P via the projection optical system and the liquid so as to expose the substrate P. The exposure device includes a liquid removing mechanism 40 which removes the liquid remaining on a part 7 arranged in the vicinity of the image plane of the projection optical system.

公开(公告)号：US06748037B1

公开(公告)日：2004-06-08

申请号：US09554690

申请日：2000-05-18

申请人： Hisakazu Katoh ,  Akinori Hashimoto ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matuda

发明人： Hisakazu Katoh ,  Akinori Hashimoto ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matuda

IPC分类号： H04L2706

CPC分类号： H04L27/2273 ,  H04L2027/0057 ,  H04L2027/0067 ,  H04L2027/0077 ,  H04L2027/0095

摘要： A digital broadcasting receiver is provided which can reproduce a carrier quickly and capture a desired signal at high speed. A carrier reproduction phase error detection circuit (6) detects a phase error voltage in accordance with a demodulation output obtained by demodulating a demodulated wave of a modulated wave during a predetermined section in a header section. A peak number calculation circuit (92) calculates an error frequency between a desired reception frequency and a reproduction carrier frequency in accordance with the phase error voltage. A differential coefficient calculation circuit (94) calculates the polarity of the error frequency. A step frequency control circuit (96) converts the calculated error frequency having the calculated polarity into a step frequency width for automatic frequency control. The reproduction carrier frequency is scanned at the converted step frequency width until a frame sync is established after the frame sync is detected. It is therefore possible to reproduce the carrier quickly and capture the desired signal at high speed.

摘要翻译： 提供一种数字广播接收机，其可以快速地再现载波并以高速捕获期望的信号。 载波再现相位误差检测电路（6）根据在标题部分中的预定部分期间解调调制波的解调波得到的解调输出来检测相位误差电压。 峰值计算电路（92）根据相位误差电压计算期望的接收频率和再现载波频率之间的误差频率。 差分系数计算电路（94）计算误差频率的极性。 步进频率控制电路（96）将计算出的极性的计算误差频率转换为用于自动频率控制的步进频率宽度。 以转换的步进频率宽度扫描再现载波频率，直到在检测到帧同步之后建立帧同步。 因此，可以快速地再现载体并以高速捕获期望的信号。

公开(公告)号：US06700940B1

公开(公告)日：2004-03-02

申请号：US09581212

申请日：2000-08-15

申请人： Hisakazu Katoh ,  Akinori Hashimoto ,  Tomohiro Saito ,  Fumiaki Minematsu ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matsuda ,  Soichi Shinjo

发明人： Hisakazu Katoh ,  Akinori Hashimoto ,  Tomohiro Saito ,  Fumiaki Minematsu ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matsuda ,  Soichi Shinjo

IPC分类号： H04B1700

CPC分类号： H04L27/2273

摘要： A carrier reproduction circuit which can perform stable carrier reproduction even when reception takes place with low C/N values is provided. The reception phase of the demodulated known-pattern reception signal is detected with a frame synchronizing timing circuit (4), and based on the detected reception phase, either the phase difference table of absolute phase having one convergence point or the phase difference table of the phase rotated from the absolute phase by 180°, which are included in a carrier reproduction phase difference detecting circuit (8), is selected, and from the selected phase difference table the output based on the phase difference between the phase obtained from the signal point position of the reception signal and the phase convergence point is obtained, and thus carrier reproduction is implemented by undergoing the reproduced carrier frequency control via an AFC circuit (10) so that the phase obtained from the signal point position coincides with the phase convergence point.

摘要翻译： 提供即使在以低C / N值进行接收的情况下也能够执行稳定的载波再现的载波再现电路。 利用帧同步定时电路（4）检测解调的已知模式接收信号的接收相位，并且基于检测到的接收相位，具有一个收敛点的绝对相位的相位差表或者具有一个收敛点的相位差表 选择包含在载波再现相位差检测电路（8）中的从绝对相位旋转180°的相位，并且从所选择的相位差表中选择基于从信号点获得的相位之间的相位差的输出 获得接收信号和相位收敛点的位置，从而通过经由AFC电路（10）经历再现的载波频率控制来实现载波再现，使得从信号点位置获得的相位与相位收敛点一致。

公开(公告)号：US06693978B1

公开(公告)日：2004-02-17

申请号：US09424832

申请日：1999-12-01

申请人： Akihiro Horii ,  Kenichi Shiraishi

发明人： Akihiro Horii ,  Kenichi Shiraishi

IPC分类号： H04L2714

CPC分类号： H04L27/2273 ,  H03J2200/02 ,  H04L1/206

摘要： A carrier reproducing circuit capable of reproducing a carrier quickly, wherein: a signal point arrangement converting circuit (14) detects the signal point arrangement of a demodulating baseband signal of a carrier when the carrier has a frequency different by a predetermined value from the center frequency of the modulated wave; a variance calculating circuit (15) calculates, based on the signal point arrangement, the number of times that the variance exceeds a preset threshold per unit time; a CN determination circuit (16) determines the reception CN ratio based on the number of times; a scanning step frequency width converting circuit (19) sets a frequency width changed by one step based on the determined reception CN ratio; the carrier for demodulating is sent out by changing oscillation frequencies of oscillators (6, 7) through an AFC circuit (20) based on the present frequency width; and when a carrier synchronization judging circuit (18) detects that the number of times decreases to a value equal to or smaller than a threshold determined based on the reception CN ratio, the scanning by the AFC circuit (20) is stopped.

摘要翻译： 一种能够快速再现载波的载波再现电路，其中：当载波具有与中心频率不同的预定值的频率时，信号点排列转换电路（14）检测载波的解调基带信号的信号点排列 的调制波; 方差计算电路（15）基于信号点排列计算每单位时间的方差超过预设阈值的次数; CN确定电路（16）基于次数确定接收CN比; 扫描步长频率变换电路（19）基于所确定的接收CN比设定改变了一步的频率宽度; 通过基于当前频率宽度通过AFC电路（20）改变振荡器（6,7）的振荡频率来发送用于解调的载波; 并且当载波同步判断电路（18）检测到次数减少到等于或小于基于接收CN比确定的阈值的值时，由AFC电路（20）的扫描停止。

公开(公告)号：US06678336B1

公开(公告)日：2004-01-13

申请号：US09554669

申请日：2000-08-09

申请人： Hisakazu Katoh ,  Akinori Hashimoto ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matsuda

发明人： Hisakazu Katoh ,  Akinori Hashimoto ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matsuda

IPC分类号： H04L2706

CPC分类号： H04L27/2332 ,  H04L2027/003 ,  H04L2027/0057 ,  H04L2027/0081 ,  H04L2027/0095

摘要： A hierarchical transmission digital demodulator capable of stable sync capture and stable demodulation through setting of a demodulation operation in accordance with a reception C/N value. A CNR measuring circuit receives a demodulation output from an arithmetic circuit and measures a reception C/N value. During a period until sync is captured, a carrier is reproduced in accordance with the demodulation output that a modulated wave in a header section and a modulated wave of burst symbol signal. After sync is captured, at an intermediate C/N value the carrier is reproduced in accordance with the demodulation output of the header section, burst symbol signal and QPSK signal and in accordance with output from a logical gate circuit, and at high and low C/N values the carrier is reproduced by setting high a carrier reproduction loop gain of a gain control circuit in accordance with a signal from the logical gate circuit.

摘要翻译： 一种能够通过根据接收C / N值设置解调操作来稳定同步捕获和稳定解调的分级发送数字解调器。 CNR测量电路从运算电路接收解调输出并测量接收C / N值。 在捕获同步之前的一段时间内，根据解调输出再现载波，以便在报头部分中的调制波和突发符号信号的调制波。 在捕获同步之后，以中间C / N值，根据标题部分的解调输出，突发符号信号和QPSK信号，并根据逻辑门电路的输出，以及在高和低C / N值通过根据来自逻辑门​​电路的信号设置增益控制电路的载波再生环路增益来重放载波。

公开(公告)号：US06639951B1

公开(公告)日：2003-10-28

申请号：US09554689

申请日：2000-05-18

申请人： Hisakazu Katoh ,  Akinori Hashimoto ,  Tomohiro Saito ,  Fumiaki Minematsu ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matsuda ,  Soichi Shinjo

发明人： Hisakazu Katoh ,  Akinori Hashimoto ,  Tomohiro Saito ,  Fumiaki Minematsu ,  Kenichi Shiraishi ,  Akihiro Horii ,  Shoji Matsuda ,  Soichi Shinjo

IPC分类号： H04L2714

CPC分类号： H04L27/2332 ,  H04L7/04 ,  H04L2027/003 ,  H04L2027/0057 ,  H04L2027/0095

摘要： A digital demodulator that eliminates the need for an absolute phase circuit is provided. In a digital demodulator for a digital broadcasting receiver that receives digital time-division multiplexed signals of different types of modulation, the demodulated baseband signal is selectively inverted by an inverter (7) according to an inversion command signal “0” or “1” that is output from an inversion decision circuit (6) depending on a BPSK signal of a known pattern. A phase error detector (8) for carrier reproduction determines the phase error voltage based on the phase difference between the absolute phase and the phase of the signal point of the demodulated baseband signal output from the inverter (7). The phase error voltage is passed through a carrier filter (9), including a low-pass filter, to control the carrier frequency so that carrier reproduction can be carried out with the phase at the signal point being coincident with the point of phase convergence.

摘要翻译： 提供了一种无需绝对相位电路的数字解调器。 在用于数字广播接收机的数字解调器中，接收不同类型调制的数字时分多路复用信号，根据反相器（7）根据反相指令信号“0”或“1”选择性地将解调的基带信号反相， 根据已知图案的BPSK信号从反转判定电路（6）输出。 用于载波再现的相位误差检测器（8）基于从逆变器（7）输出的解调的基带信号的信号点的绝对相位和相位之间的相位差来确定相位误差电压。 相位误差电压通过包括低通滤波器的载波滤波器（9），以控制载波频率，使得载波再现可以在信号点处的相位与相位收敛点一致。

公开(公告)号：US06556314B1

公开(公告)日：2003-04-29

申请号：US09325752

申请日：1999-06-04

申请人： Kenichi Shiraishi ,  Hiroshi Kawamoto ,  Hiroaki Takeshima ,  Mamoru Fujii ,  Akihiko Kumagai

发明人： Kenichi Shiraishi ,  Hiroshi Kawamoto ,  Hiroaki Takeshima ,  Mamoru Fujii ,  Akihiko Kumagai

IPC分类号： H04N140

CPC分类号： H04N1/00541 ,  H04N1/00538

摘要： A facsimile provided with a easily detachable scanner disclosed. When a button 7 provided in a panel 6 of a facsimile body F is pushed, lower a right end 10R of a release lever 10 is depressed, and the release lever 10 is turned on a pivot 10C to raise its left end 10L, thereby boosting a bottom 11 of the scanner S. In consequence thereof, the scanner S is ached from the facsimile body F.

摘要翻译： 具有公开的容易拆卸的扫描仪的传真机。 当设置在传真机身F的面板6中的按钮7被按下时，释放杆10的右端10R被下压，释放杆10转动到枢轴10C上以使其左端10L升高，从而提升 扫描仪S的底部11.因此，扫描器S从传真体F中消失。

公开(公告)号：US6097877A

公开(公告)日：2000-08-01

申请号：US444731

申请日：1995-05-19

申请人： Hironobu Katayama ,  Hiroaki Nogami ,  Kenichi Shiraishi

发明人： Hironobu Katayama ,  Hiroaki Nogami ,  Kenichi Shiraishi

IPC分类号： H04N5/783 ,  G11B5/008 ,  H04N5/92 ,  H04N7/52 ,  H04N9/804 ,  H04N19/00 ,  H04N19/423 ,  H04N19/46 ,  H04N19/503 ,  H04N19/577 ,  H04N19/587 ,  H04N19/59 ,  H04N19/61 ,  H04N19/625 ,  H04N19/65 ,  H04N19/66 ,  H04N19/70 ,  H04N19/85 ,  H04N19/89 ,  H04N19/895 ,  H04N19/91 ,  H04N5/91 ,  H04N5/917 ,  H04N7/26

CPC分类号： H04N21/236 ,  H04N21/434 ,  H04N9/8047 ,  G11B5/0086 ,  G11B5/00878 ,  H04N5/783

摘要： A digitally recording and reproducing apparatus simultaneously records two kinds of digital signals of an identical video program, generated by high-efficiency coding, or a relatively high bit-rate signal and a relatively low bit-rate signal, onto the approximately the same positions on the tape. The apparatus is constructed so that the low bit-rate signal is commonly used for normal playback and search-playback. Further, the recording time can be lengthened by reducing the recording bit-rate.

摘要翻译： 数字记录和再现装置同时将通过高效编码产生的相同视频节目的两种数字信号或相对较高的比特率信号和相对低的比特率信号记录在大致相同的位置上 磁带。 该装置被构造成使得低比特率信号通常用于正常播放和搜索重放。 此外，可以通过降低记录比特率来延长记录时间。

公开(公告)号：US5970046A

公开(公告)日：1999-10-19

申请号：US889575

申请日：1997-07-08

申请人： Toshiyuki Takegahara ,  Shoichi Suzuki ,  Kenichi Shiraishi ,  Hiroyuki Nagasaka ,  Atsushi Shinoda

发明人： Toshiyuki Takegahara ,  Shoichi Suzuki ,  Kenichi Shiraishi ,  Hiroyuki Nagasaka ,  Atsushi Shinoda

IPC分类号： H04B1/04 ,  H04B1/30 ,  H04J11/00

CPC分类号： H04B1/04 ,  H04B1/30

摘要： An apparatus for demodulating an AM data multiplexed modulated wave signal in which an analog modulated signal and digital modulated signals are multiplexed, in order to derive therefrom a baseband digital signal. The demodulation apparatus aims to derive the digital baseband signal from the AM data multiplexed modulated wave signal in which the analog modulated signal obtained by amplitude modulating a carrier having a frequency fc with an analog signal and the digital modulated signals at frequency position of (fc+f.alpha.) and (fc-f.alpha.) line-symmetrical with respect to a frequency axis of the frequency fc are multiplexed. A demodulation apparatus includes an AM type modulated wave signal eliminating circuit for removing an AM modulated wave signal from an input AM data multiplexed modulated wave signal, and a data demodulation circuit for receiving an output of the AM type modulated wave signal eliminating circuit and for deriving therefrom a baseband digital signal.

摘要翻译： 一种用于解调其中模拟调制信号和数字调制信号被多路复用的AM数据复用调制波信号的装置，以便从中得到基带数字信号。 解调装置旨在从AM数据复用调制波信号导出数字基带信号，其中通过对具有模拟信号的频率fc的载波进行幅度调制而获得的模拟调制信号和频率位置处的（fc + fα）和（fc-fα）相对于频率fc的频率轴线对称的多路复用。 解调装置包括：AM型调制波信号消除电路，用于从输入的AM数据复用调制波信号中去除AM调制波信号;以及数据解调电路，用于接收AM型调制波信号消除电路的输出， 从而提供基带数字信号。

公开(公告)号：US5600673A

公开(公告)日：1997-02-04

申请号：US566082

申请日：1995-12-01

申请人： Kimiyoshi Kimura ,  Kenichi Shiraishi ,  Souichi Shinjo

发明人： Kimiyoshi Kimura ,  Kenichi Shiraishi ,  Souichi Shinjo

IPC分类号： H04L27/18 ,  H04L27/00 ,  H04L27/22 ,  H04B3/46

CPC分类号： H04L27/2067 ,  H04L27/0012 ,  H04L27/2035

摘要： A circuit for discriminating the modulation type of a received signal capable of discriminating the modulation type at high speed. This circuit includes: a clock recovery circuit for recovering a data clock from received data; a phase difference detector for detecting a phase difference between the data clock recovered by the clock recovery circuit and the received data; a deviation calculation circuit for calculating a deviation between the phase difference detected by the phase difference detector and a deviation reference value preset in accordance with a modulation type; a squaring circuit for squaring the deviation calculated by the deviation calculation circuit; an average value calculation circuit for calculating an average value of a predetermined plurality number of consecutive ones of the square output calculated by the squaring circuit; and a comparator for comparing the average value calculated by the average value calculation circuit with a predetermined decision reference value and outputting a discrimination signal in accordance with the comparison results.

摘要翻译： 用于鉴别能够高速识别调制类型的接收信号的调制类型的电路。 该电路包括：时钟恢复电路，用于从接收的数据中恢复数据时钟; 相位差检测器，用于检测由时钟恢复电路恢复的数据时钟与接收的数据之间的相位差; 偏差计算电路，用于计算由相位差检测器检测的相位差与根据调制类型预设的偏差参考值之间的偏差; 用于对由偏差计算电路计算的偏差进行平方的平方电路; 平均值计算电路，用于计算由平方电路计算出的平方输出的预定多个连续个数的平均值; 以及比较器，用于将由平均值计算电路计算的平均值与预定的判定参考值进行比较，并根据比较结果输出鉴别信号。