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公开(公告)号：US12046172B2
公开(公告)日：2024-07-23
申请号：US17434790
申请日：2021-07-15
Inventor： Mingyue Li , Chao Tian , Yanqing Guan , Fei Ai , Guanghui Liu
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/0283
Abstract: The present application discloses a gate drive circuit and a display device. The gate drive circuit includes a plurality of cascaded gate drive units, in which one of the gate drive units includes a first layout, an input module and a pull-up module. By receiving a potential changeable signal by the gate of a first transistor or the gate of a second thin-film transistor, it can alleviate or avoid current leakage caused when a first node keeps at a same voltage level for a long time, thereby improving the stability of the potential of the first node.
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公开(公告)号：US20240222446A1
公开(公告)日：2024-07-04
申请号：US17996787
申请日：2022-08-30
Inventor： Fei Ai , Dewei Song
IPC: H01L29/417 , H01L29/08 , H01L29/49 , H01L29/66 , H01L29/786
CPC classification number: H01L29/41733 , H01L29/0847 , H01L29/4908 , H01L29/66757 , H01L29/66969 , H01L29/78675 , H01L29/7869
Abstract: The present application provides a thin film transistor and an electronic device. The thin film transistor includes: a crystalline active pattern, wherein the crystalline active pattern includes a channel and two contact portions, and the two contact portions are connected to opposite two sides of the channel in a direction intersecting a thickness direction of the crystalline active pattern; a groove located on at least one of the two contact portions and extending in the thickness direction of the crystalline active pattern; a source electrode and a drain electrode connected to the two contact portions, respectively; and an insulating layer being in contact with the channel.
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公开(公告)号：US20240027859A1
公开(公告)日：2024-01-25
申请号：US17607852
申请日：2021-09-08
Inventor： Zhilin Wu , Tao Ma , Dewei Song , Fei Ai
IPC: G02F1/1362 , G02F1/1343 , G02F1/1333 , G02F1/1368
CPC classification number: G02F1/136295 , G02F1/136209 , G02F1/1343 , G02F1/136227 , G02F1/13338 , G02F1/1368
Abstract: The present application discloses a display panel and an electrical terminal. The display panel includes: an underlay; an array driver layer located on the underlay and including a gate electrode layer and a source and drain electrode layer; a signal line including an adaptor portion located in the non-display region, wherein the adaptor portion includes a first wire section disposed in a same layer with the gate electrode layer, a second wire section disposed in a same layer with the source and drain electrode layer, and a bridge portion electrically connected to the first wire section and the second wire section; wherein the first wire section, the second wire section, and the bridge portion are disposed in different layers.
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公开(公告)号：US11796847B2
公开(公告)日：2023-10-24
申请号：US17600321
申请日：2021-08-19
IPC: G02F1/1333 , G02F1/1362 , G02F1/1343 , H01L27/12 , H01L29/786 , H01L29/66
CPC classification number: G02F1/133345 , G02F1/133357 , G02F1/134309 , G02F1/136204 , H01L27/1222 , H01L27/1274 , H01L29/66757 , H01L29/78675 , G02F2201/07
Abstract: An array substrate, includes: a substrate, a first metal layer, a first buffer layer, and an active layer, a gate insulating layer, a second metal layer, a first insulating layer, a third metal layer and a first planarization layer. The first metal layer is electrically connected with the first doped area of the active layer through the bridge layer of the second metal layer. The third metal layer is electrically connected with the second doped area of the active layer. The array substrate of the present disclosure reduces a size of a thin film transistor by stacking the first metal layer, the second metal layer, and the third metal layer, thereby increasing pixel density. A display panel is also provided.
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公开(公告)号：US10971530B2
公开(公告)日：2021-04-06
申请号：US16097279
申请日：2018-09-18
Inventor： Guanghui Liu , Peng He , Yong Xu , Fei Ai
IPC: H01L27/12
Abstract: A manufacturing method for TFT array substrate and TFT array substrate are disclosed. After depositing an electrode material layer and a metal material layer on the gate insulation layer and the active layer in sequence after the active layer above the gate electrode is formed. A photoresist pattern is formed on the metal material layer. The photoresist pattern includes a first and second photoresist blocks with different thicknesses. The metal material layer and the electrode material layer are etched using the photoresist pattern to form a contact electrode and pixel electrodes connected with two ends of the active layer and the source/drain electrodes on the contact electrode. The process is simple and can effectively reduce the contact resistance between the source/drain and the active layer and improve the quality of the product.
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Patent Agency Ranking
公开(公告)号：US12191324B2
公开(公告)日：2025-01-07
申请号：US17593659
申请日：2021-07-26
Inventor： Fan Gong , Fei Ai , Jiyue Song
IPC: H01L27/144 , H01L27/12
Abstract: An array substrate, a manufacturing method of the array substrate, and a display panel are provided. The array substrate includes a photosensitive sensor. The photosensitive sensor includes a photosensitive module and a storage module. The photosensitive module includes a photosensitive semiconductor layer. The storage module includes a first electrode plate and a second electrode plate. Wherein, the photosensitive semiconductor layer is disposed on an extension section of a drain electrode. A number of film layer of the photosensitive sensor is decreased, and photomasks are saved.
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公开(公告)号：US12154470B2
公开(公告)日：2024-11-26
申请号：US17617608
申请日：2021-10-29
Inventor： Haiming Cao , Yanqing Guan , Chao Tian , Fei Ai , Guanghui Liu , Zhifu Li
IPC: G09G3/20 , G09G3/3266 , G09G3/36 , H01L29/786
Abstract: A gate driving circuit and a display panel are disclosed. A pull-up control module and a pull-down module of each stage gate driving unit are connected to a first node. A thin film transistor in the pull-up control module and/or pull-down module that is connected to the first node is an oxide thin film transistor, such that a leakage current of the first node is reduced due to the advantage of the small off-state leakage current of the oxide thin film transistor. Therefore, the voltage level of the first node can remain stable during a pull-up stage and a touch suspension stage.
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公开(公告)号：US12135486B2
公开(公告)日：2024-11-05
申请号：US17289764
申请日：2021-03-17
Inventor： Jiyue Song , Fei Ai
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
Abstract: Embodiments of the present disclosure disclose a driving substrate, a display panel, and a manufacturing method of the driving substrate. In the driving substrate, a first electrode is connected to a first thin film transistor; a photosensitive diode includes a first semiconductor layer and an intrinsic semiconductor layer sequentially disposed on the first electrode, the intrinsic semiconductor layer wraps the first semiconductor layer and the first electrode; and a second conductive layer is disposed on the photosensitive diode. The second conductive layer includes a second electrode, and the second electrode covers the photosensitive diode.
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公开(公告)号：US12125424B2
公开(公告)日：2024-10-22
申请号：US17605546
申请日：2021-08-31
Inventor： Mingyue Li , Chao Tian , Yanqing Guan , Fei Ai , Guanghui Liu
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0286
Abstract: The present application discloses a gate driving circuit and a display panel. The gate driving circuit comprises a plurality of cascaded gate driving modules. A first driving signal can be output through a first output node, and at the same time, a second driving signal with a same phase as the first driving signal can be output through a second output node, and a gate driving sub-module and an in-phase output sub-module share the first output node and a pull-down node, which simplifies a circuit topology of the gate driving circuit.
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公开(公告)号：US12075638B2
公开(公告)日：2024-08-27
申请号：US17278694
申请日：2021-02-26
Inventor： Jiyue Song , Fei Ai , Dewei Song , Fan Gong
CPC classification number: H10K30/80 , H10K39/32 , G06V40/1318
Abstract: An array substrate, a display panel, and a display device are provided by the present application. The array substrate includes a base substrate; a light-sensitive component layer disposed on the base substrate, wherein a plurality of light-sensitive components are disposed at intervals in the light-sensitive component layer; and a first light-shielding layer disposed on the light-sensitive component layer. An orthographic projection of the first light-shielding layer on the base substrate partially overlaps with an orthographic projection of each of the light-sensitive components on the array substrate.
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