公开(公告)号：US20240268096A1

公开(公告)日：2024-08-08

申请号：US18423850

申请日：2024-01-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki OKAMOTO ,  Takanori MATSUZAKI ,  Hiroki INOUE

IPC: H10B12/00

CPC classification number: H10B12/30 ,  H10B12/50

Abstract: A memory device capable of reading multi-bit data at a time is provided. The memory device includes a first layer and a second layer positioned above or below the first layer. The first layer includes a first transistor and a first capacitor, and the second layer includes a second transistor and a second capacitor. Each of the first and second capacitors is a trench capacitor, and the trench length of the second capacitor is larger than the trench length of the first capacitor. A voltage retained in the first capacitor corresponds to a lower bit signal of data, and a voltage retained in the second capacitor corresponds to a higher bit signal of the data.

公开(公告)号：US20220279140A1

公开(公告)日：2022-09-01

申请号：US17630074

申请日：2020-07-28

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Hiromichi GODO ,  Yusuke NEGORO ,  Hiroki INOUE ,  Takahiro FUKUTOME

IPC: H04N5/378 ,  H04N5/347 ,  H04N5/376

Abstract: An imaging device with a novel structure is provided. The imaging device includes an imaging region provided with a plurality of pixels. The plurality of pixels included in the imaging region include a first pixel and a second pixel. The imaging device has a function of selecting a first region or a second region. The first region includes the same number of pixels as the second region. The first region includes at least the first and second pixels. The second region includes at least the second pixel. The pixels included in the first region or the second region have a function of outputting imaging signals obtained by the pixels. The imaging device generates first image data by concurrently reading the imaging signals output from the pixels included in the first region and performing arithmetic operation on the signals. The imaging device generates second image data by concurrently reading the imaging signals output from the pixels included in the second region and performing arithmetic operation on the signals. A first conceptual image can be generated with the use of the first image data and the second image data.

公开(公告)号：US20220173737A1

公开(公告)日：2022-06-02

申请号：US17441804

申请日：2020-03-12

Applicant: Semiconductor Energy Laboratory Co., Ltd

Inventor： Hiroki INOUE ,  Munehiro KOZUMA ,  Takeshi AOKI ,  Shuji FUKAI ,  Fumika AKASAWA ,  Sho NAGAO

IPC: H03K19/08 ,  H03K17/56

Abstract: A semiconductor device is provided; the semiconductor device includes unipolar transistors. A steady-state current does not flow in the semiconductor device. The semiconductor device uses a high-level potential and a low-level potential to express a high level and a low level, respectively. The semiconductor device includes unipolar transistors, a capacitor, first and second input terminals, and an output terminal. To the second input terminal, a signal is input whose logic is inverted from the logic of a signal input to the first input terminal. The semiconductor device has a circuit structure called bootstrap in which two unipolar transistors are connected in series between the high-level potential and the low-level potential and a capacitor is provided between an output terminal and a gate of one of the two transistors. A delay is caused between the gate of the transistor and the signal output from the output terminal, whereby the bootstrap can be certainly performed.

公开(公告)号：US20220172677A1

公开(公告)日：2022-06-02

申请号：US17546696

申请日：2021-12-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shintaro HARADA ,  Yoshiyuki KUROKAWA ,  Takeshi AOKI ,  Yuki OKAMOTO ,  Hiroki INOUE ,  Koji KUSUNOKI ,  Yosuke TSUKAMOTO ,  Katsuki YANAGAWA ,  Kei TAKAHASHI ,  Shunpei YAMAZAKI

IPC: G09G3/3225 ,  G06F1/16 ,  G06F3/041 ,  G06N3/04 ,  G06N3/08 ,  G09G5/22 ,  G06V30/32

Abstract: An electronic device capable of efficiently recognizing a handwritten character is provided.
The electronic device includes a first circuit, a display portion, and a touch sensor. The first circuit includes a neural network. The display portion includes a flexible display. The touch sensor has the function of outputting an input handwritten character as image information to the first circuit. The first circuit has the function of analyzing the image information and converting the image information into character information, and a function of displaying an image including the character information on the display portion. The analysis is performed by inference through the use of the neural network.

公开(公告)号：US20220085427A1

公开(公告)日：2022-03-17

申请号：US17420536

申请日：2020-01-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Ryota TAJIMA ,  Kei TAKAHASHI ,  Hiroki INOUE ,  Munehiro KOZUMA ,  Takahiro FUKUTOME

IPC: H01M10/44 ,  G01R31/367 ,  H02J7/00 ,  H01M10/48

Abstract: A semiconductor device that inhibits deterioration of a secondary battery is provided. The semiconductor device includes a secondary battery module and a first circuit. The secondary battery module includes a secondary battery and a sensor. The first circuit includes a variable resistor. The sensor has a function of measuring a temperature of the secondary battery. The first circuit has a function of judging the charge voltage of the secondary battery and outputting a first result; a function of judging the temperature of the secondary battery measured by the sensor and outputting a second result; a function of determining the magnitude of the variable resistor on the basis of the first result and the second result; a function of discharging the charge voltage through the variable resistor; and a function of stopping discharge when the charge voltage reaches a specified voltage.

公开(公告)号：US20220006309A1

公开(公告)日：2022-01-06

申请号：US17292218

申请日：2019-11-12

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Yuki OKAMOTO ,  Minato ITO ,  Takahiko ISHIZU ,  Hiroki INOUE ,  Shunpei YAMAZAKI

IPC: H02J7/00 ,  H01M10/44 ,  H03K17/082 ,  H01M10/42 ,  H03K3/0231

Abstract: A semiconductor device with reduced power consumption is provided. The semiconductor device includes a node ND1, a node ND2, a resistor, a capacitor, and a comparison circuit. The resistor is electrically connected in series between one of a positive electrode and a negative electrode of a secondary battery and a first terminal. The resistor has a function of converting current flowing between the one of the positive electrode and the negative electrode of the secondary battery and the first terminal into a first voltage. The first voltage is added to a voltage of the node ND2 through the capacitor. The comparison circuit has a function of comparing a voltage of the node ND1 and the voltage of the node ND2. The comparison circuit outputs a signal that notifies detection of overcurrent when the voltage of the node ND2 is higher than the voltage of the node ND1.

公开(公告)号：US20210384751A1

公开(公告)日：2021-12-09

申请号：US17286088

申请日：2019-10-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Takayuki IKEDA ,  Takanori MATSUZAKI ,  Munehiro KOZUMA ,  Hiroki INOUE ,  Ryota TAJIMA ,  Yohei MOMMA ,  Mayumi MIKAMI ,  Kazutaka KURIKI ,  Shunpei YAMAZAKI

IPC: H02J7/00

Abstract: A battery control circuit with a novel structure, a battery protection circuit with a novel structure, and a power storage device including either of the battery circuits are provided. The power storage device includes a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery; the first circuit portion has a function of controlling charging of the secondary battery; the first circuit portion has a function of supplying the start time and the end time of the charging of the secondary battery to the third circuit portion; the second circuit portion has functions of generating a first voltage and a first current and supplying them to the third circuit portion; the third circuit portion has a function of generating a second voltage by charging the first current in a capacitor; and the third circuit portion has a function of comparing the first voltage and the second voltage.

公开(公告)号：US20170077101A1

公开(公告)日：2017-03-16

申请号：US15359873

申请日：2016-11-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Kiyoshi KATO ,  Takanori MATSUZAKI ,  Shuhei NAGATSUKA

IPC: H01L27/105 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1052 ,  G11C11/404 ,  G11C11/405 ,  G11C11/4091 ,  G11C16/0408 ,  G11C16/08 ,  G11C16/24 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/425 ,  H01L21/441 ,  H01L21/477 ,  H01L27/108 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/66969 ,  H01L29/78651 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.

Abstract translation: 提供了包括非易失性存储单元的半导体器件，其中包括包括氧化物半导体的写入晶体管，包括与写入晶体管不同的半导体材料的读取晶体管和电容器。 通过接通写入晶体管并将电位施加到写入晶体管的源极（或电极），电容器的一个电极和读取晶体管的栅电极的节点处，将数据写入存储单元 电连接，然后关闭写入晶体管，使得预定量的电荷被保持在节点中。 此外，当使用p沟道晶体管作为读取晶体管时，读取电位为正电位。

公开(公告)号：US20160064443A1

公开(公告)日：2016-03-03

申请号：US14837040

申请日：2015-08-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Yuki OKAMOTO

IPC: H01L27/146 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L27/14612 ,  H01L27/14632 ,  H01L27/14643 ,  H01L29/7869

Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit and a second circuit. The first circuit includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor, a second capacitor, and a third capacitor. The second circuit includes an eighth transistor. Variation in threshold voltage of an amplifier transistor (the fifth transistor) included in the first circuit can be compensated.

Abstract translation: 提供能够获得高质量成像数据的成像装置。 成像装置包括第一电路和第二电路。 第一电路包括光电转换元件，第一晶体管，第二晶体管，第三晶体管，第四晶体管，第五晶体管，第六晶体管，第七晶体管，第一电容器，第二电容器和第三电容器。 第二电路包括第八晶体管。 可以补偿包括在第一电路中的放大器晶体管（第五晶体管）的阈值电压的变化。

公开(公告)号：US20160064383A1

公开(公告)日：2016-03-03

申请号：US14935607

申请日：2015-11-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi KATO ,  Shuhei NAGATSUKA ,  Hiroki INOUE ,  Takanori MATSUZAKI

IPC: H01L27/108

CPC classification number: H01L27/108 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/1156 ,  H01L27/1225

Abstract: A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased.

Abstract translation: 具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且对写入次数没有限制。 在半导体装置中，以矩阵形式设置有各自包括第一晶体管，第二晶体管和电容器的多个存储单元，以及用于将一个存储单元连接到另一个存储单元的源（或称为位线） 第一晶体管的漏极电极通过第二晶体管的源极或漏极电极彼此电连接。 因此，布线数量可以比第一晶体管的源极或漏极以及第二晶体管的源极或漏极连接到不同的布线的情况下的布线数量小。 因此，可以提高半导体器件的集成度。