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    Logic Circuit and Semiconductor Device Formed Using Unipolar Transistor
    1.
    发明申请
    Logic Circuit and Semiconductor Device Formed Using Unipolar Transistor 有权

    公开(公告)号：US20220173737A1

    公开(公告)日：2022-06-02

    申请号：US17441804

    申请日：2020-03-12

    Applicant: Semiconductor Energy Laboratory Co., Ltd

    Inventor： Hiroki INOUE ,  Munehiro KOZUMA ,  Takeshi AOKI ,  Shuji FUKAI ,  Fumika AKASAWA ,  Sho NAGAO

    IPC: H03K19/08 ,  H03K17/56

    Abstract: A semiconductor device is provided; the semiconductor device includes unipolar transistors. A steady-state current does not flow in the semiconductor device. The semiconductor device uses a high-level potential and a low-level potential to express a high level and a low level, respectively. The semiconductor device includes unipolar transistors, a capacitor, first and second input terminals, and an output terminal. To the second input terminal, a signal is input whose logic is inverted from the logic of a signal input to the first input terminal. The semiconductor device has a circuit structure called bootstrap in which two unipolar transistors are connected in series between the high-level potential and the low-level potential and a capacitor is provided between an output terminal and a gate of one of the two transistors. A delay is caused between the gate of the transistor and the signal output from the output terminal, whereby the bootstrap can be certainly performed.

    LOGIC CIRCUIT FORMED USING UNIPOLAR TRANSISTOR, AND SEMICONDUCTOR DEVICE
    2.
    发明公开
    LOGIC CIRCUIT FORMED USING UNIPOLAR TRANSISTOR, AND SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240364343A1

    公开(公告)日：2024-10-31

    申请号：US18766726

    申请日：2024-07-09

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Hiroki INOUE ,  Munehiro KOZUMA ,  Takeshi AOKI ,  Shuji FUKAI ,  Fumika AKASAWA ,  Shintaro HARADA ,  Sho NAGAO

    IPC: H03K19/094 ,  H01L27/06

    CPC classification number: H03K19/094 ,  H01L27/0629

    Abstract: A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.

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