公开(公告)号：US20240161695A1

公开(公告)日：2024-05-16

申请号：US18282164

申请日：2022-03-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Minato ITO ,  Takanori MATSUZAKI ,  Munehiro KOZUMA ,  Yuki OKAMOTO ,  Yusuke KOUMURA

IPC: G09G3/3233 ,  H10K59/131

CPC classification number: G09G3/3233 ,  H10K59/131 ,  G09G2300/0809 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2340/0442

Abstract: A display apparatus with a novel structure is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a driver circuit region, and the second layer includes a pixel array. The pixel array includes a plurality of pixel regions. The driver circuit region includes a control circuit unit and a plurality of local driver circuits. One of the plurality of local driver circuits corresponds to any one of the plurality of pixel regions. The local driver circuit has a function of outputting a driving signal for driving a plurality of pixels included in the corresponding pixel region. The control circuit unit has a function of comparing definition data of an input image signal and aspect ratio data of the pixel array to determine a first region where display is performed and a second region where display is not performed, and outputting, to the local driver circuit corresponding to the second region, a control signal for stopping output of the driving signal.

公开(公告)号：US20230004704A1

公开(公告)日：2023-01-05

申请号：US17846110

申请日：2022-06-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Munehiro KOZUMA ,  Minato ITO ,  Yusuke KOUMURA ,  Tatsuya ONUKI

IPC: G06F30/392

Abstract: The circuit layout generation system includes a memory portion, a limitation data arithmetic portion, and a layout data arithmetic portion. The memory portion is configured to store circuit connection data and first limitation data. The circuit connection data is data regarding connection of a transistor and a capacitor included in a pixel circuit. The first limitation data includes data that determines a wiring interval of the transistor and a wiring interval of the capacitor and data that determines placement coordinates of the transistor and the capacitor. The limitation data arithmetic portion is configured to generate second limitation data on the basis of the circuit connection data and the first limitation data and store the second limitation data in the memory portion. The second limitation data is data that determines the placement of the transistor and the capacitor designated by the placement coordinates so that the transistor and the capacitor are positioned close to each other. The layout data arithmetic portion is configured to generate layout data on the basis of the circuit connection data, the first limitation data, and the second limitation data.

公开(公告)号：US20250015614A1

公开(公告)日：2025-01-09

申请号：US18894219

申请日：2024-09-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Yuki OKAMOTO ,  Minato ITO ,  Takahiko ISHIZU ,  Hiroki INOUE ,  Shunpei YAMAZAKI

IPC: H02J7/00 ,  H01M10/42 ,  H01M10/44 ,  H03K3/0231 ,  H03K17/082

Abstract: A semiconductor device with reduced power consumption is provided. The semiconductor device includes a node ND1, a node ND2, a resistor, a capacitor, and a comparison circuit. The resistor is electrically connected in series between one of a positive electrode and a negative electrode of a secondary battery and a first terminal. The resistor has a function of converting current flowing between the one of the positive electrode and the negative electrode of the secondary battery and the first terminal into a first voltage. The first voltage is added to a voltage of the node ND2 through the capacitor. The comparison circuit has a function of comparing a voltage of the node ND1 and the voltage of the node ND2. The comparison circuit outputs a signal that notifies detection of overcurrent when the voltage of the node ND2 is higher than the voltage of the node ND1.

公开(公告)号：US20230176818A1

公开(公告)日：2023-06-08

申请号：US17922064

申请日：2021-05-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Minato ITO ,  Munehiro KOZUMA ,  Yuki OKAMOTO

IPC: G06F7/544 ,  G06N3/063 ,  H01L29/786 ,  H01L27/06

CPC classification number: G06F7/5443 ,  G06N3/063 ,  H01L29/7869 ,  H01L27/0688

Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a storage circuit, an arithmetic circuit, and a driver circuit. The arithmetic circuit includes a switching circuit and a product-sum operation circuit. The storage circuit includes a first storage region and a second storage region. The first storage region has a function of retaining first storage data. The second storage region has a function of retaining second storage data. The switching circuit has a function of outputting the first storage data or the second storage data to the product-sum operation circuit. The driver circuit has a function of outputting first input data or second input data to the product-sum operation circuit. The product-sum operation circuit has a function of retaining first output data obtained by arithmetic processing performed on the first input data and the first storage data selected by the switching circuit. The arithmetic circuit has a function of adding, to the first output data, second output data obtained by arithmetic processing performed on the second input data and the second storage data selected by the switching circuit.

公开(公告)号：US20160351641A1

公开(公告)日：2016-12-01

申请号：US15163072

申请日：2016-05-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Minato ITO ,  Yasuhiro JINBO

IPC: H01L27/32 ,  H01L51/00 ,  H01L27/12

CPC classification number: H01L27/1259 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/3216 ,  H01L27/3272 ,  H01L27/3276 ,  H01L27/3297 ,  H01L51/5265 ,  H01L51/56 ,  H01L2227/323

Abstract: A method for manufacturing a display device, which does not easily damage an electrode, is provided. In the first step, a terminal electrode, a wiring, and a functional layer are provided over a first substrate; the terminal electrode, the wiring, and the functional layer are electrically connected to one another; an insulating layer is provided over the terminal electrode; a first layer is provided over the terminal electrode and the insulating layer; an adhesive layer is sandwiched between the first substrate and a second substrate; the second substrate and the adhesive layer include a first opening overlapping with part of the first layer; and the insulating layer includes a second opening inside the first opening in a top view. In the second step, part of the first layer is removed by emitting particles having a high sublimation property to the first layer, so that the terminal electrode is exposed.

Abstract translation: 提供一种制造不容易损坏电极的显示装置的方法。 在第一步骤中，在第一基板上设置端子电极，布线和功能层; 端子电极，布线和功能层彼此电连接; 绝缘层设置在端子电极上; 在端子电极和绝缘层上设置第一层; 粘合剂层夹在第一基板和第二基板之间; 第二基板和粘合剂层包括与第一层的一部分重叠的第一开口; 并且所述绝缘层在顶视图中包括在所述第一开口内的第二开口。 在第二步骤中，通过向第一层发射具有高升华性质的颗粒来去除第一层的一部分，从而露出端子电极。

公开(公告)号：US20140252386A1

公开(公告)日：2014-09-11

申请号：US13999502

申请日：2014-03-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Minato ITO ,  Kohei YOKOYAMA ,  Yusuke NISHIDO

IPC: H01L33/52 ,  H01L33/50

CPC classification number: H01L51/529 ,  H01L27/322 ,  H01L27/3276 ,  H01L51/524 ,  H01L51/5246 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a device in which heat conduction from a sealant to a functional element is suppressed and whose bezel is slim. The sealing structure includes a first substrate, a second substrate whose surface over which a sealed component is provided faces the first substrate, and a frame-like sealant which seals a space between the first substrate and the second substrate with the first substrate and the second substrate. The second substrate includes a groove portion between the sealant and the sealed component. The groove portion is in a vacuum or includes a substance whose heat conductivity is lower than that of the second substrate.

Abstract translation: 提供了一种从密封剂到功能元件的热传导被抑制并且其表圈苗条的装置。 所述密封结构包括第一基板，其表面上设有密封部件的第二基板面对所述第一基板;以及框状密封剂，其利用所述第一基板密封所述第一基板和所述第二基板之间的空间，并且所述第二基板 基质。 第二基板包括在密封剂和密封部件之间的槽部。 槽部处于真空状态，或者包含导热率低于第二基板的物质。

公开(公告)号：US20240265882A1

公开(公告)日：2024-08-08

申请号：US18560716

申请日：2022-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Munehiro KOZUMA ,  Tatsuya ONUKI ,  Takanori MATSUZAKI ,  Minato ITO

IPC: G09G3/3275 ,  G09G3/3233 ,  H01L29/786

CPC classification number: G09G3/3275 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2310/0243 ,  G09G2310/0291 ,  G09G2330/021 ,  H01L29/78648 ,  H01L29/7869

Abstract: A semiconductor device having redundancy is provided. The semiconductor device includes a first driver circuit, a second driver circuit, a first selection circuit, a second selection circuit, and a switch circuit. An output terminal of the first driver circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switch circuit, and an output terminal of the second driver circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switch circuit.

公开(公告)号：US20220011375A1

公开(公告)日：2022-01-13

申请号：US17294780

申请日：2019-11-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Yuki OKAMOTO ,  Minato ITO ,  Takahiro ISHIZU

IPC: G01R31/396 ,  H02J7/00

Abstract: A semiconductor device that tests and/or monitors each of batteries provided in an assembled battery is provided. The semiconductor device includes a hysteresis comparator and a circuit, and the circuit has a function of setting a high-level side threshold voltage and a low-level side voltage of the hysteresis comparator. The circuit includes first and second capacitors. A first terminal of the first capacitor is electrically connected to a high-level side reference potential input terminal of the hysteresis comparator and a first terminal of the second capacitor is electrically connected to a low-level side reference potential input terminal of the hysteresis comparator. After a first reference potential is input to the high-level side reference potential input terminal and a second reference potential is input to the low-level side reference potential input terminal, a negative electrode of a cell is electrically connected to each second terminal of the first and second capacitors, whereby the potential of each first terminal of the first and second capacitors is changed.

公开(公告)号：US20210384906A1

公开(公告)日：2021-12-09

申请号：US17286094

申请日：2019-10-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Yuki OKAMOTO ,  Takahiko ISHIZU ,  Minato ITO

IPC: H03K19/0185

Abstract: A semiconductor device capable of level shifting in a negative potential direction using an n-channel transistor is provided. The semiconductor device includes a first source follower, a second source follower, and a comparator. The first source follower is supplied with a second high power supply potential and a low power supply potential; the second source follower is supplied with a first high power supply potential and the low power supply potential; and a digital signal which expresses a high level or a low level using the second high power supply potential or the first high power supply potential is input to the first source follower. Here, the second high power supply potential is a potential higher than the first high power supply potential, and the first high power supply potential is a potential higher than the low power supply potential. The comparator compares output potentials of the first source follower and the second source follower and outputs a digital signal which expresses a high level or a low level using the first high power supply potential or the low power supply potential.

公开(公告)号：US20180069064A1

公开(公告)日：2018-03-08

申请号：US15798459

申请日：2017-10-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Minato ITO ,  Yasuhiro JINBO

IPC: H01L27/32 ,  H01L27/12 ,  H01L51/00

CPC classification number: H01L27/1259 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/3216 ,  H01L27/3272 ,  H01L27/3276 ,  H01L27/3297 ,  H01L51/5265 ,  H01L51/56 ,  H01L2227/323

Abstract: A method for manufacturing a display device, which does not easily damage an electrode, is provided. In the first step, a terminal electrode, a wiring, and a functional layer are provided over a first substrate; the terminal electrode, the wiring, and the functional layer are electrically connected to one another; an insulating layer is provided over the terminal electrode; a first layer is provided over the terminal electrode and the insulating layer; an adhesive layer is sandwiched between the first substrate and a second substrate; the second substrate and the adhesive layer include a first opening overlapping with part of the first layer; and the insulating layer includes a second opening inside the first opening in a top view. In the second step, part of the first layer is removed by emitting particles having a high sublimation property to the first layer, so that the terminal electrode is exposed.